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`I have worked as a librarian at the University of Wisconsin library
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`I have been employed at WTS since 2002, first as a librarian
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`and, beginning in 2011, as the Director. Through the course of my employment, I
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`have become well informed about the operations of the University of Wisconsin
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`library system, which follows standard library practices.
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`This Declaration relates to the dates of receipt and availability of the
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`following:
`
`Wright, DR et al. "A closed-loop temperature control
`system for a low-temperature etch chuck." Advanced
`Techniques for Integrated Circuit Processing II, SPIE
`Proceedings, V. 1803, 1992, p. 321-329
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`Standard ogeratirzg procedures for Qeriodicals at the Universigg of
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`Exhibit A to this Declaration is a true and accurate copy of Advanced
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`Techniques for Integrated Circuit Processing II, from the University of Wisconsin-
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`Madison Library collection. A date stamp on the cover of this copy indicates that
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`1
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`Intel Corp. et al. Exhibit 1020
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`Intel Corp. et al. Exhibit 1020
`
`

`
`this volume, published in 1993, was received by the Kurt F. Wendt Library,
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`College of Engineering, University of Wisconsin, on June 23, 1993.
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`Based on the information in Exhibit A, it is clear that the volume was
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`received by the library on or before June 23, 1993, catalogued and available to
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`library patrons within a few days or at most a few weeks after June 23, 1993.
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`I declare that all statements made herein of my own knowledge are true and
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`further that these statements were made with the knowledge that willful false
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`statements and the like so made are punishable by fine or imprisonment, or both,
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`under Section 1001 of Title 18 of the United States Code.
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`Date: June 8, 2016
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`Wisconsin TechSearch
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`9
`Rachel J.
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`Director
`
`atters
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`Intel Corp. et al. Exhibit 1020
`
`Intel Corp. et al. Exhibit 1020
`
`

`
`EXHIBIT A
`
`Intel Corp. et al. Exhibit 1020
`
`

`
`EXHIBIT A
`
`PROCEEDINGS
`SPIE—The International Society for Optical Engineering
`
`Advanced Techniques for
`lntegra ted Circuit Processing II
`
`James Bondur
`Gary Castleman
`Lloyd R. Harriott
`Terry R. Turner
`Chairs/Editors
`
`21-23 September 1992
`San Jose, California
`
`Sponsored _and Published by
`SPIE—The International Society for Optical Engineering
`
`PROCEEDINGS
`S E Fl
`I E 5
`
`Volume 1803
`
`7
`
`SPIE (The Society of Photo-Optical Instrumentation Engineers) is a nonprofit society dedicated to the
`advancement of op;i_c‘__aa|‘and optoelectronic applied science and technology.
`natal“ E
`E.lB%‘fial’§f’?
`C=f)él.3.EGE C32‘: E§‘~iG~?i‘3fI
`‘fl: ~
`U5‘“'ilVER5lT'§’ OF VVISC"
`' T
`Iew>‘so. ws 537%’
`A N’
`
`Intel Corp. et al.
`
`,
`_
`Exh1b1t 1020
`
`EXHIBIT A
`
`Intel Corp. et al. Exhibit 1020
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`

`
`EXHIBIT A
`
`
`
`
`
`The papers appearing in this book comprise the proceedings of the meeting mentioned on
`the cover and title page. They reflect the authors’ opinions and are published as presented
`and without change,
`in the interests of timely dissemination. Their inclusion in this
`publication does not necessarily constitute endorsement by the editors or by SPIE.
`
`Please use the following format to cite material from this book:
`Author(s), "Title of paper," in Advanced Techniques for Integrated Circuit Processing II,
`James Bondur, Gary Castleman, Lloyd R. Harriott, Terry R. Turner, Editors, Proc. SPIE 1803,
`page numbers (1993).
`
`Library of Congress Catalog Card No. 92-62653
`ISBN 0-8194-1001-2
`
`Published by
`SP|E—-The International Society for Optical Engineering
`P.O. Box 10, Bellingham, Washington 98227-0010 USA
`Telephone 206/676-3290 (Pacific Time) 0 Fax 206/647-1445
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`Copyright@1993, The Society of Photo-Optical Instrumentation Engineers.
`
`Copying of material in this book for internal or personal use, or for the internal or personal
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`authorized by SPIE subject to paymentofcopying fees. The Transactional Reporting Service
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`Other copying for republication, resale, advertising or promotion, or any form of systematic
`or multiple reproduction of any material in this book is prohibited exceptwith permission
`in writing from the publisher. The CCC fee code is 0-8194-1001-2/93/$4.00.
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`Printed in the United States of America.
`
`Intel Corp. et al. Exhibit 1020
`
`EXHIBIT A
`
`Intel Corp. et al. Exhibit 1020
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`

`
`EXHIBIT A
`
`A Closed-Loop Temperature Control System
`for a Low-Temperature Etch Chuck
`
`D.R. Wright, W.D. Clark, D.C. Hartman, U.C. Sridharan*, SEMATECH, Austin, TX;
`M. Kent, R. Kerns, GS/DRYTEK, Wilmington, MA.
`
`TNow at HEWLETT-PACKARD, Palo Alto, CA.
`
`ABSTRACT
`
`A closed—|oop temperature control system has been developed for use in a low-
`temperature (—135°C) plasma etch system.
`The system employs an optical
`fluorescence probe on the chuck (a second probe monitors the wafer temperature as
`well) to provide feedback to the heating element on the input line of the chuck closed-
`loop coolant fluid. A simple proportiona|—integral—derivative (PID) controller with a
`learn mode controls the rate of current pulses applied to the heater.
`Innovations
`include the direct measurement of chuck temperature for the control signal, and the
`coupling of large cooling and heating capacities in close proximity to the chuck along
`with a fast fluid flow to guarantee quick response.
`
`It provides
`The system has been tested in prolonged etch runs of many wafers.
`reliable, tight temperature control (30 as low as O.6°C). This level of control is
`significantly tighter than could be achieved by merely monitoring chiller bath
`temperatures.
`
`1.
`
`INTRODUCTION
`
`As semiconductor features become smaller and process requirements become
`stricter, advanced plasma etch systems require tighter control over their process
`factors. A recent project at SEMATECH worked to develop an etch system that
`would provide tight control of wafer temperature for low-temperature etch
`applications.
`
`This paper discusses the hardware for both the sensors and control systems, as
`well as results of the temperature stability, over various extended runs of hundreds
`of wafers.
`
`2. SUPPORTING HARDWARE
`
`2.1
`
`Fiber optic temperature probe
`
`The fluoroptic thermometric technique developed by Luxtron uses the
`photoluminescent response of a magnesium fluorogermanate phosphor to blue light
`pulses transmitted down a fiber optic cable probe. The rate of decay of the
`fluorescence is measured and correlated to temperature. Two types of fluoroptic
`
`0-8794-7001-2/93/$4.00
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`probes are available. The first type ("remote" or non-contacting) uses a phosphor
`dye painted on the sample and receives the data into the fiber from a distance.
`The second type ("contact") uses the phosphor in an encapsulation at the end of
`the fiber. Surrounded by a protective coating, this probe is used to make physical
`and thermal contact with the sample. For the application investigated during the
`project, either type could have been used for the electrode probe. The etch
`system used in the project had two chambers, each with separate "contact"
`probes for monitoring electrode temperature and wafer temperature.
`
`The electrode temperature was monitored to determine the stability of the cooling
`system. The wafer temperature was used to determine the interaction of the etch
`process and the cooling system.
`
`2.2
`
`Chiller systems
`
`Two different cooling systems were used in the tool. For the -70°C chamber, a
`standard bath-type chiller was chosen. This style of chiller controls the
`temperature of a bath through which a heat transfer fluid circulates on its way to
`the electrode (some 5 to 10 meters" away).
`
`For the —135°C chamber, a system from Polycold was chosen. This cryo—cooler
`was unique in two ways. First, the refrigerant la mixture of Freons and argon) was
`circulated through the electrode. This afforded a higher heat removal efficiency
`than circulating a heat transfer fluid between a refrigerated bath and the electrode.
`Second, there was no built-in feedback system for temperature control. These
`systems are normally run at "maximum output" for high—vacuum cold-trap
`applications, with the temperature controlled by the composition of the refrigerant
`mixture. This made it necessary to add a separate system for controlling the
`
`electrode temperature.
`
`3. HEATER/CONTROLLER DESIGN
`
`The throttling approach to temperature control consisted of a valved coolant path
`that bypassed the chuck, allowing some of the cooling fluid to be diverted away
`from the chuck in order to lower the effective cooling power of the Polycold
`system. This approach failed for three main reasons:
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`0
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`0
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`0
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`Large valves that work reliably at —150°C are prohibitively expensive.
`
`The chuck cooling capacity was lowered (since most of the coolant would
`be bypassed).
`
`The two—phase nature of the refrigerant meant different mixtures of
`constituents flowed in the main and bypass lines, also lowering cooling
`
`efficiency.
`
`322 /SPIE V0/. 1803 (1992)
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`Intel Corp. et al. Exhibit 1020
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`

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`EXHIBIT A
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`The method chosen to provide the Po|yco|d—chil|ed electrode with temperature
`control in the Drytek pre—production prototype |ow—temperature etch system was
`by heating the cryogenic fluid in the supply line and controlling the heater power to
`maintain the desired electrode temperature. The Polycold cooling power that must
`be overcome by the heater depends on the fluid delivery temperature in a nonlinear
`manner.
`It was verified that the amount of heating power required to be
`transferred to the Polycold fluid would be within the capability of the unit and
`would not pose any difficulty for its normal operation.
`
`The heater must be insulated to prevent water—ice condensation on cryogenic
`surfaces. Enclosing the entire device in a vacuum envelope would be the preferred
`method because it also provides mechanical protection for the electrical leads to
`the heaters. The use of thermal insulation would be acceptable provided it is
`capable of cryogenic operation and is compatible with the equipment installation.
`
`In the first heater design, a brass block containing cartridge heaters was brazed to
`a straight stainless steel tube which carried the refrigerant inside a cylindrical
`vacuum enclosure.
`
`The following problems were encountered with the first design:
`
`0
`
`The stainless steel tube had a very low thermal conductivity. This low
`conductivity was compounded by the presence of the brazed connection to
`the heater block.
`
`The Polycold fluid moves at a velocity of several meters per second, so that
`the contact time inside the 1-inch heater was only 2 to 10 msec.
`
`"Channelling flow" occurred inside the stainless steel tube because the
`Polycold uses two—phase flow, consisting of liquid droplets entrained in a
`carrier gas. As illustrated in Figure 1, expansion of the gas as the liquid
`droplets vaporized caused a laminar gas barrier to form that impeded heat
`transfer, prevented succeeding droplets from contacting the wall,
`V
`"channelled" them into the center of the fluid stream, and prevented
`
`turbulent mixing of the two-phase fluid stream.
`
`These effects combined to give the first heater design very poor performance. No
`more than 6 to 8 degrees Centigrade (C°) of temperature rise could be obtained at
`the electrode, even with the brass block at 300°C.
`
`The heater system was redesigned to address the limitations discovered in the first
`heater design. The control principle of the second design is illustrated in Figure 2.
`In this case, the process temperature to be controlled was the same as the
`feedback signal to the heater controller. The electrode temperature was measured
`by the Luxtron probe. The analog output from the Luxtron controller, which was
`proportional to the electrode temperature, was used as feedback to a three—term
`
`SPIE Vol. 1303 (1992) / 323
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`EXHIBIT A
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`EXHIBIT A
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`Proportiona|—lntegral—Derivative (PID) process controller with auto-tune capability
`that provided time-proportioned power to the heater via a solid state relay. Direct
`control of the electrode temperature could be maintained with optimal transient
`response over the widest possible range of operating conditions.
`
`The heater design in Figure 3 was chosen to provide direct contact of the Polycold
`fluid with a heater material (brass) of high thermal conductivity, and to provide a
`flow path that produced turbulence in the Polycold fluid (avoiding "channelling
`flow"). Calculations showed that 600 W of heater power would be required to
`raise the Polycold fluid temperature from —130°C to —80°C. Space was provided
`for up to 2400 W of heater capacity to ensure that the time—proportioning
`controller could be operated within its control band. The number of heaters
`installed or connected could be varied, providing a simple way to adjust the
`controlled range of heater power. The heater was mounted at atmospheric
`pressure with self—adhesive thermal insulating tape applied to prevent
`condensation. A thermocouple was provided to monitor heater temperature.
`
`The following results were obtained with this design:
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`
`A maximum electrode temperature rise of over 60°C was observed.
`
`The system provided rapid transient response and stable operation over the
`range from —130°C to -80°C.
`
`The heater thermocouple indicated that the heater was maintained at
`cryogenic temperature very near the electrode temperature. This fact
`confirms the excellent heat transfer characteristics of this design.
`
`The system is capable of controlling to 11°C.
`
`The system worked very reliably throughout its installation at SEMATECH.
`
`4. OPERATIONAL TESTS
`
`4.1
`
`Hardware acceptance test
`
`As part of the hardware acceptance test prior to the shipment of the tool to
`SEMATECH, a test using a total of 550 RF (plasma) cycles was performed to
`monitor the thermal stability of the cold electrodes. Each wafer was passed from
`the cassette, via the flatfinder, to chamber 2 (oxide etch), which was held at —
`30°C by the bath—type chiller circulating methanol.
`In chamber 2, the wafer
`received five RF cycles of 20—second duration, separated by 20 seconds. The
`recipe used was a standard oxide etch CZFB (hexafluoroethane or Freon—116)
`chemistry with 600 W of power all to the bottom electrode. After processing in
`chamber 2, each wafer then passed into chamber 3 (poly etch), which was
`maintained at —105°C by the Polycold with the heater and controller discussed
`
`324 /SPIE Vol. 1803 (1992)
`
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`Intel Corp et al
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`_
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`1
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`EXHIBIT A
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`Intel Corp. et al. Exhibit 1020
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`

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`EXHIBIT A
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`In chamber 3 each wafer received six RF cycles of 20-second duration,
`previously.
`separated by 20 seconds. The recipe was the SF6/argon poly etch with 400 W of
`power, almost all to the top electrode. Fifty wafers (25 in each of two cassettes)
`were processed for a grand total of 550 plasma cycles.
`
`Using the parallel output (RS232) port of the Luxtron controller, a personal
`computer recorded the temperatures of both electrodes and both wafers as well as
`flags indicating whether the plasma was on in each chamber. These data were
`captured to disk and later analyzed using a spreadsheet program.
`
`Figure 4 shows a plot of the continuously sampled temperature of both wafer and
`electrode for six plasma cycles (one wafer) in chamber 3 (poly). Figure 5 shows a
`plot of the continuously sampled temperature of both wafer and electrode for five
`plasma cycles (one wafer) in chamber 2 (oxide). At this scale the exponential
`behaviors of both the heating and cooling of the wafer are apparent. Figure 6 then
`shows a more |ong—terr_n timeline, showing stability over several hours.
`
`Table A summarizes all of the electrode temperature data taken during the plasma
`hardware acceptance test.
`ln the poly chamber, there was a standard deviation
`(1a) of 0.21 °C for the electrode while in the oxide chamber there was a standard
`
`deviation (10) of O.78°C for the electrode. The electrode data were taken from
`
`the entire test (with or without a wafer present).
`
`Table A: Summary of Hardware Acceptance Test Results
`— Pew chamber
`oxide chamber
`Number of Data Points I 1543
`-we-83°C
`-eo.7e°c
`
`
`
`
`
`
`
`
`
`
`
`
`Standard Deviation
`
`0.21°C
`
`O.78°C
`
`The results show a highly repeatable temperature control in both chambers. ‘Both
`the bath—type chiller, using its internal feedback control, and the Polycold chiller,
`with the external heater controller, provided adequate cooling and repeatable
`temperatures over the entire test.
`
`4.2 Marathon
`
`Following the hardware acceptance, the low-temperature etch tool was installed at
`SEMATECH. After the optimization of the etch process was completed, an
`extended test was performed on the Polycold/electrode system. Over several days
`of 24 hour—per—day operation, more than 1200 wafers were processed through the
`tool. As before, computer files were maintained of the wafer and electrode
`
`temperatures at roughly five-second intervals. At the completion of the marathon,
`30,165 measurements of the electrode temperature had been recorded. The
`
`Intel Corp. e€Péi.V°"fi§é’fi1%i?2l
`
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`EXHIBIT A
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`
`EXHIBIT A
`
`process that was used in the marathon was different from the one used in the
`hardware acceptance test. The etch process was performed in two parts, with an
`initiation step and a main etch step. Each wafer received approximately one
`minute of plasma exposure time. The electrode temperature was set to -120°C.
`
`The results are shown in Table B. The control of the chuck temperature was not
`quite as tight as that of the hardware acceptance test. Some reasons include the
`lower base temperature, and a different etch process (with slightly higher heat load
`into the wafer while the plasma was on).
`
`Table B: Summary of Marathon Results
`
`— Polvsmcon chamber
`Numbér or Data Po-ms
`-12o-7°C
`
`
`
`Standard Deviation
`
`0.52°C
`
`5. CONCLUSIONS
`
`A c|osed—loop temperature control system has been developed for use in a low-
`temperature (—135°C) plasma etch system. The system employs an optical
`fluorescence probe on the chuck to provide feedback to the heating element on the
`input line of the chuck closed-loop coolant fluid. A simple proportiona|-integra|-
`derivative (PID) controller with a learn mode controls the rate of current pulses
`
`applied to the heater.
`
`Unlike the indirect control signal of the (remote) bath temperature, the system uses
`the direct measurement of chuck temperature for the control signal. The use of
`large cooling and heating capacities in close proximity to the chuck along with a
`fast fluid flow guarantee quick response. Careful design insures turbulence in the
`flow to guarantee good heat transport between the walls and the fluid.
`
`It provides
`The system has been tested in prolonged etch runs of many wafers.
`reliable, tight temperature control (30 as low as O.6°C). This level of control is
`
`significantly tighter than could be achieved by merely monitoring chiller bath
`temperatures.
`
`6. ACKNOWLEDGEMENTS
`
`The authors would like to thank Paul Grosshart for his excellent data transfer
`
`program, and Masoud Mayer for his help on the heater design and fabrication.
`This work was performed as part of a joint development project between Drytek
`and SEMATECH, a consortium of twelve semiconductor manufacturers and the
`
`federal government (DARPA).
`
`326 /SPIE Vol. 7803 (1992)
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`Intel Corp. et al. Exhibit 1020
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`EXHIBIT A
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`

`
`EXHIBIT A
`
`\~/ALL CIF STAINLESS STEEL TUBE
`
`" DRDPLET IN CEINTACT
`WITH M/ALL
`
`
`
` GAS EXPANDING AROUND
`
`VAPDRIZING DRDPLET
`
`FLU“) DRQPLETS
`ENn2A]NEn 1N
`CARRIER GAS
`
`FDRMATIUN DF
`VAPDR BARRIER
`AT TUBE SURFACE
`
`CHANELLING FLDV
`
`A
`DIRECTION CIF FLUV
`
`Figure 1
`Two-Phase Refrigerant Flow In the Polycold Lina Heater
`
`LUXTRDN FIBER ~\ /-x
`CIPTIC CABLE
`‘K j“ LUXTRUN
`_
`_ _ _
`SEMAIECH
`|_g\./ TEMPERATURE
`gym mm
`
`’T‘
`'~.,L_
`
`\—ANALDG DUTPUT SIGNAL
`PRDPDRTIDNAL TD CHUCK
`TEMPERATURE
`
`
`
`__
`r\
`_?__
`mu
`T——L—L.— SUI ID STATE »
`\
`/
`"E
`RELAY
`CONTROLLER —~~'r——{——A
`\ CCINTRDL SIGNA_
`W
`FUR SDLID STATE RELAY
`
`———4\—,+— 110 VAC
`\
`
`-HE‘/\T[‘p PE|\./U‘
`
`RETURN
`____>
`
`——
`HEATERT<_..
`SUPPLY
`
`PULYCULD
`
`I
`
`Figure 2
`Schematic of Heater Controller (Second Design)
`
`SPIE Vol. 1803 (1992)’327
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`CHAMBER 3
`(ZHUCK
`
`
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`EXHIBIT A
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`
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`
`ECCENTRIC lM.ET/UJ'I'l£T PIRTS TD
`CAUSE TURBKLANQ AND HIG-ER cu_us1m
`RATE VITH Tl! UNDER INTEFJW VALLS
`
`
`
`8 I-EATERS CAPACITY
`0-2400 VATTS RAPE
`
`Figure 3
`Heater Diagram (Second Design)
`
`20:16:50
`
`
`
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`
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`
`-107
`
`-109
`
`-110
`
`Hui (NI:—:II)
`
`Figure 4
`Poly Etch Chuck and Wafer Temperature for 6 RF Cycles
`
`328 /SPIE Vol. 7803 (1992)
`
`Intel Corp. et 211.
`
`Exhibit 1020
`
`EXHIBIT A
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`Intel Corp. et al. Exhibit 1020
`
`

`
`Figure 6
`Low-Temperature Electrode and Wafer Temperatures Duri nnnnnnnnnnnun
`
`EXHIBIT A
`
`Intel Corp. et al. Exhibit 1020