`U.S. Patent No. RE40,264
`Intel Petitioners’ Demonstratives
`March 7, 2018
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`Obviousness Combinations
`
`Petition
`
`‐279
`
`‐280
`‐281
`
`‐282
`
`All
`
`• Muller, Matsumura, Anderson and Hinman render independent claim 13
`obvious (as does the Kadomura combination)
`• Adding Kikuchi renders claim 17 obvious
`• Adding Wright renders claims 19‐20 obvious
`
`• Kadomura and Matsumura render independent claims 27, 37 and 51
`obvious
`• Kikuchi and Matsumura also render those claims obvious
`
`• Patent owner failed to address Muller, Matsumura and Wang, which
`render independent claims 56 and 60 obvious
`• Adding Kikuchi renders claim 63 obvious
`
`• Most dependent claims are not separately contested
`
`2
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`Temperature change and preselected time
`limitations
`
`’264 patent (Ex. 1001), claims 13, 27, 37, 51, 56, 60
`
`3
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`Matsumura, like the ’264 patent, relies on
`temperature changes in a preselected time period
`
`’264 patent (Ex. 1001), Fig. 10
`
`Matsumura (Ex. 1003), Fig. 9, 8:56‐62
`‐280 Petition at 6‐7, 14‐15, 32; ‐280 Bravman Decl. ¶¶51, 71, 97, 129; ‐280 Reply at 3‐4
`
`4
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`Matsumura, like the ’264 patent, relies on
`temperature changes in a preselected time period
`
`Matsumura (Ex. 1003), Fig. 9, 10:3‐7,
`2:60‐65, 10:22‐29
`
`Matsumura (Ex. 1003), 10:3‐7
`
`‐280 Petition at 6‐7, 14‐15, 32‐34; ‐280 Bravman Decl. ¶¶51, 70‐71, 129, 133‐134; ‐280 Reply at 3‐4
`
`5
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`No dispute that Matsumura’s preselected time
`and temperature changes were obvious
`
`‐280 PO Resp. at 18‐19
`
`6
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`No dispute that Matsumura’s preselected time
`and temperature changes were obvious
`
`‐280 Bravman Decl. ¶130
`
`‐280 Petition at 33
`
`7
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`’264 patent, petition 1
`IPR2017‐00279
`
`Claim 13 and its dependent claims are obvious
`
`8
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Muller disclosed temperature changes at
`predetermined times for etching
`
`Muller (Ex. 1002), Fig. 4
`
`Muller (Ex. 1002), 5:17‐25, 7:22‐25
`
`‐279 Petition at 11‐12, 27‐29, 36; ‐279 Bravman Decl. ¶¶73‐74, 117, 210
`
`9
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Combining Muller and Matsumura
`
`‐279 Bravman Decl. ¶¶178‐179
`
`‐279 Petition at 27‐29
`
`10
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Combining Muller and Matsumura
`
`Flamm does not contest the combination of Muller with Matsumura’s substrate holder
`temperature sensor or preselected time/temperature change recipes
`
`Muller (Ex. 1002), Fig. 4
`
`‐279 Petition at 11‐15, 27‐29; ‐279 Bravman Decl. ¶¶170, 177‐182
`
`11
`
`Matsumura (Ex. 1003), Fig. 5A
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Construction of “thermal mass” limitation
`
`‐279 Institution Decision at 11
`
`12
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Anderson’s low thermal mass
`substrate holder
`
`Anderson (Ex. 1011), Title, Fig. 2
`
`Anderson (Ex. 1011), Abstract, 6:1‐8, 6:24‐28
`
`‐279 Petition at 18, 23‐24; ‐279 Bravman Decl. ¶¶113, 192
`
`13
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Anderson and the ’264 patent encourage
`low thermal mass material adjacent the wafer
`
`Anderson (Ex. 1011), Title, Fig. 2, 6:24‐28
`
`’264 patent (Ex. 1001), Fig. 6, 15:43‐48
`
`‐279 Petition at 18, 23‐24; ‐279 Bravman Decl. ¶¶51, 58‐59, 113, 192; ‐279 Bravman Reply Decl. ¶¶26, 30, 32‐35
`
`14
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Anderson’s heater dominates the
`combined thermal mass of the heater and chuck
`
`‐279 Reply at 11‐12
`
`15
`
`‐279 Bravman Reply Decl. ¶35
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Combining Anderson’s low thermal mass
`teaching with Muller/Matsumura
`
`Anderson (Ex. 1011), Fig. 2
`
`Muller (Ex. 1002), Fig. 4
`
`‐279 Petition at 11, 18; ‐279 Bravman Decl. ¶¶113, 170
`
`16
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Combining Anderson with
`Muller/Matsumura
`
`‐279 Reply at 4‐5, 9‐10, 14
`
`17
`
`‐279 Bravman Reply Decl. ¶42
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Thermal mass was a well‐known concept
`
`‐279 Bravman Decl. ¶44
`
`‐279 Petition at 17‐18, 24
`
`18
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Hinman disclosed an example of selecting
`thermal mass to effect temperature changes
`
`‐279 Petition at 33‐34; ‐279 Bravman Decl. ¶124
`
`Hinman (Ex. 1010), 2:52‐3:6
`
`19
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Combining Hinman with
`Muller/Matsumura and Anderson
`
`‐279 Bravman Decl. ¶128
`
`‐279 Petition at 36‐37
`
`20
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Combining Muller, Matsumura, Anderson
`and Hinman
`
`‐279 Petition at 36‐37
`
`21
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Flamm ignores the multi‐temperature
`change teachings of Muller and Matsumura
`
`‐279 Reply at 3‐5, 12
`
`22
`
`‐279 Bravman Reply Decl. ¶54
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Flamm’s physical incorporation arguments
`against Anderson and Hinman are misplaced
`
`‐279 Reply at 9
`
`23
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Hinman is analogous art
`
`In re Paulsen, 30 F.3d 1475,1481 (Fed. Cir. 1994) (hinged
`cabinets and piano lids are analogous to laptop computer
`hinges; the problem at issue was “not unique to portable
`computers.”)
`
`In re ICON Health and Fitness, Inc., 496 F.3d 1374, 1380-
`81 (Fed. Cir. 2007) (folding bed reference was pertinent to a
`folding treadmill because they addressed the same problem;
`“Analogous art to Icon’s application, when considering
`the folding mechanism and gas spring limitation, may come
`from any area describing hinges, springs, latches,
`counterweights, or other similar mechanisms—such as the
`folding bed in Teague.”)
`
`‐279 Reply at 6‐7
`
`24
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Hinman is analogous art—especially
`in view of Anderson
`
`‐279 Institution Decision at 24
`
`25
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Hinman is analogous art
`
`‐279 Bravman Reply Decl. ¶44
`
`‐279 Reply at 5
`
`26
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279, ‐282: Combining Kikuchi’s infrared heat
`lamp (claims 17, 63)
`
`Kikuchi (Ex. 1004), Fig. 1
`
`‐282 Petition at 21, 58‐60, 88‐90; ‐282 Bravman Decl. ¶¶113, 117, 205‐206
`
`Gat (Ex. 1012), Fig. 1
`
`27
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: The law on “teaching away”
`
`A reference that “merely expresses a general preference for
`an alternative invention but does not criticize, discredit, or
`otherwise discourage investigation into” the claimed
`invention does not teach away.
`
`Meiresonne v. Google, Inc., 849 F.3d 1379, 1382 (Fed. Cir. 2017)
`
`The prior art’s mere disclosure of more than one alternative
`does not constitute a teaching away from any of these
`alternatives because such disclosure does not criticize,
`discredit, or otherwise discourage the solution claimed in
`the ’198 application.
`
`In re Fulton, 391 F.3d 1195, 1201 (Fed. Cir. 2004)
`
`28
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Combining Wright’s teachings about substrate
`holder and wafer temperature (claims 19, 20)
`
`‐279 Petition at 14‐15, 46‐47; ‐279 Bravman Decl. ¶¶161, 224
`
`Wright (Ex. 1008) at 321, 324, 326
`
`29
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Combining Wright’s teachings about substrate
`holder and wafer temperature (claims 19, 20)
`
`‐279 Petition at 46‐47, 70‐72; ‐279 Bravman Decl. ¶¶163, 167, 228
`
`30
`
`Wright (Ex. 1008), Fig. 4
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Thermal coupling of the substrate holder and
`wafer in the ’264 patent and Muller (claims 19, 20)
`
`Muller (Ex. 1002), Fig. 4, 4:38‐43
`
`‐279 Petition at 11, 41, 43‐44; ‐279 Bravman Decl. ¶¶170, 219, 311
`
`31
`
`’264 patent (Ex. 1001), Fig. 1, 3:53‐60
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Thermal coupling of the substrate holder and
`wafer in the ’264 patent and Muller (claims 19, 20)
`
`‐279 Petition at 41‐42; ‐279 Bravman Decl. ¶220
`
`‐279 Bravman Decl. ¶219
`
`32
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐279: Thermal coupling of the substrate holder and
`wafer in the ’264 patent and Muller (claims 19, 20)
`
`‐279 Bravman Reply Decl. ¶67
`
`‐279 Reply at 16‐17
`
`33
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`’264 patent, petitions 2 and 3
`IPR2017‐00280, ‐281
`
`Claims 27, 37 and 51 and their dependent claims are obvious
`
`34
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐280, ‐281: Kadomura disclosed a tool for multi‐
`temperature etching
`
`‐280 Petition at 11‐12, 44‐45; ‐280 Bravman Decl. ¶¶65‐66, 117, 149
`
`35
`
`Kadomura (Ex. 1005), Fig. 4
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐280, ‐281: Combining Kadomura and
`Matsumura
`
`Kadomura (Ex. 1005), 6:30‐35, 4:49‐54
`
`‐280 Petition at 29‐30; ‐280 Bravman Decl. ¶¶125, 132
`
`36
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐280, ‐281, ‐282: Combining Kadomura and
`Matsumura
`Flamm’s arguments
`Petitioners’ responses
`
`•
`
`•
`
`Temperature change time in Kadomura is
`irrelevant so long as it is shorter than gas
`exchange time. Dr. Bravman does not
`explain why using Matsumura’s recipes
`would have increased throughput.
`Matsumura’s recipes would have been
`useless for reducing temperature change
`time.
`
`‐280 PO Resp. at 8‐13; ‐281 PO Resp. at 8‐12;
`‐282 PO Resp. at 8‐13
`
`Petitioners’ additional motivations are
`conclusory.
`
`‐280 PO Resp. at 11‐17; ‐281 PO Resp. at 11‐16;
`‐282 PO Resp. at 12‐15
`
`• As explained in the Petition and by Dr.
`Bravman, using Matsumura’s recipe
`approach and programmed temperature
`change times would have ensured those
`times were shorter than gas exchange
`times.
`
`‐280 Reply at 5, 9‐10; ‐281 Reply at 5, 9‐10;
`‐282 Reply at 5, 9‐10
`
`• As explained in the Petition and by Dr.
`Bravman, using recipes would have
`increased control, accuracy, efficiency,
`predictability and reliability. Flamm does
`not substantively address efficiency and
`predictability.
`
`‐280 Reply at 8, 10‐12; ‐281 Reply at 8, 10‐12;
`‐282 Reply at 8, 10‐12
`
`37
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐280, ‐281: Combining Kadomura and
`Matsumura
`
`‐280 Bravman Decl. ¶¶130, 133
`
`‐280 Petition at 33‐34
`
`38
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐280, ‐281: Combining Kadomura and
`Matsumura
`
`‐280 Reply at 8
`
`39
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐280, ‐281: Kikuchi disclosed a multi‐
`temperature etching tool
`
`Kikuchi (Ex. 1004), Fig. 11
`
`‐280 Petition at 16‐18; ‐280 Bravman Decl. ¶¶213‐214
`
`40
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐280, ‐281: Combining Kikuchi and Matsumura
`
`Kikuchi (Ex. 1004), Abstract, 2:40‐44, 8:8‐14
`‐280 Petition at 10, 59‐60; ‐280 Bravman Decl. ¶¶83‐86
`
`41
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐280, ‐281: Combining Kikuchi and Matsumura
`
`‐280 Bravman Decl. ¶¶97, 228
`
`‐280 Petition at 69‐70
`
`42
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐280, ‐281: Kikuchi and Matsumura
`
`Flamm’s arguments
`The references do not teach heating a
`substrate holder to a first temperature.
`‐280 PO Resp. at 19‐20; ‐281 PO Resp. at 17‐19
`
`Petitioners did not cover measured or
`predetermined wafer temperatures or
`change within a preselected time.
`‐280 PO Resp. at 21; ‐281 PO Resp. at 19
`
`Petitioners did not provide any
`motivations to combine.
`‐280 PO Resp. at 21; ‐281 PO Resp. at 19‐20
`
`•
`
`•
`
`•
`
`•
`
`Petitioners’ responses
`Flamm does not address replacing
`Kikuchi’s hot plate with Matsumura’s
`heating/cooling stage.
`‐280 Reply at 18, 22; ‐281 Reply at 18, 21‐22
`• Claims 27, 37 and 51 don’t have
`Flamm’s fictitious requirements.
`‐280 Reply at 19; ‐281 Reply at 19‐20
`
`•
`
`•
`
`Kikuchi uses predetermined wafer
`temperatures and changes in 5 or 10
`seconds. Matsumura’s recipes change
`within a preselected time.
`‐280 Reply at 17‐21; ‐281 Reply at 17‐21
`
`Petitioners identified increased
`throughput, control, accuracy, efficiency,
`predictability and reliability.
`‐280 Reply at 21‐22; ‐281 Reply at 21‐22
`
`43
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐280, ‐281: Combining Kikuchi and Matsumura
`
`‐280 Bravman Decl. ¶95
`
`‐280 Petition at 61‐62
`
`44
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
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`
`
`‐280, ‐281: Combining Kikuchi and Matsumura
`
`‐280 Reply at 21‐22
`
`45
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`’264 patent, petition 4
`IPR2017‐00282
`
`Claims 56 and 60 and their dependent claims are obvious
`
`46
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
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`
`
`‐282: Combining Muller, Matsumura and Wang
`
`‐282 Reply at 21
`
`47
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`’264 patent, petitions 1‐4
`IPR2017‐00279, ‐280, ‐281, ‐282
`
`Flamm’s failure to contest dependent claims
`
`48
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`Flamm does not separately contest 44 of the 53
`dependent claims
`
`’264 dependent claims
`
`Citation
`
`14, 16, 18, 21‐26, 64‐65
`
`‐279 PO Resp. at 20‐28; ‐279 Reply at 21‐22
`
`28‐32, 34‐36, 52‐55, 66, 68‐69
`
`‐280 PO Resp. at 22‐23; ‐280 Reply at 23
`
`38‐46, 49‐50, 67
`
`58‐59, 61‐62, 70‐71
`
`‐281 PO Resp. at 22‐23; ‐281 Reply at 25‐26
`
`‐282 PO Resp. at 20‐22; ‐282 Reply at 22
`
`49
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`Flamm does not separately contest 44 dependent
`claims in the ’264 patent
`
`Independent claims
`
`13 14 15 16 17 18 19 20
`21 22 23 24 25 26 27 28
`29 30 31 32 33 34 35 36
`37 38 39 40 41 42 43 44
`45 46 47 48 49 50 51 52
`53 54 55 56 57 58 59 60
`61 62 63 64 65 66 67 68
`69 70 71
`
`50
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`For dependent claims 15, 19‐20 and 57, Flamm
`contests one but not both of Petitioners’ grounds
`
`’264
`claims
`
`Uncontested
`ground
`
`Contested
`ground
`
`Citation
`
`15
`
`19‐20
`
`57
`
`Muller as primary
`reference
`
`Kadomura as primary
`reference
`
`‐279 PO Resp. at 20‐27; ‐279
`Reply at 21‐22
`
`Kadomura as
`primary reference
`
`Muller as primary
`reference
`
`‐279 PO Resp. at 20‐27; ‐279
`Reply at 21‐22
`
`Muller as primary
`reference
`
`Kadomura as primary
`reference
`
`‐282 PO Resp. at 20‐22; ‐282
`Reply at 22
`
`51
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`Flamm contests claims 33, 47 and 48 without
`addressing the merits
`
`’264 claims
`
`Citation (and argument)
`
`33
`
`47, 48
`
`‐279 PO Resp. at 27 (urges claim limitation, “remote
`plasma,” which does not exist); ‐279 Reply at 21
`
`‐281 PO Resp. at 21‐23 (no substantive argument); ‐281
`Reply at 22‐26
`
`52
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`Flamm contests dependent claims 17 and 63 but
`ignores Petitioners’ proposed motivations
`
`’264 claims
`17
`
`Citation
`
`‐279 PO Resp. at 23‐25; ‐279 Reply at 14‐16, 20
`
`63
`
`‐282 PO Resp. at 21‐22; ‐282 Reply at 18‐22
`
`53
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`’264 patent
`
`Independent claim language
`
`54
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
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`
`
`Independent Claim 13
`
`13. A method of etching a substrate in the manufacture of a device, the method comprising
`placing a substrate having a film thereon on a substrate holder in a chamber, the substrate
`holder having a selected thermal mass;
`setting the substrate holder to a selected first substrate holder temperature with a heat
`transfer device;
`etching a first portion of the film while the substrate holder is at the selected first substrate
`holder temperature;
`with the heat transfer device, changing the substrate holder temperature from the
`selected first substrate holder temperature to a selected second substrate holder
`temperature; and
`etching a second portion of the film while the substrate holder is at the selected second
`substrate holder temperature;
`wherein the thermal mass of the substrate holder is selected for a predetermined
`temperature change within a specific interval of time during processing; the
`predetermined temperature change comprises the change from the selected first substrate
`holder temperature to the selected second substrate holder temperature, and the
`specified time interval comprises the time for changing from the selected first substrate
`holder temperature to the selected second substrate holder temperature.
`
`55
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`Independent Claim 27
`
`27. A method of etching a substrate in the manufacture of a device, the method
`comprising:
`heating a substrate holder to a first substrate holder temperature with a heat transfer
`device, the substrate holder having at least one temperature sensing unit,
`placing a substrate having a film thereon on the substrate holder in a chamber;
`etching a first portion of the film at a selected first substrate temperature; and
`etching a second portion of the film at a selected second substrate temperature, the
`selected second substrate temperature being different from the selected first
`substrate temperature;
`wherein substrate temperature is changed from the selected first substrate
`temperature to the selected second substrate temperature, using a measured
`substrate temperature, within a preselected time interval for processing, and at least
`the first substrate temperature or the second substrate temperature, in single or in
`combination, is above room temperature.
`
`56
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`Independent Claim 37
`
`37. A method of processing a substrate during the manufacture of a device, the method comprising:
`placing a substrate having a film thereon on a substrate holder within a chamber of a plasma
`discharge apparatus, the plasma discharge apparatus comprising: a substrate temperature control
`system comprising a substrate temperature sensor and a substrate temperature control circuit
`operable to adjust the substrate temperature to a predetermined substrate temperature value with a
`first heat transfer process; and a substrate holder temperature control system comprising a substrate
`holder temperature sensor and a substrate holder temperature control circuit operable to adjust the
`substrate holder temperature to a predetermined substrate holder temperature value with a second
`heat transfer process;
`performing a first film treatment of a first portion of the film at a selected first substrate temperature;
`with the substrate temperature control circuit, changing from the selected first substrate temperature
`to a selected second substrate temperature, the selected second substrate temperature being
`different from the selected first substrate temperature; and
`performing a second film treatment of a second portion of the film at the selected second substrate
`temperature;
`wherein the substrate holder is heated above room temperature during at least one of the first or the
`second film treatments, and the substrate temperature control circuit is operable to change the
`substrate temperature from the selected first substrate temperature to the selected second substrate
`temperature within a preselected time period to process the film.
`
`57
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`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
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`
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`Independent Claim 51
`
`51. A method of processing a substrate in the manufacture of a device, the method comprising
`placing a substrate having a film thereon on a substrate holder in a processing chamber; the
`processing chamber comprising the substrate holder, a substrate control circuit operable to
`adjust the substrate temperature, a substrate holder temperature sensor, and a substrate
`holder control circuit operable to maintain the substrate holder temperature;
`
`performing a first etching of a first portion of the film at a selected first substrate temperature;
`
`performing a second etching of a second portion of the film at a selected second substrate
`temperature, the second temperature being different from the first temperature;
`wherein at least one of the film portions is etched while heat is being transferred to the
`substrate holder with the substrate holder control circuit; and
`the substrate temperature control circuit effectuates the change from the first substrate
`temperature to the second substrate temperature within a preselected time period.
`
`58
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`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
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`
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`Independent Claim 56
`
`56. A method for processing layers which are included in a stack of
`layers positioned on a substrate, the method comprising:
`placing the substrate on a substrate holder;
`
`sensing a substrate holder temperature,
`etching at least a portion of a first silicon‐containing layer in a chamber while the
`substrate is maintained at a selected first substrate temperature; and
`etching at least a portion of a second silicon‐containing layer in the chamber while the
`substrate is maintained at a selected second substrate temperature;
`
`wherein the substrate holder is heated to a temperature operable to maintain at least
`one of the selected first and the selected second substrate temperatures above 49° C.,
`and
`the substrate temperature is changed from the first substrate temperature to the second
`substrate temperature with a control circuit operable to effectuate the changing within a
`preselected time period that is less than the overall process time associated with the
`etching the first silicon‐containing layer and the second silicon containing layer.
`
`59
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`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
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`
`
`Independent Claim 60
`
`60. A method for manufacturing a device comprising an integrated circuit, the method
`comprising:
`transferring a substrate comprising a stack of layers including a silicide layer into a
`chamber, the chamber comprising a substrate holder;
`sensing the substrate holder temperature;
`heating the substrate holder with a substrate holder control circuit and a heating device
`to maintain the substrate holder at a temperature that is operable to effectuate a
`substrate temperature above room temperature while processing the substrate;
`processing the substrate on the substrate holder at a first substrate temperature; and
`processing the substrate on the substrate holder at a second substrate temperature to
`etch at least a portion of the silicide layer;
`wherein the first substrate temperature is different from the second substrate
`temperature and the first substrate temperature is changed to the second substrate
`temperature with a substrate temperature control circuit within a preselected time to
`etch the silicide layer.
`
`60
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`Additional Support
`’264 patent, petition 3
`IPR2017‐00281
`
`Claims 37, 47 and 48 are obvious
`
`61
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`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
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`
`
`‐281: Moslehi ’824 disclosed a tool for plasma‐
`enhanced deposition and etching
`
`Moslehi ’824 (Ex. 1010), 10:34‐39
`
`‐281 Petition at 81‐83, 93; ‐281 Bravman Decl. ¶¶115, 132, 279, 300
`
`62
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`Intel v. Flamm, IPR2017-00279
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`
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`‐281: Moslehi ’824 disclosed a tool for plasma‐
`enhanced deposition and etching
`
`‐281 Petition at 20‐21, 81‐83, 85‐86; ‐281 Bravman Decl. ¶¶115‐117, 282‐283
`
`63
`
`Moslehi ’824 (Ex. 1010), Fig. 3
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐281: Oka disclosed a recipe for a multi‐
`temperature plasma deposition process
`
`‐281 Petition at 23, 82, 87‐89; ‐281 Bravman Decl. ¶¶126‐127, 278, 285
`
`64
`
`Oka (Ex. 1011), 20:28‐34, 20:52‐56, 23:52‐55
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`‐281: Combining Moslehi ’824 and Oka
`
`‐281 Petition at 82‐83
`
`‐281 Bravman Decl. ¶¶132‐133
`
`65
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`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
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`
`
`‐281: Combining Moslehi ’824 and Oka
`
`‐281 Bravman Decl. ¶133
`
`‐281 Petition at 89
`
`66
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`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
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`
`
`‐281: Combining Moslehi ’824 and Oka
`
`‐281 Bravman Reply Decl. ¶65
`
`‐281 Reply at 23‐24
`
`67
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`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
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`
`
`Flamm’s Declarations
`
`68
`
`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
`
`
`
`PO’s “declarations” should be given no weight
`
`• Dr. Flamm has a personal interest in the outcome of these proceedings.
`Curt G. Joa, Inc. v. Fameccanica.Data S.p.A., IPR2016‐00906, Paper 79 at 2 n.1 (Oct. 11, 2017);
`‐279 Reply at 22; ‐280 Reply at 23‐24; ‐281 Reply at 26; ‐282 Reply at 22‐23
`
`•
`
`•
`
`•
`
`Each “declaration” fails to establish the basis of Dr. Flamm’s opinions.
`‐279 Reply at 23; ‐280 Reply at 24; ‐281 Reply at 26‐27; ‐282 Reply at 23‐24
`
`Each “declaration” parrots attorney arguments provided in the Patent Owner Response.
`‐279 Reply at 23‐24; ‐280 Reply at 24‐25; ‐281 Reply at 27‐28; ‐282 Reply at 24
`
`Each “declaration” is incomplete and leaves much of Dr. Bravman’s testimony unrebutted.
`‐279 Reply at 24; ‐280 Reply at 25; ‐281 Reply at 28; ‐282 Reply at 24‐25
`
`69
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`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
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`
`
`“Declarations” parrot attorney arguments
`
`‐281 PO Response
`
`‐281 Flamm Decl.
`
`‐281 PO Resp. at 16‐17
`
`‐281 Flamm Decl. ¶14
`
`See also, e.g., ‐279 PO Resp. at 5‐6; ‐279 Flamm Decl. ¶8; ‐280 PO Resp. at 18‐19; ‐280 Flamm Decl. ¶14; ‐282 PO Resp. at 6‐8; ‐282 Flamm Decl. ¶12
`
`70
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`Intel, Exhibit 1033
`Intel v. Flamm, IPR2017-00279
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`