`
`1530/IEC 8802-3 1 1993
`ANSUIEEE Std 802.3. 1993 Edition
`
`7.4 Electrical Characteristics. Terms BR and BRJ2 have very specific meaning as used in this
`subsection. The term BR is used to mean the bit rate of the highest signaling rate supported by any one
`implementation of this interface, BR/2 is used to mean half the bit rate of the lowest signaling rate
`supported by any one implementation of this interface (see 7.3.2}. An interface may support one or more
`signaling rates.
`NOTE: The characteristics of the driver and receiver can be achieved with standard ECL logic with the addition of an app!‘opi'iar.o
`coupling network; however, this implementation is not mandatory.
`
`7.4.] Driver Characteristics. The driver is a differential driver capable of driving the specified 78 9
`interface cable. Only the parameters necessary to ensure compatibility with the specified receiver and to
`assure personnel safety at the interface connector are specified in the following sections.
`
`7.4.1.1 Differential Output Voltage, Loaded. Drivers shall meet all requirements of this section
`under two basic sets of test conditions (that is, each of two resistive values). For drivers located within a
`DTE, a combined inductive load of 27 pH i 1% and either a 73 or 83 E2 :t 1% resistive load shall be used. For
`a driver located within a MAU, a combined inductive load of 50 pH 1- 1% and either 73 or 83 Q i 1% resis-
`tive load shall be used.
`
`The differential output voltage, Vdm, is alternately positive and negative in magnitude with respect to
`zero voltage. The value ofVd,,., into either of the two test loads identified above (R = 73 D. or 83 Q :t 1%) at
`the interface connector of the driving unit shall satisfy the conditions defined by values V1, V2, and V3
`shown in Fig 7-11 for signals in between BR and BR./2 meeting the frequency and duty cycle tolerances
`specified for the signal being driven. The procedure for measuring and applying the test condition is as
`follows:
`
`(1) Measure the output voltage Vdm for the driver being tested at the waveform point after overshoot,
`before droop, under test load conditions of 7.4.1.]. This voltage is V3.
`(2) Calculate V1 and V3.
`(3) V1 shall be -1 1315 inV, V3 shall be > 450 111V.
`(41 The waveform shall remain within shaded area limits.
`
`The differential output voltage magnitude, Vdm, into either of the two test loads identified above, at the
`interface connector of the driving unit during the idle state shall be within 40 mV ofO V. The current into
`either of the two test loads shall be limited to 4 mA.
`When a driver, connected to the appropriate two test loads identified above, enters the idle state, it shall
`maintain a minimum differential output voltage of at least 0.7 >< V2 mV for at least 2 bit times after the last
`low to high transition. The driver differential output voltage shall then approach within 40 mV of 0 V
`within 80 bit times. In addition, the current into the appropriate test load shall be limited in magnitude to
`4 mA within 80 bit times. Undershoot, if any, upon reaching 0 V shall be limited to -100 mV. See Fig 7-12.
`For drivers on either the CO or Cl circuits, the first transition or the last positive going transition may
`occur asynchronously with respect to the timing of the following transitions or the preceding transition(s),
`respectively.
`
`7.4.1.2 Requirements After Idle. When the driver becomes nonidle after a period of idle on the inter-
`face circuit, the differential output voltage at the interface connector shall meet the requirements of 7.4.1.1
`beginning with the first bit transmitted. The first transition may occur asynchronously with respect to the
`timing of the following transitions.
`
`7.4.1.3 AC Common-Mode Output Voltage. The magnitude of the ac component of the common-
`mode output voltage of the driver, measured between the midpoint of a test load consisting of a pair of
`matched 39 Q i 1% resistors and circuit VC, as shown in Fig 7-13, shall not exceed 40 mV peak.
`
`7.4.1.4 Differential Output Voltage, Open Circuit. The differential output voltage into an open cir-
`cuit, measured at the interface connector of the driving unit, shall not exceed 13 V peak.
`
`7.4.1.5 DC Common-Mode Output Voltage. The magnitude of the dc component of the common-
`mode output voltage of the driver, measured between the midpoint of a test load consisting of a pair of
`matched 39 Q i 1% resistors and circuit VC, as shown in Fig 7-13, shall not exceed 5.5 V.
`
`103
`
`Aerohive - E
`
`Aerohive - Exhibit 1026
`0103
`
`
`
`ES(L'[F1(: 8802-3 : 1993
`:\.\'.9lfIl~‘.l~.‘l-‘. Hm Rn? 3 19.CI.':14:4+'.1inn
`
`I
`I.ni'..u . awn MI-"I‘IH‘|I"I'l| mm’: AR}-‘A \:i."ru.rrwi:~:
`
`KNDMINAIJ
`
`I: 3 5 HS AT 1-10 MHZ DATA RATES
`
`V2 = D . 89 V1
`
`V3=D.fl2V2
`
`Fl AND L VALUES PER 7.4.1.1
`
`TEST LOAD
`
`NOTE: The time 1 in this ilgure refers to the rise time envelope. Jitter and duty cycle are specified elsewhere
`
`F1'g 7-11
`Differential Output Voltage, Loaded
`
`7.4.1.6 Fault Tolerance. Any single driver in the interface. when idle or driving any permissible Sig;
`nal, shall tolerate the application of each of the faults specified by the switch settings in Fig 7-14 indefi-
`nitely; and after the fault condition is removed, the operation oftlie driver, a.cuoi'di11g to the specifications of
`7.4-.1,1 through 7.4.1.5, shall not be impaired.
`In addition, the magnitude of the output current from either output of the driver under any of the fault
`conditions specified shall not exceed 150 mA.
`
`7.4.2 Receiver Characteristics. The receiver specified terminates the interface cable in its ch.:n--.icter-
`ietic imped-once. The receiver shall function normally over the specified dc and ac common-mode ranges.
`
`104
`
`Aerohive - E
`
`Aerohive - Exhibit 1026
`0104
`
`
`
`7:
`
`200 ns MINIMUM
`30 ET TIMES MAXIMUM
`~r1C|0 mV MAXTMUM UNDERSHOOT
`STEADY STATE CF‘r“.3El'
`INTO SPECIFIED TEST LOAD
`+/— 40 mv MAX
`+/— 4 111.! MAX
`Rwcwc SHALL BE <2OU rnv Pr-<—Pp<
`
`AFTEF-1 "F1 AND BEFORE T2
`
`Fig 7-12
`Generalized Driver Waveform
`
`R1= H2=39I1j:‘1%
`
`Fig 7-13
`Common-Mode Output Voltage
`
`ISOHEC B802-3 . 1993
`FKNSUIEEIL Sui EH2 3. T993Ed'1tinn
`
`Aerohive - E
`
`Aerohive - Exhibit 1026
`0105
`
`
`
`lS(l:"lEC B382-3 '_ 1993
`ANSMEEE Std E.D2.E.. ‘I993 Edition
`
`l.'UCALAND METROPOLITAN AREA NETWURICS:
`
`FHULT
`CONDITION
`'|
`
`SWITCH SEITINGS
`LEAD A
`LEAD 3
`
`I 6 VOLTS
`
`Fig 7.14
`Driver Fault Conditions
`
`7.4.2.1 Receiver Threshold Levels. When the receiving interface circuit at the interface eormector of
`the reeeiving equipment is driven by a differential input signal at either ER 01' B11"? meeting the frequency
`and duty cycle tolcra ncas specified for the reeeiving circuit, when the A lead is 160 m‘-.7 positive with respect.
`to the E lead, the interface circuit is in the HI state, and when thcfllead is 160 mV negative with respect
`to the B lead, the interface circuit is in the L0 state. The tmiver nutput shall assume the intended HI and
`LG states for the corresponding input I:ond.it'iens.
`If the receiver has a squelch feature, the specified receive threshold levels apply -only when the squelch is
`allowing the signal to pass through the receiver.
`
`NOTE: The specified t.'b_1'e5I1o],d levels do not take precedence over the duty cycle and jitter tolerance specified 1.:l.-_-mwhure, Both sets of
`specifications must he met.
`
`7.4.2.2 AC Differential Input Impedance. The ac difliwontial input impedance for AU} receivers
`located in M..r‘iUs shall have a real part of 77.83 D. i 5%, with the sign Elf the imaginary part positive, and
`the phase angle of‘ the impedance in degrees less than or equal to 0.0338 times the real part ofthe imped-
`ance, when measured with a 10 MHz sine wave.
`The ac difierential input impedance for AUI receivers located in the DTE shall have a real. part of
`'I"i'.E|5 {I :l: 6%, with the sign of the imaginary part positive, and the phase angle ofthe impedance in degrees
`lfis than or equal to CI.C|1B3 times the real part of the impedance, when measured with a 10 MHz sine
`wave.
`
`A TE. £1 :I: 6% resistor in parallel with an inductance of greater than 2‘? _I.LH or 50 p.H for receivers in the
`MAU and DTE respectively; satisfies this requirement.
`
`7.4.2.3 AC Common-Mode Range. When the receiving interface circuit at the receiving equipment is
`driven by a differential input signal at either ER or BRI2 meeting the frequency and duty cycle tolerances
`specified For the circuit being driven, the receiver output shall assume the proper output state as specified
`in 7.4.2.1, in the presence ofa peak em-nrnon-mode ac sine wave voltage either offrorn 30 Hz. to 40 kHz ref-
`erenced to circuit VG in magnitude from 0 to 3 V, -or in magnitude 0 to 100' mV for ac voltages of from
`40 l<I-Iz to ER as shown in Fig 7-15.
`NOTE; The receiver shall also be able to Ieject small at: eommon—mede signals in fi'equencicFI outside ofthis range.
`
`7.4.2.4 '[‘u-ta] Cflmmon-Mode Raxuge. ‘When the receiving interface circuit at the receiving equipment
`is driven by a difi"erentia.l input signal at either ER or ]3F.u“2 meeting the frequency and duty cycle toler-
`ances specified for the circuit being driven, the receiver output shall assume the intended output state as
`Specified in 7.4.2.1 in the presence ofa total common-made Voltage, dc plus ac, referenced to circuit VT] in
`magnitude from [I to 5.5 V, as shown in the test setup of Fig 'i'—15. The ac component shall not exceed the
`requirements of 7.4.2.3.
`
`Aerohive - Exhibit 1026
`0106
`
`
`
`CSMAICD
`
`ISOHEC 88022.} : 1993
`A.‘~..'.C:TITF‘|7‘.E ‘F!-.1 302.3, 1993 Edition
`
`a,'2 VIN w
`_/
`
`Fig 7-15
`Common-Mode Input Test
`
`The receiver shall be so designed that the magnitude of the current from the common-mode voltage
`source used in the test shall not exceed 1 mA.
`
`7.4.2.5 Idle Input Behavior. When the receiver becomes nonidle after a period ofidle on the interface
`circuit, the characteristics of the signal at the output of the receiver shall stabilize within the startup delay
`allowed for the device incorporating the receiver so that it is not prevented from meeting the jitter specifi-
`cations established for that device.
`
`The receiving unit shall take precautions to ensure that a H] to idle transition is not falsely interpreted
`as an idle to nonidle transition, even in the presence of signal droop due to ac coupling in the interface
`driver or receiver circuits.
`
`7.4.2.6 Fault Tolerance. Any single receiver in the interface shall tolerate the application ofeach of
`the faults specified by the switch Settings in Fig 7-16 indefinitely, and alter the fault condition is removed,
`the operation of the receiver according to the specifications of 7.4.2.1 through 7.4.2.6 shall not be impaired.
`In addition, the magnitude of the current into either input of the receiver under any of the fault COI1di-
`tions specified shall not exceed 3 mA.
`
`SWITCH SETTINGS
`FAULT
`CONDITION LEAD A
`LEAD B
`I
`‘I
`1
`
`1 6 VOLTS
`
`Fig '7-16
`Receiver Fault Conditions
`
`Aerohive - E
`
`Aerohive - Exhibit 1026
`0107
`
`
`
`ISOIIEC B!il]2—3 : 1993
`ANSLFIEEE Std 802.3, 1993 Edition
`
`LOGALAND METROPDIJTAN AREA NETWORKS:
`
`7.4.3 AUI Cable Characteristics. The interface cable consists of individualljr shielded twisted pairs of
`wires with an overall shield covering these individual shicldcd wire pairs. These shields must provide suf-
`ficient shielding to meet the requirements of protection against rf interference and the following cable
`parameters. Individual shields For each signal pair are electrically isolated from the outer shield but not
`necessarily from each other.
`_
`The overall shield shall be returned to the l'.I-[AU and DTE Units via theAUI connector shell as defined in
`7.6.2 and 16.3. If a common drain wire is used for all the signal pair shields, then it shall be connected to
`pin 4. Individual drain wire returns for each signal pair may be used (see 'F.E.3). It is recommended that
`individual drain wires be used on all control and data circuit shields to meet satisfactory crosstalk levels. If
`individual drain wires are used, they shall be interconnected within theAUI cable at each end and shall be
`cc-nnected at least to pin 4 at each end ofthe cable.
`The presence of the Control Out signal pair is optional. If driver or receiver circuit components for C0
`are not provided, consideration should be given to properly terminating the C0 signal pair within the DTE
`and MAU to preclude erroneous operation.
`
`7.4.3.1 Conductor Size. The dc power pair in the interconnecting cable, voltage common and voltage
`mimic, shall he composed of a twisted pair of suficient gauge stranded wires to result in a nominal dc
`resistance not. to exceed 1.75 Q per conductor.
`Conductor size for the signal pairs shall hc determined awarding to the ac related parameters in '3'.-1.3.2-
`7.4.3.5.
`
`'3'.-1.8.2 Pair-to-Pair Balanced Crosstalk. The balanced crosstalkfrom one pair ofwires to any other
`pair in the same cable sheath (when each pair is driven per ’l'.4.1.1—'."'.4.1.5) shall have a minimum value of
`40 dB of attenuation measured over the range of BRI2 to ER.
`
`7.4.3.3 Differential Characteristic Impedance. The differential characteristic impedance for all
`signal pairs Shall be equal Witlfin 3 E1 and shall be 78 i 5 fl measured at a frequency of ER.
`
`7.4.3.4 'Transfer Impedance
`
`(1) The common-mode transfer impedance shall not exceed the values shown in Fig T"-1'7 over the indi-
`cated frequency range,
`(2) The diiferential mode transfer impedance for all pairs shll be at least 20 dB below the common-
`mode transfer impedance.
`
`14.3.5 Attenuation. Total cable attenuation levels between driver and receiver (at separate stations]
`for each signal pair shall not exceed 3 dB over the Frequency range of BRIE to ER {Hz} for sinewave mea-
`surements.
`
`7.4.3.6 Timing Jitter. Cable meeting this specificatiori shall exhibit edge jitter cfuo more than 1.5 ns
`at the receiving end when the longest legal length orthc cable as specified in ?.4.3.1 through 14.3.? is ter-
`minated in El 73 51 it 1% resistor at the receiving end and is driven with pseudcrandcm Manchester encoded
`binary data from a data generator which exhibits no more than 0.5 ns of
`jitter on half bit cells of
`exactly U2 BT and whose output meets the specifications oi"i'.4.1.1 through ‘i'.4.1.E. This test shall be con-
`ducted in a noise-free environment. The above specified component is not to int.-reduce more than 1 115 of
`edge jitter into the system.
`
`NOTE: Special attention will have to he applied lac the cable characteristics and length at EU Mbfa
`
`'i'.4.3."." Delay. 'I'bta.l signal delay between driver and receiver [at separate stations} for each signal pair
`ahall not exceed 257 ns.
`
`7.5 Fllnctlonal Description of Interchange Circuits
`
`7-5-1 General. The AUI consists of either three or four dififercntlal signal circuits, power, a_nd_gmund_
`Two of the circuits carry encoded data and two carry encoded control information. Circuits DD (Data Out)
`and C0 {Control Out) are sourced by the DTE, and circuits [)1 (Data In} and GI (Control In] are sourced by
`
`108
`
`Aerohive - Exhibit 1026
`0108
`
`
`
`(‘.5-‘.MAr(‘.D
`
`IHOIIEC S802-3 - 1993
`A\'Ql:'llu‘F‘Ic‘ om any-3: 1993 Edition
`
`|i||
`||||
`llll
`!!|l IIIIII Ilggl
`IIIJI
`.l||||_2--Jllll-Tl
`I'll!-2:: “DIE IN"
`I I!
`IIIPJI
`jj Iu
`Illl
`I‘--Illlllz-Illllll
`Illlllulllumniluuu
`-lnluu-Iunmuu-unuuunuinn
`III|||||IIII|ll||IIII||ll|IIII|||ll
`
`Illllllll Illlll
`
`M
`
`FREQUENCY r_H:'}
`
`Fig 7.17
`Common-Mode Transfer Impedance
`
`the MAU. The interface also provides for power transfer from the DTE to the MALI. The CO circuit is
`optional.
`
`7.5.2 Definition of Interchange Circuits. The following circuits are defined by this specification:
`
`Name
`Circuit
`-1? Data Out
`DI
`Data In
`
`Signal Direction
`
`to MAU EEAHIIJ
`X
`
`CO
`
`G]
`
`VP
`
`VC
`PG
`
`Control Out
`
`Control In
`
`Voltage Plus
`
`Voltage Common
`Protective Ground
`
`X
`X
`
`Remarks
`Encoded Data
`Encoded Data
`
`Encoded Control
`
`Encoded Control
`
`12 Volts
`
`Return for VP
`Shield
`
`7.5.2.1 Circuit DO—Data Out. The Data Out (DO) circuit is sourced by the DTE. It is a differential
`pair consisting of DO—A (Data Out circuit A) and DO-B (Data Out circuit B).
`
`The signal transferred over this circuit is Manchester encoded. An output message containing a one bit is
`encoded as CD]. An ourput_idZe message is encoded as an IDL.
`The following symmetry requirements shall be met when the DTE transfers pseudo-random Manchester
`encoded binary data over a DO circuit loaded by the test load specified in 7.4.1.1.
`Bit cells generated internal to the DTE are required to be 1 BT within the permitted tolerance on data
`rate specified in 7.3.2. Half bit cells in each data bit are the be exactly 1/2 BT [that is, the reference point
`for edge jitter measurements) within the permitted tolerance on the data rate specified in 7.32. Each tran-
`sition on the DO circuit is permitted to exhibit edgejitter not to exceed 0.5 us in each direction. This means
`that any transition may occur up to 0.5 ns earlier or later than this transition would have occurred had no
`edge jitter occurred on this signal.
`
`Aerohive - Exhibit 1026
`0109
`
`
`
`ISOIIEC B302-3 : 1993
`ANSIFIEEE Std 302.8, 199:! Edition
`
`LOCAL AND ll-[E-"I'R'UPC|LITAN AREA NETWVURES:
`
`7.5.2.2 Circuit I)I—Dat.o In. The Data In (DI) circuit is sourced by the MAU. It is a diiierential pair
`consisting o'fDI-A (Data In circuit A} and DI—B {Data In circuit B}.
`The signal transferred over this circuit is Manchester encoded. An input message containing a zero bit is
`encoded as CDO. An input message containing 3. one bit is encoded as CD1. An in-.pu.t_.id.ie message is
`encoded as an IDL.
`
`A DTE meeting this specification shall be able to receive, on the DI circuit without a detectable FCS
`error, normal preamble data arranged in legal length packets as sent by another station to the DTE. The
`test generator for the data on the DI circuit shall meet the requirements for drivers in MAUs specified in
`7.4.1.1 through 7.4.1.5 and shall drive the DI circuit through a zero length AUI cable. Random amounts of
`edge jitter from D to 12 ns on either side of each transition shall he added by the test generator to transi-
`tions in bits in the preamble, and random amounts of edge jitter of from 0 to 18 ns on either side of each
`transition shall be added to the transitionsin all bits in the frame. Preamble length from the test generator
`shall be 4'? bits of preamble, followed by the 8 bit SFIJ.
`
`NOTE: A significant portion ofthe systemjitter may be nonrandom in nature and consists ofa steady-state shilt oftho midbit. transi-
`tions in eaitllsr direction Frrnn tJ1uir nominal plfi.uam.ant_ A 15.5 no edge jitter is expected an the t.rans'mitted signal at, the receiving
`UTE. worst case. The difference between 16.5 nsand 1E! osjitter represents receiver design margin.
`
`7.5.2.3 Circuit C0-Control Out (Optional). The Control Out (CC!) circuit is sourced by the DTE, It
`is a differential pair consisting of CUHA (Control Uut circuit All and COHB (Control Clut circuit B).
`
`The Signal transferred over this circuit is encoded as described in 7.3.1.2. A mdu_mq.-Jest message is en-
`coded as CS1. A normal message is encoded as IDL, An ilsolote message is encoded as CSO.
`
`7.5.2.4 Circuit CI—Contral In. The Control In (CI) circuit is sourced by the MAU_ It is a differential
`pair consisting of CI-A (Control In ci.rcuitA) and CI-B {Control In circu:it B}.
`
`The signal transferred over this circuit is encoded as described in '?.3.1.2. A moujooiiooie message is en-
`coded as IDL. A .omu__n.ot__uooiiobie message is encoded as CS1. A signol_qu.olity_error message is encoded
`as a C80.
`
`15.2.5 Circuit VP—Voltage Plus. The Voltage Plus (VP) circuit is an optional circuit that may be
`sourced from the DTE. lfthis circuit is sourced fi'om the DTE it shall he capable of operating at one fixed
`level between + 1.2 V dc — 6% and + 15 V dc + 5% with respect to circuit V0 for all currents from 0 to
`530 EA. The source shall provide protection for this circuit against an overload condition. The method of
`overload protection is not specified; however, under no conditions of operation, either normal or overload,
`shall the source apply a voltage to c:i:rcuitVP ofless than D or greater than + 15.75 Vdc as specified above.
`MAU designers are cautioned that protection means employed by power sources may cause the voltage at
`signal V? to drop below the minimum operatiocnal voltage specified without going completely to zero volts
`when loads drawing in excess of the current supplied are applied betweorl VP and VC.Adequ ate provisions
`shall be made to ensure that such a condition does not cause the MAU to disrupt the medium.
`lfthe DTE does not support circuitVF; it shall have no connection to this circuit.
`
`7.5.2.3 Circuit ‘W3-Voltage Gammon. Circuit V0 is the ground return to the power source for circuit
`VP. Capable of sinking 2.035.. Also, all common-mode terminators for AUI circuits shall be made to circuit
`VIC.
`
`7-5.2-'7 Circuit PG~—P1'ot«ective Ground. Circuit PG shall be connected to chassis ground through a
`maximum dc resistance of 20 ml]. at the DTE end,
`
`7-533 Circuit Shield Tlermiuatione. Individual pin terminations shall meet the following require-
`ments:
`
`(1) Pins 1, 4, 8-, 11, 14 connected to logic ground in the DTE
`(23
`Pl-TIE 1. 4. 3. 11, 14 capacitively eoupledto V-U in MAU
`(3)
`Impedance to ground 4: 5 Q at the lowest operational BRIE in the ll-[AU and at. the highest BE in the
`DTE
`
`Aerohive - Exhibit 1026
`0110
`
`
`
`r:.=:;«:,u:|n
`
`?'.E Mechanics} CI:I.1r1ct.erim'ics
`
`I:-.'I ull-‘.1. 9.81-2-3: 199.:
`n.*-.'.=:1.e1.r-::'-:.r-: :-15.1 ml‘? .5
`:9-.a.+ 34.21;;
`
`.:1 7 IF 2 '1'.-1:: DTE
`'-".fl.l Definition of Prlachlnicll Inlerfnul. .-‘all ct-l‘I.lIF.‘-'.'Ex'-TS used flzal be as: .-.:p-E.--Lifi-«:
`shall liflvn 11
`|'t.-male I:DI'.noctc-r and the MAI.-' sthnli I1.u'¢ H malt‘ -:ImI'.-ztc‘-.Gr. T'l'.I: Mal‘ may III’:
`|.}ILlfl'R|l"d tiLrect|j.'
`mto the UTE nr niny be connected by one ur murr I‘r1h|r: at-=_=g-men‘-.':.I w111:I5e total Irngth Is. IuH.I'- than or :_-qual tr;
`5“ 111. All cable segments shall have a male cnnnmitor un -'me and and a female ::r.-nnu.:u..1.rJr nn the other end.
`All fiimale wllllcctors shall have the slide lurch. land all male connectors shall have the |r):'kuw paste L35
`defined Ln |-'ig'H ‘I-13. '?-19, and 7-20] :19.-1 the m1.I.1ILtiI.'m ayulcm.
`
`'7.II'}.2 Lima Iljturfnue Connector. A 15-[lulu u-.:mImr1.ur Itaving the mechanir.-nl n'm1_;un'|:|iIit.y riimem-3iu11H as
`H]‘Ie-'.'ifit*.-'1 in IEC 80?-2 I7] with gold-plated I.'Iml.n:'l.u aahull he used for the line int:-.rI':1:.u; cnnm-¢:|.nr. The shells
`-of t.|1.r.':i-i! t'tInnE!t:tunI shall he tin plated tn |.=1'lhl.lf‘|.! the 1nt.E-|;{rit_v offhe cable Eh.iu.=-Id 1.0 c'h:n-gun current. path.
`T119 TEFIFIHHNE afthe cable shield to equjpnu-n1 l:hl,I:-I1-Li:-I shall rm: exceed 5 mi}. m‘1;u-r 9 |n1n|1n1_.'|11 r_-f‘ 5|]-0
`cyr.'I-as uI'1u;Ii:|ng, .'Lm:| Iu_nma‘.-ting.
`
`._.I._1:1:-u v nnmm
`
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`Aerohive - E
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`Aerohive - Exhibit 1026
`0111
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`
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`
`Aerohive - E «
`
`Aerohive - Exhibit 1026
`0112
`
`
`
`IISIN-EA.I'i.1I|3
`
`ISOHEC B302-3 : 1933
`Akita‘-lu"iEEE fitrl 302.3. 1995 Edition
`
`In order to ens-sure intermateabflity of connectors obtained from different manufacturers, the connector
`with female contacts shall conform to {EC 80'?-2 ['i'I and have gold-plated contacts and tin-plated shells. All
`additions to provide for ‘Female shell to male shell oonductivity ahall be on the shell of the connector with
`male contacts. There should be multiple contact points around the sides of this shell to provide For ahicld
`continuity.
`
`NOTE: [Isle of similar m1=.tallir.nnr£aoEfi on connector nclrlductorsl and EIim:'Il.a.r metallic surfaces on the mnnectur shells mjnjmjmea gal.-
`iraloic action and reduced performance.
`
`The connector is not apocificd to prevent operator contact with the shield, and precautions: shall be taken
`at installation time to ensure that the installer ia warned that the ahield ia not to be brought into contact
`with any hazardous voltage while being handled by operating personnel.
`Sec reference [A13|.
`
`7.3.3 Contact Assignments. The following table shows the aaaigmnent ofciruzuitc to connector contacts:
`
`Contact
`
`Circuit
`
`Use
`
`3
`
`1o
`
`11
`
`5
`
`12
`
`13
`
`14
`
`Shell
`
`D0-A
`
`no.3
`
`I}U|—S
`
`DI-A
`
`DI-B
`
`DPS
`
`CO—A
`
`(30-13
`
`C0-‘S
`
`C.T.—A
`
`Cl.-B
`
`Ci-S
`
`VG
`
`VP
`
`VS
`
`PG
`
`Data Out ch-cuitA
`
`Data Out. ciituit E
`
`Data Out circuit Shield
`
`Data In circuit};
`
`Data in circilit B
`
`Data In ci.rcu.it Sliieliil
`
`Control Dut circuit A
`
`Control Out circuit B
`
`Control Out circuit Shield
`
`Control in circu.itA
`
`Control in circuit B
`
`Control in circuit Shield
`
`Voltage Common
`
`Voltage Plus
`
`Voltage Shield
`
`Protection Ground (Conductive Shell)
`
`NOTES: L1) Vultage PIIJH and Voltage Common use a single twisted pair in the AUI cable.
`[2335 indicated in 'i".4.2.l, lllt-J1. lead LII F1 circuit is p-uniti1i'E relative totlie T5 lemzl for a.IlT signal and negative for El LU EIignal_
`
`Aerohive - Exhibit 1026
`0113
`
`
`
`ISOIIEC 5802-
`A?\ii2TfIF‘F‘1.‘ 52:»: um‘: -:1 1(|f\'I
`_.._. .-.... |.d\)&.
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`
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`
`8. Medium Attachment Unit and Baseband Medium Specifications,
`Type IOBASE5
`
`8.1 Scope
`
`8.1.1 Overview. This standard defines the functional, electrical, and mechanical characteristics of the
`MAU and one specific medium for use with local networks. The relationship of this specification to the
`entire ISO [IEEE] Local Network specification is shown in Fig 8-1. The purpose of the MAU is to provide a
`simple, inexpensive, and flexible means of attaching devices to the local network medium.
`OSI
`LAN
`REFERENCE MODEL
`CSMNCD
`LAYERS
`LAYERS
`
`HIGHER LAYERS
`
`APPLICATION
`
`PRESENTATION
`
`SESSION
`
`UTE
`
`UTE
`(AUI not
`
`NETWORK
`
`f
`
`'
`
`PHYSICAL
`
`AUI
`MALI
`MDI
`PMA
`
`ATTACHMENT UNIT INTERFACE
`MEDIUM ATTACHMENT UNIT
`MEDIUM DEPENDENT INTERFACE
`PHYSICAL MEDIUM ATTACHMENT
`
`Fig 8-1
`Physical Layer Partitioning, Relationship to the ISO Open Systems Interconnection
`(OSI) Reference Model
`
`3.1.1.1 Medium Attachment Unit. The MAU has the following general characteristics:
`
`(1) Enables coupling the PLS by way of the AUI to the explicit baseband coaxial transmission system
`defined in this section of the standard,
`
`Supports message traffic at a data rate of 10 Mb/s (alternative data rates may be considered in
`future additions to the standard).
`Provides for driving up to 500 m (1640 ft) of coaxial trunk cable without the use of a repeater.
`Permits the DTE to test the MAU and the medium itself.
`
`Supports system configurations using the CSMA/CD access mechanism defined with baseband sig-
`naling.
`(6) Supports a bus topology interconnection means.
`
`8.1.1.2 Repeater Unit. The repeater unit is used to extend the physical system topology, has the same
`general characteristics as defined in 8.1.1.1, and provides for coupling together two or more 500 In (1640 ft)
`coaxial trunk cable segments. Multiple repeater units are permitted within a single system to provide a
`maximum trunk cable connection path of 2.5 km (8200 it) between any two MAUs.
`
`115
`
`Aerohive - Ex
`
`Aerohive - Exhibit 1026
`0114
`
`
`
`: 1993
`ISDJIEC E-S02--."l
`ANSTJTEEE Std 302.5, 1993 Edition
`
`3.12 Definitions
`
`LOCAL AND M'|"3THOF“C'LIT.d.N AREA NETWORKS:
`
`basehnnd coaxial system. A system whereby information is directly encoded and impressed on the coax-
`ial transmission medium. At any point on the medium, only one information signal at a time can be present
`without disruption (see collision}.
`
`HR. The rate nfdata throughput (bit 1-atclnn the medium in bits per second.
`
`BRI2. One ha.Lf'-ofthe ER in Hertz.
`
`branch cnbl e. The AUI cable interconnecting the DTE and MAU system components.
`
`carrier sense. In a local area network, on orlgoing activitgr of a data station to detect whether another sta-
`tion is transmitting.
`NOTE; A collision presence signal is provided by the PLS to the FMA FI'l.]|2|lfl.]'EI to indicate that one or more stations are currently
`transmitting on the tr'u.'n.lc_ coaxial cable.
`
`coaxial cable. A two-conductor [center conduct-or, shield system}, concentric, constant impedance trans
`mission line used as the trunk medium in the basebsnd system.
`
`coaxial cable interface. The electrical and mechanical interface to the shared coaxial cable medium
`either contained within or connected to the MAU. Also known as MDI (Medium Dependent Interface).
`
`coaxial cable segment. A. length of coaxial cable made up from one or more Dflflltlfll cable sections and
`coaxial connectors, and terminated at each end in its charac-boristic impedance.
`
`collision. An unwanted condition that results from concurrent transmissions on the physical medium.
`
`collision presence. Asignal provided by the PLS to the l31‘u'L'5:. sublayer [within the data link layer] to indi-
`cate that multiple stations are contending for access to the transmission medium.
`
`compatibility interfaces. The MJJI coaxial cable interface and the AU1 branch cable interface. the two
`points at which hardware compatibility is defined to allow connection of‘ independently designed and man-
`ufactured com ponents to the baseband transmission system.
`
`Medium Attachment Unit (MAU). In a local men network. a device used i.n a data station to couple the
`data tBI'1‘n'1na] equipment to the transmission medium.
`
`Medium Dependent lnterfaee {MIDI}. The mechanical and electrical interface between the trunk cable
`medium and the MAU.
`
`Physical Medium Attachment (PMAI. The portion of the MAU that contains the functional ci.rcuitr_y.
`
`Physical Signaling IPLS). That portion of the Physical Layer, contained within the DTE that provides
`the logical and functional coupling between MAU and Data Link Layers.
`
`repeater.A.devicc ‘used to extend the length, topology. or intorcoruiectivity of the physical medium beyond
`that imposed by a single segment, up to the maximum allowable end-to—end trunk transmission line
`length. Repeaters perform the basic actions of restoring signal amplitude, waveform, and timing applied to
`normal data and collision signals.
`
`trunk cable. The trunk co:-ixzial cable system.
`
`8.1.3 Application Perspective: MAI] and IEEEDIUM Objectives. "This section states the brand objgc.
`tives and assumptions underlying the specifications defined throughout this section of the standard.
`
`116
`
`Aerohive - Exhibit 1026
`0115
`
`
`
`("..':i!.'LtUG]J
`
`3.1.3.1 Object
`
`ISOHEC SE02-3 : I993
`ANSIFTEEE Std 802.3, 1993] Edition
`
`(1) Provide the physical means for communication between. local network data link entities,
`
`NCITE:Tl1is standatrl comers 1!. portion of the physical layer as declined in the OBI Reference Mods] and, in addition, Lha ph3ra_
`icnl medium itself, which is beyond the scope ofthe OSI Reference Model.
`
`1'2} Define a physical interface that can be implemented independently among difierent manufacturers
`of hardware and achieve the intended level of compatibility when interconnected in a common local
`network.
`
`(3) Provide a communication channel capable of high bandwidth and low bit error rate performance.
`The resultant mean bit error rate, at the pliysical layer service interface should be less than one
`part in 103 {on the order of one part in to-9 at the link level}-
`ldl Provide for ease ofinstsllation and service.
`(5) Provide For high network availability {ability of a station to gain access to the medium and en able
`the data link connection in a timely fashion).
`(6) Enable relatively low-cost implementations.
`
`3.1.3.2 Compatibility Considerations. All implementations of this baseband coaxial system shall be
`compatible at the MDI.
`This standard provides one explicit trunk cable medium specification for the interconnection of all MAU
`devices. The medium itself, the functional capability of the