United States Patent [19] .
`de Sartre et al.
`
`[11] Patent Number:
`[45] Date of Patent:
`
`4,692,853
`Sep. 8, 1987
`
`[54] CONTROL CIRCUIT FOR A CHOPPED
`POWER SUPPLY WITH PROGRESSIVE
`START UP
`[75] Inventors: Jean de Sartre, Meylan; Philippe
`Maige, Syssinet Pariset, both of
`France
`[73] Assignee:
`Thomson-CSF, Paris, France
`[21] Appl. No.: 826,986
`22 F'] d:
`F b. 7, 1986
`[
`]
`1e
`e
`_
`_
`_
`_
`_
`[30]
`Foreign Application Pl'lol'lty Data
`Feb. 8, 1985 [FR]
`France .............................. .. 85 01822
`
`[51] 1m. (:1.4 ........................................... .. H02? 13/22
`[52] US. Cl. ...................................... .. 363/49; 363/97;
`_
`323/901
`[58] Field of Search ............................
`363/20-21,
`363/49’ 56’ 97’ 131’ 323/901’ 908
`References Cited
`U S PATENT DOCUMENTS
`'
`'
`_
`2/1972 gawlims ----
`8)?
`-----------------
`3/63/49
`Migggrlieétaa'l
`'
`4’195’335
`4:272:805 6/1981 Iguchi et aL
`“563/56 X
`
`[56]
`
`"
`
`4,586,120 4/1986 Malik et al. ..................... .. 363/49 X
`
`FOREIGN PATENT DOCUMENTS
`
`0144754 11/1984 European Pat. Off. .
`
`OTHER PUBLICATIONS
`E.D.N. Electrical Design News, vol. 29, No. 18, Sep.
`1984, pp. 213-220, Boston, U.S.; G. Gattavari: “Design
`Custom Power Sources with Switching-Regulator
`Chip".
`
`Primary Examiner—Peter S. Wong
`Attorney, Agent, or Firm—Oblon, Fisher, Spivak,
`Mcclelland & M3161
`
`ABSTRACT
`1571
`A chopped power Supply control Circuit is provided
`intended to receive regulation control signals and to
`produce Square waves for enabling a Switch. A Current
`comparator measures the current in the switch and
`opens the switch when the threshold is exceeded. Under
`normal operating conditions the threshold is ?xed.
`Under start-up conditions of should a malfunction
`occur a threshold variation circuit causes the threshold
`to vary gradually from a low value to its normal value.
`Thus the risk of over-current at start-up is reduced.
`
`4,400,767 8/1983 Fenter . . . . . . . . . . . . .
`
`. . . . .. 363/21
`
`4,504,898 3/1985 Pilukaitis et a1. ................... .. 363/49
`
`7 Claims, 7 Drawing Figures
`
`REGULATION
`CIRCUIT
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`CIRCJIT
`
`ON SEMICONDUCTOR EXHIBIT 1005
`Page 1 of 13
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`

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`U. S. Patent Sep. 8, 1987
`
`Sheetl of5
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`4,692,853
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`ON SEMICONDUCTOR EXHIBIT 1005
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`ON SEMICONDUCTOR EXHIBIT 1005
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`ON SEMICONDUCTOR EXHIBIT 1005
`Page 5 of 13
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`U. S. Patent Sep. 8, 1987
`
`SheetS 0f5
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`4,692,853
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`FIG_V7
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`ON SEMICONDUCTOR EXHIBIT 1005
`Page 6 of 13
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`

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`1
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`4,692,853
`
`CONTROL CIRCUIT FOR A CHOPPED POWER
`SUPPLY WITH PROGRESSIVE START UP
`
`BACKGROUND OF THE INVENTION
`The present invention relates to stabilized power
`supplies called chopped supplies.
`A chopped power supply operates in the following
`way: a primary transfer winding receives a current
`which is for example delivered by a recti?er bridge
`receiving the power of the AC mains. The current in
`the transformer is chopped by a switch (for example a
`power transistor) placed in series with the primary
`winding.
`A circuit for controlling the transistor produces peri
`odic square waves for enabling the transistor. A current
`is allowed to pass for the duration of the square waves;
`outside the square wave, the current cannot pass.
`On one (or more) secondary windings of the trans
`former, an AC voltage is collected. This is recti?ed and
`?ltered so as to obtain a DC voltage which is the output
`DC voltage of the chopped power supply.
`For stabilizing the value of this DC voltage, the cyc
`lic period conduction ratio of the switch is adjusted,
`that is to say the ratio between the duration of conduc
`tion and the duration of non conduction in a chopping
`period.
`In chopped power supply architecture proposed by
`the applicant and shown in FIG. 1, two integrated cir
`cuits are used. One of the circuits CI1, serves for con
`trolling the base of a power transistor Tp for applying
`thereto periodic enabling and disabling control signals.
`The base control circuit CI1 is placed on the primary
`winding side (EP) of the transformer (TA) for reasons
`which will be better understood in the rest of the de
`scription. The other integrated circuit, regulation cir
`cuit C12, is on the contrary placed on the secondary side
`(winding E81) and it serves for examining the output
`voltage Vs of the power supply for forming regulation
`signals which it transmits to the ?rst integrated circuit
`through a small transformer TX. The ?rst integrated
`circuit CI1 uses these regulation signals for modifying
`the cyclic conduction ratio of the switching transistor
`T1, and thus regulating the output voltage Vs of the
`power supply.
`We will come back further on in more detail to the
`circuit of FIG. 1.
`Numerous problems arise during the design of a
`chopped power supply, and here we will consider more
`particularly the problems of starting up the supply and
`the problems of safety in the case of over voltages or
`over currents at different points in the circuit.
`The ?rst problem which is met with is that of starting
`up the power supply: at switch on, the regulation circuit
`CI2 will tend to cause the base control circuit CI1 to
`generate maximum cyclic ratio square waves until the
`power supply has reached its nominal output voltage.
`This is all the more harmful since there is a high current
`drain on the side of the secondary windings which are
`connected to initially discharged ?ltering capacitors.
`There is a risk of destruction of the power transistor
`through an overcurrent during the start up phase.
`Circuits for gradual start up have already been pro
`posed which limit the duration of the enabling square
`waves during a start up phase, on switching on the
`device; the US. Pat. No. 3,959,714 describes such a
`circuit ‘in which charging of a capacitor from switch-on
`de?nes initially short square waves of gradually increas
`
`25
`
`35
`
`45
`
`50
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`55
`
`60
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`65
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`2
`ing duration until these square waves reach the duration
`which the regulation circuit normally assigns to them.
`The short square waves have priority; but, since they
`become gradually longer during the start up phase, they
`cease to have priority after a certain time; this time is
`de?ned by the charging time constant of the capacitor.
`Another problem to be reckoned with is the risk of
`accidental over-currents, or sometimes over-voltages
`which may occur in the circuit. These overcurrents and
`over-voltages may be very detrimental and often result
`in the destruction of a power transistor if nothing is
`done to eliminate them. In particular, a short circuit at
`the output of the stabilized power supply rapidly de
`stroys the power transistor. If this short circuit occurs
`on switching-on of the supply, it is not the gradual start
`up system with short and progressively increasing
`square waves which can ef?ciently accomodate the
`over-currents which result from this short circuit.
`Finally, another problem particularly important in an
`architecture such as the one shown in FIG. 1, is the risk
`of disappearance of the regulation signal which should
`be emitted by the regulation circuit C12 and received by
`the base control circuit CI1: these signals determine not
`only the width of the square waves enabling the power
`transistor but also their periodicity; in other words, they
`serve for establishing the chopping frequency, possibly
`synchronized from a signal produced on the secondary
`side of the transformer. The appearance of these signals
`causes a particular disturbance which must be taken into
`account.
`Furthermore, the architecture shown in FIG. 1, in
`which the secondary circuits have been voluntarily
`separated galvanically from the primary circuits, is such
`that the base control circuit may operate rapidly after
`switch-on, as will be explained further on, whereas the
`regulation circuit CI2 can only operate if the chopped
`power supply is operating; consequently, at the begin
`ning, the base control circuit CI1 does not receive any
`regulation signals and this dif?culty must be taken into
`account.
`SUMMARY OF THE INVENTION
`To try and overcome as well as possible all these
`different problems which relate to security against acci
`dental disturbances in the operation of the power supply
`(the initial start up being more-over considered as a
`transitory disturbed operating phase), the present inven
`tion provides an improved chopped power supply con
`trol circuit which provides a function of gradual start
`up power supply on switch on and a function of passing
`to a safety mode in the case of an operating defect such
`as a disappearance of appropriate regulation signals; the
`safety mode consists of a succession of periodic cycles
`at a very low frequency, each cycle consisting of a
`gradual start-up attempt during a ?rst phase which is
`short in comparison with the period of the cycle and
`long compared with the chopping period of the
`chopped power supply, the ?rst phase being followed
`by a pause until the end of the cycle, and periodic cycles
`succeeding each other until normal operation of the
`power supply is established or re-established; a very
`low frequency oscillator establishes these cycles when
`the power supply is not operating under normal condi
`tions (start-up or operating defect); this oscillator is
`disabled should normal operation be ascertained; a high
`frequency oscillator generates a burst of chopping sig
`nals palliating the absence of regulation signals; these
`
`ON SEMICONDUCTOR EXHIBIT 1005
`Page 7 of 13
`
`

`
`BRIEF DESCRIPTION OF THE DRAWINGS
`Other features and advantages of the invention will
`be clear from reading the following detailed description
`made with reference to the accompanying drawings in
`which:
`FIG. 1 shows a general chopped power supply dia
`gram using two integrated circuits placed respectively
`on the primary side and on the secondary side of a
`transformer,
`FIG. 2 shows a diagram of the integrated control
`circuit of the power transistor placed on the primary
`side,
`FIGS. 3 to 6 show timing diagrams of signals at dif
`ferent points on the circuit, and
`FIG. 7 shows a detail of a circuit for elaborating a
`variable threshold.
`
`4,692,853
`4
`3
`switching of the power switch should over-shooting of
`signals are transmitted solely during the ?rst phase of
`this third value occur, the inhibition only ceasing when
`each cycle; they are inhibited during a second phase.
`the circuit, after having partially or completely ceased
`According to a very important characteristic of the
`to be supplied with power, is again normally supplied.
`invention, the gradual start up operates not by limiting
`the duration of the square waves from the charging of a
`capacitor with a ?xed time constant, but by limiting the
`current in the power transistor to a maximum value, this
`maximum value increasing progressively during the
`start up phase, over-shooting of this current value caus
`ing interruption in the conduction of the power transis
`tor.
`Thus, even in the case of a quasi short circuit, the
`value of the current in the transistor is limited, which
`was not the case in the gradual start up circuits of the
`prior art.
`More precisely, the chopped power supply control
`circuit of the invention is intended to receive regulation
`control signals and to produce square waves for en
`abling a main switch of the power supply, the square
`waves having a variable width depending on the signals
`received, and this circuit comprises a current limiting
`circuit including a threshold comparator receiving at
`one input a signal representative of the current ?owing
`through the switch and at another input a threshold
`signal, the comparator generating a signal for stopping
`the switch from conducting should over shooting of the
`threshold occur; furthermore, in order to ensure grad
`ual start-up of the chopped power supply at the begin
`ning of its operation and should this operation be dis
`turbed, the control circuit comprises a means for pro
`ducing a variable threshold signal for the comparator,
`this means being adapted for:
`establishing a ?rst ?xed threshold value under normal
`operating conditions,
`establishing a periodic threshold variation cycle out
`side normal operating conditions, this cycle consisting
`in:
`causing the threshold to pass suddenly from the ?rst
`value to a second value, at a time representing the be
`ginning of the cycle, the second value corresponding to
`a lower current in the switch,
`bringing the threshold gradually back from the sec
`ond value to the ?rst in a ?rst part of the threshold
`variation cycle,
`holding the threshold at the ?rst value until the end of
`45
`the current cycle,
`beginning again a second threshold variation cycle at
`the end of the current cycle,
`stopping the production of threshold variation cycles
`when normal operating conditions have again been
`established.
`Normal operating conditions will in general be de
`?ned by the presence of appropriate regulation signals
`and by the absence of an over-current in the switch.
`The periodic cycle is at very low frequency (for
`example 1 hz), and the duration of a ?rst part of the
`cycle is preferably small with respect to the period of
`the cycle (for example a tenth of this period, followed
`by a pause during the nine remaining tenths); it is long
`with respect to the chopping period of the power sup
`ply.
`~
`In order to provide even more complete safety, a
`second threshold comparator is preferably provided
`receiving at one input a signal respresentative of the
`measurement of the current in the switch and at another
`input a third threshold value corresponding to a current
`greater than that of the ?rst threshold value, the com
`parator delivering a signal for complete inhibition of the
`
`DESCRIPTION OF THE PREFERRED
`EMBODIMENT
`Referring to FIG. 1 which shows a chopped power
`supply architecture given by way of example and well
`illustrating the utility of the invention, the electric
`mains line has been designated by the reference 10
`(mains at 110 to 220 volts, 50 or 60 hertz). This line is
`connected through a ?lter 12 to the input of a recti?er
`bridge 40 whose output is connected on the one hand to
`a primary electric ground, represented everywhere by a
`downward pointing black triangle, and on the other
`hand to one end of the primary winding EP of the
`power supply transformer TA.
`A ?ltering capacitor 16 is placed in parallel across the
`outputs of the recti?er bridge 14. The other end of the
`primary winding is connected to the collector of a
`switching transistor TP whose emitter is connected to
`the primary ground through a small current measuring
`resistor 18.
`.
`The transformer has several secondary windings
`which are preferably isolated galvanically from the
`mains and connected for example to a secondary elec
`tric ground isolated galvanically from the primary
`ground.
`Here, each of the secondary windings has one end
`connected to the secondary ground. The other end
`feeds a respective low-pass ?ltering capacitor through a
`respective recti?er diode.
`We will be concerned in what follows with a single
`secondary winding BS1, connected by a diode 20 to a
`capacitor 22. The DC output voltage of the chopped
`power supply is the voltage Vs at the terminals of the
`capacitor 22; but of course, other DC output voltages
`may be obtained at the terminals of the other ?ltering
`capacitors connected to the secondary windings. These
`output voltages form stabilized power supply voltages
`for user circuits not shown. By way of example, a sec
`ondary winding ES2 supplies a stabilized power supply
`voltage of a few volts for the integrated regulation
`circuit C12 already mentioned. It can therefore be seen
`in this connection that this circuit is not supplied with
`power and cannot therefore supply signals as long as the
`chopped power supply is not operating.
`The same goes a priori for the integrated circuit CIl
`controlling the base of the power transistor TP, which
`circuit is supplied with a stabilized voltage delivered by
`
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`ON SEMICONDUCTOR EXHIBIT 1005
`Page 8 of 13
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`

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`O
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`b. 5
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`5
`a secondary winding BS3, a diode 24 and a capacitor 26
`(it will be noted in passing that this winding, although
`being a secondary winding, is connected to the primary
`ground and not to the secondary ground, for the very
`simple reason that the integrated circuit C11 is necessar
`ily coupled galvanically to the primary).
`However, since start up of the chopped power supply
`must be provided, the power supply terminal 28 of the
`integrated circuit C11 is also connected directly to the
`mains through a high resistor 30 and a diode 32; this is
`possible since the integrated circuit C11 is connected to
`the primary ground; it is not possible for the integrated
`circuit C12 which must remain galvanically isolated
`from the mains. As soon as the chopped power supply is
`operating normally, the stabilized DC voltage from
`winding BS3 and diode 24 takes precedence over the
`voltage coming from the mains and from diode 32; this
`diode 32 is disabled and the direct supply by the mains
`only takes place after the initial start up phase.
`The role of the integrated circuits C11 and C12 will
`now be described.
`The regulation circuit C12 receives from a divider
`bridge 34, placed at the terminals of capacitor 22, i.e. at
`the output of the stabilized power supply, information
`concerning the value of the voltage to be stabilized Vs.
`This information is compared with a reference value
`and applied to a pulse width modulator which forms
`periodic square waves of variable width depending on
`the value of the output voltage Vs: the lower Vs the
`wider the square waves will be.
`The square waves are established at the chopping
`frequency of the chopped power supply. This fre
`quency is therefore established on the secondary side of
`the circuit; it is generated either inside the circuit C12,
`or outside in a circuit not shown, in the form of a saw
`tooth voltage at the chosen chopping frequency. This
`saw tooth voltage is used in a way ‘known per se for
`providing width modulation.
`The variable width square waves, at the chopping
`frequency, are applied to a primary winding 36 of a
`small transformer TX whose secondary winding 38,
`isolated galvanically from the primary, delivers positive
`and negative pulses at the rising and falling fronts re
`spectively of the variable width square waves.
`It is these pulses, whose position and frequency are
`determined by the regulation circuits C12, which form
`regulation signals applied to an input 40 of the base
`control circuit C11.
`The transformer TX is formed by a few turns wound
`on a ferrite rod, the turns of the primary and the turns
`of the secondary being sufficiently spaced apart from
`each other for complying with standards of galvanic
`isolation between primary circuits and secondary cir
`cuits of the chopped power supply.
`The integrated base control circuit C11 comprises
`different inputs among which have already been men
`tioned a power supply input 28 and a regulation signal
`input 40; a current measuring input 44 is connected to
`the current measuring resistor 18; an inhibition input for
`monitoring the magnetization condition of a trans
`former. Finally, inputsmay be provided for connecting
`elements (resistors, capacities) which should form part
`of the integrated circuit itself but which for technologi
`cal reasons (space limitation) or for practical reasons
`(possibilities of adjustment by the user) are mounted
`outside.
`The integrated circuit C11 ?nally comprises an out
`put 46 which is intended to be connected by direct
`
`4,692,853
`6
`galvanic coupling to the base of the power transistor T,,.
`This output delivers square waves for enabling and
`disabling the transistor Tp.
`FIG. 2 shows the general architecture of the inte
`grated circuit Cll, limited to the elements which more
`especially concern the invention.
`The output 46 of the circuit is the output of a push
`pull ampli?cation stage designated as a whole by the
`reference 48, this stage comprising preferably two sepa
`rate ampli?ers one of which receives enabling square
`waves and the other receives disabling signals formed
`by the inverted enabling signals delayed by a few micro
`seconds. Such ampli?ers are now well known.
`The enabling signals are provided by a logic ?ip ?op
`50 having a set input 52 and a reset input 54. The set
`input causes enabling of the power transistor. The reset
`input causes disabling.
`The set input 52 receives the pulses which pass
`through a logic AND gate 58, so that conduction only
`occurs if several conditions are satis?ed simultaneously;
`one unsatis?ed condition, will be sufficient to inhibit
`enabling of the conduction.
`The reset input 54 receives the pulses which pass
`through a logic OR gate 60, so that stopping of the
`. conduction (after enabling) will occur as soon as a stop
`signal is present at one of the inputs of this gate.
`1n the diagram of FIG. 2, the AND gate 58 has three
`inputs. One of these inputs receives periodic pulses from
`an output 62 of a high frequency oscillator 64; the other
`inputs serve for inhibiting the transmission of these
`pulses.
`The oscillator de?nes the periodicity of the chopping
`of the power supply (20 kilohertz for example). Under
`normal operating conditions, the oscillator is synchro
`nized by the regulation signals; under start-up condi
`35
`. tions it is self-oscillating at a free frequency defined by
`the values of a resistor R0 and a capacitor C0 external to
`the integrated circuit C11 and connected respectively to
`an access terminal 66 and an access terminal 68. The
`free frequency fo is generally slightly lower than the
`normal chopping frequency.
`Oscillator 64 is a relaxation oscillator which produces
`at an output 70 a saw tooth whose return to zero is
`caused by the appearance of a positive pulse at terminal
`40. This is why oscillator 64 is shown with one input
`connected to an output 72 of a shaping and separation
`circuit 74 which receives the regulation signals from
`terminal 40 and shapes them while separating the posi
`tive pulses from the negative pulses. The shaping cir
`cuit. 74 has two outputs: 72 for the positive pulses, 76
`for the negative pulses (the notation positive pulse and
`negative pulse will be kept for distinguishing the pulses
`causing conduction and the pulses stopping conduction
`even if the shaping circuit establishes pulses of the same
`sign at both its outputs 72 and 76).
`The oscillator 64 has two outputs: one output 70
`delivering a saw tooth and one output 62 delivering a
`short pulse during the zero return of the saw tooth.
`A pulse width modulator 78 is connected on the one
`hand to the output 70 of the oscillator and on the other
`to a reference voltage adjustable by means of a resistor
`R1 external to the integrated circuit and connected to a
`terminal 80 giving access to the circuit. Modulator 78
`supplies periodic square waves synchronized with the
`signals of the oscillator, these square waves de?ning a
`maximum conduction time Tmax beyond which the
`power transistor must be disabled in any case for safe
`ty’s sake. These square waves of modulator 78 are ap
`
`40
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`45
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`ON SEMICONDUCTOR EXHIBIT 1005
`Page 9 of 13
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`

`
`4,692,853
`8
`T’, is not disabled (such disablement is caused by com
`parator 92) but the transistor is inhibited from being
`enabled again. This inhibition lasts until the ?ip ?op 96
`is brought back to its initial state corresponding to nor
`mal operation.
`In theory, such re-setting will only take place when
`the integrated circuit C11 has ceased to be normally
`supplied with power and has again power applied
`thereto.
`For example, re-setting of ?ip ?op 96 takes place
`through a hysteresis threshold comparator 98 which
`compares a fraction of the supply voltage Vcc of the
`circuit (taken from terminal 28) with a reference value
`and which re-sets the flip ?op the ?rst time that Vcc
`passes above this reference after a drop of Vcc below
`another reference value lower than the ?rst one (hyste
`resis). Finally, it should be mentioned that the output of
`the ?ip ?op 89 (which detects the presence of regula
`tion signals at terminal 40 so normal operation of the
`power supply), is connected to one input of an OR gate
`100 which receives at another input the output of the
`comparator 88 so that the output of comparator 88
`ceases to inhibit the re-enabling of transistor T1, (inhibi
`tion during 90% of the very low frequency cycles) as
`soon as the operation of the power supply has become
`normal.
`
`20
`
`45
`
`7
`plied to one input of the OR gate 60. The time Tmax is
`adjustable by means of the external resistor R1.
`The elements which have just been described ensure
`the essential part of the operation under normal condi
`tions of the integrated circuit C11. The following ele
`ments are more speci?cally provided for controlling the
`abnormal operation or start-up of the power supply.
`A very low frequency oscillator 82 is connected to an
`external capacitor C2 through an access terminal 86.
`This external capacitor allows the very low oscillation
`frequency to be adjusted. The frequency may be 1 hertz
`for example.
`Oscillator 82 is a relaxation oscillator delivering a saw
`tooth. This saw tooth is applied on the one hand to a
`threshold comparator 88 which allows periodic square
`waves to be established synchronized with the very low
`frequency saw tooth of the oscillator. These square
`waves have a very short duration compared with the
`period of the saw tooth; this duration is set by the
`threshold of the comparator 88; it may for example be
`10% of the period; it must be long compared with the
`free oscillation period of the high frequency oscillator
`64 so that a burst of numerous pulses from the high
`frequency oscillator may be emitted and used during
`this 10% of this very low frequency period; this burst
`de?nes a start-up attempt during the ?rst part of a start
`up cycle; it is followed by a pause for the rest of the
`period, i.e. during the remaining 90%.
`The oscillator only serves at start-up; it is inhibited
`when regulation signals appear at terminal 40 and indi
`cate that the chopped power supply is operating. This is
`why an inhibition control of this oscillator has been
`shown connected to the output 72 of the shaping circuit
`74 through a ?ip ?op 89. This ?ip ?op changes state
`under the action of the pulses appearing at output 72. It
`is brought back to its initial state by the output 62 of
`oscillator 64 when there are no longer any pulses at
`output 72.
`The saw teeth of the very low frequency oscillator
`are further fed to a variable threshold elaboration cir
`cuit 90 whose purpose is to establish a threshold signal
`(current or voltage) having a ?rst value Vsl under nor
`mal operating conditions, and a cyclically variable
`threshold between the ?rst value and a second value
`under start-up conditions. The mode of variation of this
`threshold will be described further on, but it may al
`ready be noted that the variation is driven by the very
`low frequency saw tooth.
`The threshold signal produced by circuit 90 is applied
`to one input of a comparator 92, another input of which
`is connected to the terminal 44 already mentioned, for
`receiving at this input a signal representative of the
`amplitude of the current ?owing through the power
`switch. The output of comparator 92‘is applied to an
`input of the OR gate 60. It operates then for causing the
`power transistor T,, to be disabled, after being enabled,
`disablement occurring as soon as overshooting of the
`threshold (?xed or variable) de?ned by circuit 9 has
`been detected.
`Another threshold comparator 94 has one input con
`nected to the current measuring terminal 44 whereas
`another input receives a signal representing a third
`threshold value Vs3. The third value Vs3 corresponds
`to a current in the switch higher than the ?rst value Vsl
`de?ned by circuit 90. The output of comparator 94 is
`connected through a storage flip flop 96 to one input of
`the AND gate 58 so that, if the current in the power
`switch exceeds the third threshold value Vs3, transistor
`
`OPERATION OF THE BASE CONTROL
`CIRCUIT
`This operation will be described by illustrating it with
`voltage wave forms within the chopped power supply
`and within the integrated circuit C11.
`(a) Start-up on switching on
`At the. beginning the integrated circuit is not at all
`supplied with power.
`The voltage at the power supply terminal 28 in
`creases from 0 to a value Vaa which is not the nominal
`value Vcc but which is a lower value supplied by diode
`32 and resistor 30 (compare FIG. 1) as long as the
`chopped power supply does not deliver its nominal
`output voltage Vcc at terminal 28. Vaa is a suf?cient
`voltage for ensuring practically normal operation of all
`the elements of the circuit CI1. Vaa is also suf?cient for
`reinitializing the ?ip ?op 96 which, from then on, no
`longer inhibits the enabling of the power transistor Tp
`There are no regulation signals at the input 40. Conse
`quently, the high frequency oscillator oscillates at its
`free frequency and the very low frequency oscillator
`also oscillates (it is not inhibited by the ?ip ?op 89 since
`this latter does not receive any regulation signals from
`the output 72 of the shaping circuit 74).
`The very low frequency oscillator 82 and the com
`parator 88 de?ne periodic cycles of start-up attempts
`repeated at very low frequency.
`Each cycle comprises a ?rst part de?ned by the
`square waves of short duration at the output of the
`comparator 88, and a second part formed by the end of
`the very low frequency period; the ?rst part is an effec
`tive attempt at start-up. The second part is a pause if the
`effective attempt has failed. The pause lasts much
`longer than the effective attempt so as to limit power
`consumption. During the ?rst part of the cycle, passage
`of the enabling signals from the high frequency oscilla
`tor 64 is allowed through the AND gate 48. Then it is
`prohibited. Each pulse from the output 62 of the oscilla
`tor 64 triggers off the enabling of transistor Tp. There is
`then a burst of triggering pulses which is emitted for
`aboutvl0% of the verylow frequency period.
`
`55
`
`65
`
`ON SEMICONDUCTOR EXHIBIT 1005
`Page 10 of 13
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`20
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`25
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`During start up, the current intensities in the transis
`tor tend to be high. It is essentially the comparator 92
`which'causes interruption of the conduction, after each
`enabling pulse Supplied by oscillator 64, as soon as the
`current exceeds the threshold imposed by the variable
`threshold elaboration circuit 90. If the comparator 92
`does not trigger off interruption of the conduction, the
`modulator 78 will do it in any case at the end of the
`duration Tmax.
`The threshold elaboration circuit which supplies the
`comparator 90 with a ?rst ?xed threshold value Vsl
`under normal operating conditions (i.e. when the very
`low frequency oscillator 82 is disabled by the ?ip flop
`89), delivers a variable threshold as a function of the
`saw tooth of the very low frequency oscillator in the
`following way:
`at the initial time of a start-up attempt cycle (start of
`the saw tooth or return to zero of the preceding saw
`tooth), the threshold passes suddenly from the ?rst
`value Vsl to a second value Vs2 corresponding to a
`smaller current than for the ?rst value, then this thresh
`old increases progressively (because driven by the very
`low frequency saw tooth) from the second value to the
`?rst one. The duration of the increase coincides prefera
`bly with the duration of a start-up attempt square wave
`(namely about 10% of the very low frequency period).
`Then the threshold stabilizes at the ?rst value Vsl
`until the end of the period but, in any case, if the circuit
`has not started up at that time, the comparator 88 closes
`gate 58 through the OR gate 100 and inhibits any subse
`quent enabling of the power transistor for the rest of the
`very low frequency period (90%). It is in this case the
`second part of the start up attempt cycle which takes
`place: a pause during which the pulses of the oscillator
`64 are not transmitted through the AND gate 58.
`Thus the start up cycles act on two levels: on the one
`hand a burst of enabling pulses is emitted (10% of the
`time) then stopped (90% 0f the time) until the next
`cycle;