Page 1 of 5
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`Samsung Exhibit 1018
`Samsung Electronics Co., Ltd. v. Daniel L. Flamm
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`U.S. Patent
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`May 5, 1998
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`Sheet 1 of 2
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`5,746,928
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`Page 2 of 5
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`U.S. Patent
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`May 5, 1998
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`Sheet 2 of 2
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`5,746,928
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`PLACE A DUMMY WAFER ON
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`THE ESC TO BE CLEANED
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`EVACUATE THE PROCESS
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`APPLY AN RF VOLTAGE WITH A
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`WATTAGE IN EXCESS OF NORMAL
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`OPERATING WATTAGE
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`TURN OFF THE RF VOLTAGE
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`REMOVE THE DUMMY WAFER AND
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`ADHERING DEBRIS AND CONTAMINATION
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`Page 3 of 5
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`5,746,928
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`1
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`PROCESS FOR CLEANING AN
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`ELECTROSTATIC CHUCK OF A PLASMA
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`ETCHING APPARATUS
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`5
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`Application Ser. No. 08/620,184, filed Mar. 22, 1996,
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`now US. Pat. No. 5,671,119,
`is a commonly assigned,
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`related, application.
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`BACKGROUND OF THE INVENTION
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`1. Field of the Invention
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`The present
`invention relates to semiconductor
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`processing, more specifically to cleaning plasma etching
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`apparatus used in semiconductor processing.
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`2. Description of the Related Art
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`In semiconductor device manufacturing, various types of
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`- plasma processes are used to deposit layers of conductive
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`and dielectric material on semiconductor wafers, and also to
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`blanket etch and selectively etch materials from the wafer.
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`During these processes the wafer is affixed to a wafer chuck
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`in a process chamber and a plasma generated adjacent the
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`wafer surface. Various techniques have evolved to aflix the
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`wafer to the wafer chuck. Arecent technique for holding the
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`wafer is using an electrostatic chuck, as described in U.S.
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`Pat No. 5,310,453 and U.S. Pat. No. 5,382,311.
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`In an electrostatic chuck, a conductive electrode beneath
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`a dielectric wafer support layer is provided. When a high DC
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`voltage is applied to the electrode, positive and negative
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`charges are respectively produced in the wafer and the
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`electrode, so that the wafer is attracted and held on the chuck
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`surface by the Coulomb force acting between the wafer and
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`the electrode. Plasma etching is performed in this state.
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`When the etching is completed, the supply of RF power and
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`the application of the high DC voltage to the electrode are
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`terminated Subsequently, the processed wafer is unloaded.
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`The electrostatic chuck eliminates the need for mechanical
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`clamp rings, and greatly reduces the probability of forming
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`particles by abrasion etc, which particles cause yield prob-
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`lems and require frequent cleaning of the apparatus.
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`During the etching process, the temperature of the wafer
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`must be controlled to prevent non-uniform etching which
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`would otherwise produce and adverse effect on the wafers
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`The etch rate increases with temperature increases. This
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`temperature control can be achieved by improving the heat
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`transfer rate between the wafer and wafer chuck. A heat
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`transfer gas, such as He, is supplied to grooves in the top
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`surface of the chuck The grooves in combination with the
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`wafer form chambers when a wafer is aflixed the chuck.
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`Even though the use of an electrostatic chuck reduces
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`particle contamination, it is inevitable that small particles
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`are formed, and other contamination generated within the
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`process chamber. These particles and contamination when
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`deposited or formed on the wafer chuck surface of an ESC
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`increase the leakage of the heat transfer gas, i.e. He, at the
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`interface of the chuck surface and wafer. This leakage
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`reduces the temperature control of the wafer and the effl-
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`ciency of wafer cooling techniques. Consequently, the pro-
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`cess chamber and the wafer chuck must be cleaned quite
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`frequently. This results in down time for the apparatus, and
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`requires an expensive and time consuming manual apparatus
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`cleaning operation.
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`SUMMARY OF THE INVENTION
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`It is an object of the invention to provide a new and more
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`efiicient process for cleaning an electrostatic chuck.
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`Another object of the invention is to provide a new
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`process for removing small particles and other contamina-
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`tion from the top surface of an electrostatic chuck.
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`2
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`Yet another object of the invention is to provide a method
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`of cleaning an electrostatic chuck of a plasma etching
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`apparatus that takes a minimum amount of time, and is less
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`disruptive of the overall semiconductor manufacturing
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`operation.
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`In accordance with the above objectives, there is provided
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`a process for cleaning an electrostatic chuck of a plasma
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`apparatus in which a dummy wafer is placed on the wafer
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`chuck and the process chamber evacuated. An RF voltage is
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`applied to the chuck with a wattage in excess of the normal
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`operating wattage needed to generate an RF plasma. Sub-
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`sequently the RF voltage is turned oil” and the dummy wafer
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`is removed from the chamber along with the adhering debris
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`and contamination.
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`BRIEF DESCRIPTION OF THE DRAWINGS
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`The accompanying drawings, which are incorporated in
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`and constitute a part of the specification, illustrate preferred
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`embodiments of the invention and serve to explain the
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`principles of the invention.
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`FIG. 1 is a schematic View of a typical plasma etching
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`apparatus on which the process of the invention can be
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`performed
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`FIG. 2 is a flow diagram that depicts the process steps of
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`the subject invention.
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`DETAILED DESCRIPTION OF TI-IE
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`PREFERRED EMBODIMENTS
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`Referring now to FIG. 1 of the drawing, there is depicted
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`a plasma etching apparatus, provided with an electrostatic
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`chuck (ESC), which is typical of the apparatus which can be
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`cleaned by applicants process.
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`The apparatus has a process chamber made up of an upper
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`case 10, and a lower case 12, The upper and lower cases are
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`made of a conductive material, such as aluminum. The lower
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`case 12 has a cylindrical shape with a bottom so that an
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`insulating ceramic frame 14 can be fitted therein. An elec-
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`trostatic chuck 16 has a conductive sheet 18, serving as a
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`chuck electrode, that is sandwiched between upper and
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`lower dielectric sheets 20 and 22, preferably made of
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`polyimide. A DC power somce 24 is connected to chuck
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`electrode 18 through a feeder path 26 and switch 28. When
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`a high voltage is applied to electrode 18 from power source
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`24, a Coulomb force is generated between wafer W and
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`electrode 18 which attracts and holds the wafer W on the
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`ESC 16.
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`In order to improve the heat transfer between the waferW
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`and the ESC 16, a heat medium, such as He, is supplied
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`between the wafer and ESC 16. The heat transfer gas is
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`supplied through a line" 30 extending through the ESC 16,
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`the ceramic frame 14, and plates 32 and 34. Line 30 is
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`connected to a gas source 36 through a mass flow controller
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`38. In addition, a vacuum pump 40, having a variable
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`exhaust conductance, is connected to line 30. Pump 36 is
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`controlled by a pressure controller 42 for detecting the
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`internal pressure of line 30. Line 30 is connected to grooves
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`(not shown) in the top surface of dielectric sheet 20 of ESC
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`16.
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`A plurality of pusher pins 44 that extend through ESC 16,
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`plates 32 and 34, ceramic frame 14, and lower case 12 are
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`provided for lifting the wafer W off the ESC 16. The pins are
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`moved to the extended or withdrawn position by motor 46.
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`Preferably, susceptor 34 is provided with a cooling jacket
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`48 to cool the wafer W. A vacuum pump 50 is connected to
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`process chamber, through pipe 52, to exhaust gas from the
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`Page 4 of 5
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`5,746,928
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`3
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`chamber. A source 54 of etching gas is connected to chamber
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`through pipe 56. The upper case 10 is grounded, and an RF
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`power source 58 is connected to susceptors 32 and 34, and
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`conductive plate 60. A switch 62 and an impedance tuner 64
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`control the power supplied by RF power source 58.
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`Referring now to FIG. 2 of the drawings, there is depicted
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`a flow chart which sets forth the process steps of the
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`invention for cleaning debris and contamination from an
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`ESC of the type shown in FIG. 1. and described above. The
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`debris to be removed consists mainly of small particles of
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`semiconductor material that has been inadvertently broken
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`off wafers being processed. However dust particles and other
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`extraneous material can also become lodged on the vacuum
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`chuck. In addition, other contamination may be deposited on
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`the ESC from photoresist residue, polymer generation dur-
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`ing the plasma etch process, hardware erosion, such as AL
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`C13 power. and the like.
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`The ESC is very sensitive to particle contamination on the
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`surface of the wafer support surface. Particles and debris
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`may change the electrostatic field distribution between the
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`wafer and chuck. Further, the presence of particle contami-
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`nation will cause higher He leakage, uon—uniform wafer
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`temperatures, and varying process performance, i.e. non-
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`uniform etching rates etc. The back side helium flow cooling
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`is based on the assumption of smooth contact surfaces
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`between the chuck surface and wafer surface. The lower the
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`He leak rate. the better the cooling efliciency. The back side
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`He leakrate can be used as an index for the back side cooling
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`efliciency.
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`Presently the ESC is cleaned by pump purging for at least
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`50 times. This procedure takes at least 90 minutes and is
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`frequently ineffective. Another cleaning technique is to wet
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`clean the chuck. This procedure takes at least four hours and
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`requires the process chamber to be opened.
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`In the cleaning process of the invention, the process
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`chamber need not be opened,
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`applications, and the time required is minimal.
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`In the process of the invention for cleaning an ESC, a
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`dummy wafer is placed on the wafer chuck, as indicated by
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`block 101 of FIG. 2. The process chamber is evacuated, as
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`indicated by block 102, and an RF voltage is applied, as
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`indicated by block 103. The RF voltage is applied across the
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`electrodes within the process chamber, as is conventional, to
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`provide a plasma. The applied RF voltage that is applied
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`should have a wattage in excess of tie normal operating
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`wattage used in plasma etching operations. Preferably the
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`wattage appliedis 100% to 120% of the normal wattage. The
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`RF voltage is applied for a time sufficient to cause the debris
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`and contamination to adhere to the dummy wafer. The time
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`is preferably greater than 15 seconds, more preferably in_the
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`range of 20 to 30 seconds.
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`The RF voltage is then turned ofi, as indicated by block
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`104, and the dummy wafer with the adhering debris and
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`contamination is removed from the ESC, as indicated by
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`block 105.
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`A process wafer is then placed on the chuck electrode and
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`processed. After the air has been evacuated, the source of
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`DC power and the inert gas is applied to the chuck electrode.
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`The gas leakage can be monitored to check the cleanliness
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`of the chuck electrode surface. If the leakage is higher than
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`the normal leakage with a clean chuck surface, the cleaning
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`process should be repeated. The leakage is an indicator of
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`the cleanliness of the chuck surface.
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`Additional advantages and modifications will readily
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`occur to those skilled in the art. Therefore, the invention in
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`its broader aspects is not limited to the specific details. and
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`illustrated examples shown and described herein. Accord-
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`ingly. various modifications may be made without departing
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`from the spirit or scope of the general inventive concept as
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`defined by the appended claims and their equivalents.
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`What is claimed is:
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`1. A process for cleaning debris and contamination from
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`the surface of an electrostatic chuck of a plasma etching
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`apparatus having a process chamber, a source of RF power,
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`an electrostatic wafer chuck within the process chamber, a
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`chuck electrode, and a source of DC power connected to said
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`chuck electrode comprising;
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`placing a dummy wafer on and in direct contact with the
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`electrostatic wafer chuck,
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`evacuating the process chamber,
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`applying an RF voltage with a wattage in excess of the
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`normal wattage applied during nonnal etching
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`procedure, while refraining to apply the DC power to
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`the chuck electrode,
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`turning off the RF power,
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`removing the dummy wafer and the adhering debris and
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`contamination.
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`2. The method of claim 1 wherein the wattage of the
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`applied RF voltage is in the range of 100 to 120% of the
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`wattage applied during normal etching procedure.
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`3. The method of claim 2 wherein the RF power is applied
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`for a time in the range of 20 to 30 seconds.
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`4. The method of claim 1 wherein the cleaning process is
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`performed periodically by inserting dummy wafers into
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`' cassettes of wafers to be processed, and sequentially placing
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`the wafers and dummy wafers on the chuck for etching or
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`cleaning the chuck.
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`S. The method of claim 1 wherein the RF voltage is
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`applied across the process chamber and the wafer chuck.
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`6. The method of claim 1 which further includes testing
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`the cleanliness of the chuck. comprising;
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`providing a groove system in the top surface of the chuck,
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`placing a clean semiconductor wafer on the wafer chuck,
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`ecacuating the air from the process chamber,
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`applying a source of DC power to the chuck electrode to
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`secure the wafer to the chuck,
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`introducing an inert gas into te groove system in the wafer
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`chuck, and
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`monitoring the gas leakage fiom the groove system.
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`7. The method of claim 1 wherein the RF voltage is
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`applied for a time greater than 15 seconds.
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`*
`=1:
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`*
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`55
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`Page 5 of 5