throbber

`
`Filed on behalf of TQ Delta, LLC
`By: Peter J. McAndrews
`Thomas J. Wimbiscus
`Scott P. McBride
`Christopher M. Scharff
`McAndrews, Held & Malloy, Ltd.
`500 W. Madison St., 34th Floor
`Chicago, IL 60661
`Tel: 312-775-8000
`Fax: 312-775-8100
`E-mail: pmcandrews@mcandrews-ip.com
`
`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`_____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_____________
`
`DISH NETWORK L.L.C.,
`Petitioner,
`v.
`
`TQ DELTA, LLC,
`Patent Owner.
`_____________
`
`Case IPR2016-01470
`Patent No. 8,611,404
`_____________
`
`PATENT OWNER’S RESPONSE
`
`
`
`
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`

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`Patent Owner’s Response
`IPR2016-01470
`
`TABLE OF CONTENTS
`
`
`
`
`I.
`
`INTRODUCTION ........................................................................................... 1
`
`II.
`
`OVERVIEW OF U.S. PATENT No. 8,611,404 ............................................. 4
`
`A. Background of the Technology .............................................................. 4
`
`B. The ’404 Patent ....................................................................................... 7
`
`III. Overview of the cited references ..................................................................... 9
`
`A. Bowie ...................................................................................................... 9
`
`B. Vanzieleghem ....................................................................................... 14
`
`C. The 1995 ADSL Standard .................................................................... 15
`
`IV. LEVEL OF ORDINARY SKILL IN THE ART ........................................... 18
`
`V.
`
`CLAIM CONSTRUCTION .......................................................................... 19
`
`A.
`
`“Low Power Mode,” “Fine Gain Parameter,” “Transceiver” ............. 19
`
`B.
`
`“Synchronization Signal” ..................................................................... 19
`
`C.
`
`“Parameter Associated with the Full Power Mode Operation” .......... 23
`
`VI. PETITIONER HAS FAILED TO SHOW THAT THE CLAIMS OF
`THE ’404 PATENT ARE UNPATENTABLE ............................................. 25
`
`A. Petitioner Has Failed To Establish That Bowie Discloses Storing
`In A Low Power Mode A “Parameter Associated With the Full
`Power Mode Operation” ..................................................................... 25
`
`B.
`
`Petitioner Has Failed To Establish That “Storing, In the Low
`Power Mode . . . At Least One of a Fine Gain Parameter and a
`Bit Allocation Parameter” Would Have Been Obvious Over
`Bowie, Vanzieleghem, and the 1995 ADSL Standard ........................ 31
`
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`Patent Owner’s Response
`IPR2016-01470
`
`1.
`
`2.
`
`Petitioner Provides No Non-Conclusory or Non-
`Hindsight Reasons to Modify Bowie to Store Parameters
`That
`the 1995 ADSL Standard Only Discloses
`Exchanging ................................................................................ 32
`
`
`
`Bowie’s Teachings Undermine Petitioner’s Reasons for
`Modifying It to Store Bit Allocation or Fine Gain
`Parameters in a Low Power Mode ............................................ 35
`
`C.
`
`Petitioner Has Failed to Establish That Bowie Discloses
`“[Exit/Exiting] From the Low Power Mode and
`[Restore/Restoring] the Full Power Mode . . . Without Needing
`to Reinitialize the Transceiver” ........................................................... 38
`
`1.
`
`2.
`
`Bowie Discloses That Its Transceiver Does Undergo
`Reinitialization .......................................................................... 38
`
`Bowie Would Have Led A POSITA Away From the
`Inventions of the ’404 Patent .................................................... 40
`
`D. Petitioner Has Failed to Establish That It Would Have Been
`Obvious to Modify Bowie to Receive a “Synchronization
`Signal” in the Low Power Mode ......................................................... 42
`
`1.
`
`2.
`
`Bowie Taught Away From the Proposed Modification
`Because It Would Greatly Reduce Bowie’s Power
`Savings ...................................................................................... 43
`
`The Proposed Modification Would Render Bowie’s Low
`Power Mode Inoperable ............................................................ 46
`
`VII. CONCLUSION .............................................................................................. 49
`
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`Patent Owner’s Response
`IPR2016-01470
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`TABLE OF EXHIBITS
`
`Exhibit 2005
`
`
`Exhibit 2003 Declaration of Douglas A. Chrissan, Ph.D. for Inter Partes Review
`No. IPR2016-01470
`
`Exhibit 2004 May 3, 2017 Deposition Transcript of Leo Hoarty (IPR2016-
`01470)
`
`IEEE 100 The Authoritative Dictionary of IEEE Standards Terms,
`Seventh Edition
`
`Exhibit 2006 Curriculum Vitae of Douglas A. Chrissan, Ph.D.
`
`Exhibit 2007 Merriam-Webster’s Collegiate Dictionary, 10th Ed. (2003) at 70
`
`Exhibit 2008 Dictionary Of Networking, Third Edition (1999) at 360
`
`iii
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`Patent Owner’s Response
`IPR2016-01470
`
`I.
`
`INTRODUCTION
`
`
`
`The Board instituted inter partes review of four claims (6, 11, 16, and 20) of
`
`U.S. Pat. No. 8,611,404 (“the ’404 patent”) based on a single Ground—alleged
`
`obviousness in view of a combination of U.S. Patent No. 5,956,323 (“Bowie”),
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`U.S. Patent No. 6,247,725 (“Vanzieleghem”), and the American National
`
`Standards Institute (ANSI) T1.413-1995 Standard, entitled “Network and
`
`Customer Installation Interfaces—Asymmetric Digital Subscriber Line (ADSL)
`
`Metallic Interface” (the “1995 ADSL Standard”).
`
`For purposes of institution, however, the Board accepted as true several
`
`unsupported factual statements by Petitioner and its expert that are incorrect and
`
`contradicted by the asserted references themselves. The Board did not have the
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`benefit of a complete record with respect to how a person of ordinary skill in the
`
`art (“POSITA”) would have understood the teachings of the cited references.
`
`Therefore, Patent Owner provides additional details and technical explanations
`
`from Dr. Douglas Chrissan, an expert in DSL technologies, along with further legal
`
`support, that show that a POSITA would not have found the claims of the ’404
`
`patent obvious in view of Bowie, Vanzieleghem, and the 1995 ADSL Standard.
`
`First, Petitioner has not established that any of the references teaches or
`
`suggests the limitation of storing, in the low power mode, at least one “parameter
`
`associated with full power mode operation,” as required by each of the instituted
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`1
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`Patent Owner’s Response
`IPR2016-01470
`
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`claims. Petitioner only points to Bowie for this limitation. But Bowie discloses
`
`storing only “loop characteristics,” which are not associated with the “full power
`
`mode operation.” Indeed, loop characteristics, as disclosed in Bowie, are not
`
`associated with any power mode or operation.
`
`Second, Petitioner has not established that the combination of Bowie and the
`
`1995 ADSL Standard renders obvious “stor[ing], in the low power mode . . . at
`
`least one of a fine gain parameter and a bit allocation parameter,” which is also
`
`recited by all of the claims. Again, Bowie only discloses storing “loop
`
`characteristics.” The 1995 ADSL Standard’s disclosure of exchanging (not
`
`storing) fine gain and bit allocation parameters for a different purpose does not fill
`
`in this gap. And Petitioner’s only purported reasons for modifying Bowie and the
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`1995 ADSL Standard to store these parameters in a low power mode, are either (a)
`
`wholly conclusory and mere hindsight or (b) technologically incorrect. For
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`example, Petitioner’s argument that Bowie could simply store “more data” or “add
`
`more parameters to storage” is not a reason to do so. And Petitioner’s argument
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`that storing these particular parameters would enable Bowie to resume data
`
`transmission “faster” is both technologically false and unsupported by any
`
`evidence that doing so would have been known to a POSITA. In fact, Bowie’s
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`own teachings undermine Petitioner’s theory.
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`Patent Owner’s Response
`IPR2016-01470
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`Third, Petitioner has not established that the combination of Bowie and the
`
`1995 ADSL Standard renders obvious the limitation of “exit[ing] from the low
`
`power mode and restor[ing] the full power mode . . . without needing to reinitialize
`
`the transceiver,” which is also recited by all of the claims. Petitioner again relies
`
`only on Bowie for this limitation, but Bowie teaches that some reinitialization is
`
`required. Moreover, Bowie would lead a POSITA on a path divergent from that
`
`taken by the inventors of the ’404 patent. Specifically, Bowie discloses a
`
`transceiver that performs reinitialization upon coming out of low power mode for
`
`the sake of insuring reliable transmission parameters upon the resumption of data
`
`transmission. In contrast, the inventions of the ’404 patent do not reinitialize upon
`
`coming out of low power mode for the sake of a speedy resumption of data
`
`transmission (but at the risk of using parameters that will result in errored
`
`transmissions).
`
`Fourth, Petitioner has not established that the cited references disclose,
`
`teach, or render obvious the limitation of receiving “in the low power mode, a
`
`synchronization signal,” which is recited by all of the challenged claims.
`
`Petitioner argues that Vanzieleghem disclosed a synchronization signal by teaching
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`a “pilot tone.” Petitioner, however, has not established that it would have been
`
`obvious to modify Bowie to transmit or receive such a pilot tone in the low power
`
`mode. In fact, modifying Bowie as Petitioner proposes would render Bowie
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`Patent Owner’s Response
`IPR2016-01470
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`inoperable for its intended purpose of reducing power consumption—among other
`
`things, Vanzieleghem’s pilot tone would cause Bowie to constantly wake up to
`
`return to full power mode.
`
`Accordingly, Petitioner’s single Ground for alleged obviousness fails.
`
`Patent Owner respectfully requests that the Board issue a Final Written Decision
`
`upholding the patentability of claims 6, 11, 16, and 20 of the ’404 patent.
`
`II. OVERVIEW OF U.S. PATENT NO. 8,611,404
`
`The ’404 patent, entitled “Multicarrier Transmission System with Low
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`Power Sleep Mode and Rapid-On Capability,” issued on December 17, 2013, to
`
`Patent Owner TQ Delta, LLC. The inventions of the ’404 patent represented a
`
`significant improvement in the field of multicarrier transmission systems and
`
`multicarrier transceivers. In particular, the ’404 patent teaches a transceiver that
`
`saves energy by operating in a low power mode, but that can go rapidly from the
`
`low power mode back to a full power mode, without needing to reinitialize the
`
`transceiver, when it is needed to transmit or receive data. See Ex. 2003, Chrissan
`
`Decl. at ¶ 15.
`
`A. Background of the Technology
`
`Multicarrier transmission systems provide high speed data links between
`
`communication points. See Ex. 1001 at 1:37-38; Ex. 2003, Chrissan Decl. at ¶ 16.
`
`A digital subscriber
`
`loop (“DSL”) system
`
`is an exemplary multicarrier
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`Patent Owner’s Response
`IPR2016-01470
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`transmission system that is used to provide high-speed data communication over
`
`the same local subscriber loop that is used to provide telephone service to a
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`subscriber. See Ex. 1001 at 1:38-41; Ex. 2003, Chrissan Decl. at ¶ 16. In a DSL
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`system, the overall communication bandwidth of the communication channel
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`between the subscriber and the central office is divided into a number of separate
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`sub-channels or carriers, e.g., 256 sub-channels. See Ex. 1001 at 1:48-55; Ex.
`
`2003, Chrissan Decl. at ¶ 16. A transceiver divides data to be transmitted into
`
`groups of bits, allocates each group of bits to a sub-channel, and modulates each
`
`group of bits onto its respective sub-channel. See Ex. 1001 at 1:63-66; Ex. 2003,
`
`Chrissan Decl. at ¶ 16.
`
`Prior to exchanging data over the channel, the DSL transceivers first go
`
`through an initialization process. See Ex. 1001 at 3:7-9; Ex. 2003, Chrissan Decl.
`
`at ¶ 17. The initialization process includes several distinct phases. The first phase
`
`involves synchronizing the timing references of the transceivers. The transceivers
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`synchronize their timing by exchanging information to synchronize and “lock” the
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`timing of their respective clocks. Ex. 2003, Chrissan Decl. at ¶ 18. This is called
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`“timing synchronization” or “clock synchronization.” Id.
`
`After timing synchronization, the initialization process goes into its next
`
`phase, during which the transceivers determine characteristics of the wire loop
`
`connecting the transceivers, i.e., loop characteristics. Ex. 2003, Chrissan Decl. at
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`Patent Owner’s Response
`IPR2016-01470
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`¶¶ 19, 61. Attenuation is an example of a loop characteristic. Id. at ¶ 19; Ex. 2004
`
`at 40:6-10. Attenuation is the reduction in signal power a signal experiences as it
`
`travels across the wire from the originating transceiver to the destination
`
`transceiver. Ex. 2003, Chrissan Decl. at ¶ 19. Attenuation is a function of
`
`different physical characteristics of the wire loop, such as the length, diameter, and
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`composition. Id. Loop background noise is another example of a loop
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`characteristic. Id.
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`Once the loop characteristics are determined, the initialization process
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`continues with a sub-channel characterization and analysis phase. During this
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`phase, the transceivers determine equalization settings and echo canceller settings
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`and measure signal to noise ratios (“SNR”) on a sub-channel basis. Id. at ¶ 20.
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`SNR is a function of loop characteristics such as line noise levels and attenuation.
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`Id.
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`In
`
`the
`
`last phase of
`
`initialization,
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`the sub-channel characterization
`
`information, including SNR, is used to determine transmission parameters that are
`
`used for data transmission. See id.; Ex. 1001 at 3:10-20. Examples of
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`transmission parameters include transmission and reception data rates, fine gain
`
`parameters, and bit allocation parameters. Transmission parameters are specific to
`
`and conform to the communication protocol used for data transmission. See Ex.
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`Patent Owner’s Response
`IPR2016-01470
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`2003, Chrissan Decl. at ¶ 72. The transceivers then go through the step of
`
`exchanging the transmission parameters. Id. at ¶ 20.
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`When initialization has finished, the transceivers can start exchanging data
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`using the transmission parameters. Id. at ¶ 21. In the context of DSL, data is sent
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`in superframes. A superframe includes 68 data frames or DMT symbols followed
`
`by a synchronization frame or sync symbol. See id. The transceivers count the
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`received frames and may use their respective timing references to synchronize their
`
`respective frame counters. See Ex. 1001 at 5:51–52. A transceiver may use the
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`received synchronization frame to identify, in part, the superframe boundaries and
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`maintain superframe alignment or synchronization. Ex. 2003, Chrissan Decl. at ¶
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`21. This is known as “frame synchronization.” Id. at ¶ 53. Timing
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`synchronization is not the same as frame synchronization.
`
`B.
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`The ’404 Patent
`
`The ’404 Patent recognizes that prior art multicarrier transceivers were
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`commonly maintained in the “on” state because of their complexity and because
`
`they had to remain ready to immediately transmit or receive data. See Ex. 1001 at
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`2:55-58; Ex. 2003, Chrissan Decl. at ¶ 22. In this “on” state, both the transmitter
`
`and receiver portion of a prior art transceiver remained fully functional at all times.
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`As a result, the multicarrier transceivers used a significant amount of power and
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`had short life spans. See Ex. 1001 at 2:58-63; Ex. 2003, Chrissan Decl. at ¶ 22.
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`Patent Owner’s Response
`IPR2016-01470
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`Although low power modes (in which data communications are temporarily
`
`suspended) were known in the prior art, they were unsatisfactory because, after
`
`exiting the low power mode, the transceivers still had to go through the lengthy re-
`
`initialization process to determine parameters necessary for full data transmission.
`
`See Ex. 1001 at 3:23-30; Ex. 2003, Chrissan Decl. at ¶ 22. The initialization
`
`process could take, for example, “tens of seconds.” This was unacceptable because
`
`users typically desired near-instantaneous response for data communications. See
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`Ex. 1001 at 3:23-25; Ex. 2003, Chrissan Decl. at ¶¶ 21-22. This inability to rapidly
`
`return to full power mode meant that conventional multicarrier transceivers were
`
`always kept “on” even in the absence of data communications, resulting in high
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`power consumption.
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`The inventions of the ’404 patent (e.g., Claims 1-20) provide a unique low
`
`power mode that improves the operation of multicarrier transceivers. The
`
`inventions allow the multicarrier transceiver to enter a low power mode (and thus
`
`save power) while maintaining a framework that enabled rapid return to full data
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`communication capability. See Ex. 1001 at 3:31-33. The inventive framework for
`
`rapid-on capability includes maintaining synchronization between first and second
`
`transceivers by transmitting or receiving a synchronization signal while in the low
`
`power mode, reducing power consumption of at least one portion of a transmitter,
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`Patent Owner’s Response
`IPR2016-01470
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`and/or storing, while in the low power mode, parameters used for full power mode
`
`data transmission (such as fine gain or bit allocation parameters).
`
`Storing parameters associated with full-power mode and maintaining
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`synchronization in the low power mode allows the claimed multicarrier transceiver
`
`to rapidly emerge from the low power mode and resume full data transmission
`
`immediately without the necessity of performing time-consuming steps to re-
`
`initialize the transceivers. Id. at 7:13-15, 8:4-13; Ex. 2003, Chrissan Decl. at ¶ 23.
`
`Thus, the claims of the ’404 patent address the deficiencies of prior art
`
`transceivers that implement a low power mode by eliminating the need for a
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`constant “on” mode while still providing the desired near-instantaneous response.
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`Ex. 1001 at 3:38–41. As discussed below, none of Bowie, Vanzieleghem, and the
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`1995 ADSL Standard teaches or suggests the novel systems and methods of the
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`’404 patent, and, in fact, those references disclose systems that operate very
`
`differently.
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`III. OVERVIEW OF THE CITED REFERENCES
`
`A. Bowie
`
`Bowie relates to a power conservation method for an asymmetric digital
`
`subscriber line (“ADSL”) system. See Ex. 1004, Bowie at 1:4-8, 1:23-25; Ex.
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`2003, Chrissan Decl. at ¶ 25. Bowie’s system differs significantly from the
`
`inventive system of the ’404 patent because, among other things, it shuts down all
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`Patent Owner’s Response
`IPR2016-01470
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`the data receiving, data transmission, and signal processing circuitry in its
`
`disclosed low power mode, does not store bit allocation or fine gain parameters in
`
`the low power mode, does not send or receive a synchronization signal in the low
`
`power mode, and requires reinitialization after coming out of the low power mode.
`
`As shown below, the Bowie system uses ADSL units (e.g., modems) that are
`
`connected by a wire loop 120. Each ADSL unit includes signal processing
`
`electronics 111, data transmit circuitry 112, data receive circuitry 113, and a
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`resume signal detector 115 (which can be “a 16kHz AC signal detector 115 that
`
`employs conventional frequency detection techniques”). See Ex. 1004, Bowie at
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`5:52-55; Ex. 2003, Chrissan Decl. at ¶ 25.
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`Patent Owner’s Response
`IPR2016-01470
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`Bowie explains that, prior to data being sent between two ADSL units over
`
`the loop, loop characteristics, such as “loop loss,” (i.e., attenuation) must be
`
`determined and exchanged. See Ex. 1004, Bowie at 4:64-5:3. Bowie describes
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`this exchange of loop characteristics as “handshaking.” See id. at 5:3-5; Ex. 2003,
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`Chrissan Decl. at ¶ 26.
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`Bowie further teaches that when an ADSL unit receives a shut-down signal,
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`it enters a low power mode in which the signal processing, data transmit, and data
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`receive circuitry all shut down; only the resume signal detector remains
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`operational. See Ex. 1004, Bowie at 5:17-28. In the low power mode, the loop in
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`Bowie is “in an inactive state.” Id. at 5:28-29; Ex. 2003, Chrissan Decl. at ¶ 27.
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`As Bowie explains, shutting down the transmitting, receiving, and signal
`
`processing circuitry, i.e., most of the transceiver’s circuitry, saves a significant
`
`amount of power – up to five watts per loop. See Ex. 1004, Bowie at 2:1-6. Bowie
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`further teaches that, upon entering the low power mode, the ADSL units may
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`“store[] in memory 117 characteristics of the loop 220 that were determined by . . .
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`handshaking.” Ex. 1004, Bowie at 5:17-28. Such loop characteristics would
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`include things like attenuation, i.e., “loop loss.” Ex. 2003, Chrissan Decl. at ¶¶ 19,
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`28. Importantly, and unlike the inventions of the ’404 patent, Bowie does not
`
`teach storing bit allocation or fine gain parameters in the low power mode. Id. at ¶
`
`28.
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`Patent Owner’s Response
`IPR2016-01470
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`Upon receipt of a “resume signal” at the resume signal detector 115, the
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`Bowie unit “returns the signal processing 111, transmitting 112, and receiving 113
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`circuitry to full power mode.” Id. at 5:60-62; Ex. 2003, Chrissan Decl. at ¶ 29. “If
`
`loop transmission characteristics had been stored, these parameters are retrieved
`
`from memory 117 and used to enable data transmission to resume quickly by
`
`reducing the time needed to determine loop transmission characteristics.”1 Ex.
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`1004, Bowie at 5:62-66; Ex. 2003, Chrissan Decl. at ¶ 29. In this way, Bowie
`
`teaches using the stored loop characteristics as a starting point for determining the
`
`transmission parameters that are necessary for returning to full data transmission
`
`after coming out of the low power mode. Ex. 2003, Chrissan Decl. at ¶ 29; Ex.
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`1004, Bowie at Fig. 3 (step 306), 6:26-45 (describing additional handshaking after
`
`coming out of low power mode).
`
`According to Bowie, the additional handshaking (i.e., reinitialization) that
`
`occurs before returning to full data transmission includes a re-determination of
`
`loop characteristics to account for changes in loop characteristics that occurred
`
`
`1 Bowie uses the terms “loop characteristics,” “electronic characteristics of the
`
`particular wire loop,” “loop transmission characteristics,” and “loop characteristic
`
`parameters” interchangeably. Ex. 1004, Bowie at 5:1-3, 5:23-25, 5:62-66, 6:25-33;
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`Ex. 2003, Chrissan Decl. at ¶ 26.
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`Patent Owner’s Response
`IPR2016-01470
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`while the system was in the low power mode. See Ex. 2003, Chrissan Decl. at ¶
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`30; Ex. 1004, Bowie at 5:65-66 (“. . . reducing the time needed to determine loop
`
`transmission characteristics.”); id. At 66-6:1 (“After resumption of full power
`
`mode, additional handshaking between ADSL units 232 and 242 may occur.”); id.
`
`at 6:37-45 (“Handshaking information may be required [after coming out of low
`
`power mode] where, for example, loop characteristics have changed due, for
`
`example, to temperature-dependent changes in loop resistance.”); Ex. 2004 at 91:3-
`
`15 (“Q. Bowie does not teach, don’t redetermine loop characteristics? A. I think
`
`a POSITA would know, if he were to teach that, that would be incorrect, and it
`
`could not function as a circuit.”) (objections omitted). Re-determining the loop
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`characteristics after coming out of low power mode is required to ensure “reliable
`
`data communication between the units.” Ex. 1004, Bowie at 6:36-37; Ex. 2003,
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`Chrissan Decl. at ¶ 30.
`
`Accordingly, in contrast to the inventions of the ’404 patent, Bowie teaches
`
`that reinitialization (i.e., re-determining the loop characteristics and exchanging
`
`handshaking information) must occur when the transceiver comes out of the low
`
`power mode. See Ex. 1004, Bowie at 5:62-6:2, 6:35-43; Ex. 2003, Chrissan Decl.
`
`at ¶ 31.
`
`Bowie also differs from the inventions of the ’404 patent in that it does not
`
`transmit or receive a synchronization signal when in the low power mode. Ex.
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`Patent Owner’s Response
`IPR2016-01470
`
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`2003, Chrissan Decl. at ¶ 33. Indeed, Bowie cannot transmit or receive a
`
`synchronization signal when in the low power mode because all of the transceiver
`
`circuitry except for the resume signal detector is shut off in a low power mode in
`
`order to save power. Ex. 1004, Bowie at 5:25-28.
`
`B. Vanzieleghem
`
`Vanzieleghem discloses a multicarrier transmission system that differs
`
`significantly from both
`
`the
`
`inventions of
`
`the ’404 patent and Bowie.
`
`Vanzieleghem discloses an ADSL transmitter for a multicarrier system that can
`
`reduce power dissipation during operation depending on the type of input data it is
`
`being asked to transmit. See Ex. 1005, Vanzieleghem at 4:46-50, 6:29-36; Ex.
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`2003, Chrissan Decl. at ¶ 34. The input data may be either effective data or idle
`
`data. See Ex. 1005, Vanzieleghem at 5:33-35; Ex. 2003, Chrissan Decl. at ¶ 34.
`
`When effective data is to be transmitted, the transmitter uses all of its carriers (e.g.,
`
`256 carriers) to send the data to a receiver. See Ex. 1005, Vanzieleghem at 5:66-
`
`6:15; Ex. 2003, Chrissan Decl. at ¶ 34. When the transmitter has only idle data to
`
`transmit, it reduces power dissipation by transmitting on a reduced number of
`
`carriers. See Ex. 1005, Vanzieleghem at 6:30-41; Ex. 2003, Chrissan Decl. at ¶ 34.
`
`Vanzieleghem teaches maintaining frame synchronization with a receiver by
`
`periodically sending a synchronization symbol as part of a superframe. See Ex.
`
`1005, Vanzieleghem at 6:59–61; 5:53–65; Ex. 2003, Chrissan Decl. at ¶ 34.
`
`
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`Patent Owner’s Response
`IPR2016-01470
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`Unlike the claimed transceivers of the ’404 patent, Vanzieleghem does not
`
`disclose storing, in a low power mode, any transmission parameters such as fine
`
`gain or bit allocation parameters. Ex. 2003, Chrissan Decl. at ¶ 35. Vanzieleghem
`
`also does not disclose exiting a low power mode and restoring a full power by
`
`using stored transmission parameters. Id. Further, Vanzieleghem does not teach
`
`restoring a full power mode without re-initialization. Id.
`
`Moreover, unlike Bowie – which teaches reducing power by completely
`
`shutting down the transmitter, receiver, and signal processing circuitry –
`
`Vanzieleghem teaches reducing power usage of only the transmitter. Id. Thus,
`
`Bowie’s low power mode saves more power than Vanzieleghem’s. Id.
`
`C. The 1995 ADSL Standard
`
`The 1995 ADSL Standard discloses electrical characteristics of ADSL
`
`signals appearing at a network interface and the requirements for transmission
`
`between a network and customer installation. Ex. 1006, 1995 ADSL Standard at 1;
`
`Ex. 2003, Chrissan Decl. at ¶ 36. In its obviousness argument, Petitioner relies on
`
`the 1995 ADSL Standard, in part, for teaching determining fine gains and bit
`
`allocations as part of the initialization process. Pet. at 40. Importantly, the 1995
`
`ADSL Standard teaches that, in the context of ADSL transceiver initialization, bit
`
`allocation and fine gain parameters are different than, and, in fact, are determined
`
`in part from, loop characteristics like those disclosed in Bowie.
`
`
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`Patent Owner’s Response
`IPR2016-01470
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`In that regard, the 1995 ADSL Standard explains that initialization includes
`
`separate, sequential steps of determining loop characteristics and then determining
`
`bit and gain parameters based on the loop characteristics and other information.
`
`See Ex. 2003, Chrissan Decl. at ¶ 37. For example, the 1995 ADSL Standard
`
`states “[o]ne part of the ADSL initialization and training sequence estimates the
`
`loop characteristics to determine whether the number of bytes per Discrete
`
`MultiTone (DMT) frame required for the requested configuration’s aggregate data
`
`rate can be transmitted across the given loop.” Ex. 1006, 1995 ADSL Standard at
`
`9. The 1995 ADSL Standard also states that “each receiver communicates to its
`
`far-end transmitter the number of bits and relative power levels to be used on each
`
`DMT sub-carrier [i.e., bit allocation and fine gain parameters], as well as any
`
`messages and final data rates information. For highest performance these settings
`
`shall be based on the results [e.g.,, loop characteristics] obtained through the
`
`transceiver training and channel analysis procedures.” Ex. 1006, 1995 ADSL
`
`Standard at 87 (emphasis added). In this way, the 1995 ADSL Standard clearly
`
`distinguishes between collecting loop characteristics, on one hand, and determining
`
`and exchanging bit allocation and fine gain parameters, on the other hand. See Ex.
`
`2003, Chrissan Decl. at ¶ 37.
`
`Though the 1995 ADSL Standard describes the steps taken to initialize and
`
`operate an ADSL transceiver, the described technology differs in important ways
`
`
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`16
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`Patent Owner’s Response
`IPR2016-01470
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`from the inventions of the ’404 patent. Specifically, the 1995 ADSL Standard does
`
`not describe, anywhere, operating in a low power mode, going into a low power
`
`mode, or coming out of a low power mode. Ex. 2003, Chrissan Decl. at ¶ 38. The
`
`1995 ADSL Standard, therefore, does not disclose storing bit allocation or fine
`
`gain parameters in a low power mode or how to use those parameters to avoid re-
`
`initialization when coming out of a low power mode. Ex. 2003, Chrissan Decl. at ¶
`
`38.
`
`Moreover, it is important to note that the ’404 patent teaches avoiding the
`
`initialization steps disclosed in the 1995 ADSL Standard when transitioning from a
`
`low power mode to a full power mode. See Ex. 1001 at 10:16-18, Ex. 2003,
`
`Chrissan Decl. at ¶ 23. None of the 1995 ADSL Standard, Bowie, and
`
`Vanzieleghem – either alone or in combination with the other references – teaches
`
`such capability. Bowie and Vanzieleghem do not teach avoiding redetermination
`
`of bit allocation and fine gain parameters. Ex. 2003, Chrissan Decl. at ¶¶ 31, 35.
`
`Furthermore, Bowie, despite disclosing storing loop characteristics, specifically
`
`teaches
`
`that determination and exchange of
`
`those characteristics
`
`(i.e.,
`
`“handshaking information”) occurs upon coming out of the low power mode. Ex.
`
`2003, Chrissan Decl. at ¶ 31; Ex. 1004, Bowie at 5:62-6:2, 6:35-45. And Mr.
`
`Hoarty concedes that handshaking discussed in Bowie is synonymous with
`
`initialization. See Ex. 2004 at 109:21-110:10. Similarly, Vanzieleghem does not
`
`
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`Patent Owner’s Response
`IPR2016-01470
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`teach avoiding the step of determining loop characteristics. And, of course,
`
`because the 1995 ADSL Standard does not provide any low power mode or teach
`
`storing any transmission parameters when a DSL transceiver is turned off, it does
`
`not teach avoiding any initialization steps upon coming out of a low power mode.
`
`Ex. 2003, Chrissan Decl. at ¶ 38.
`
`In addition, the Bowie device, when in the low power mode, does not
`
`comply with the 1995 ADSL Standard. The 1995 ADSL Standard teaches that the
`
`“mandatory control (C) channel” in the ADSL system “shall always be active.”
`
`Ex. 1006, 1995 ADSL Standard at 13; Ex. 2003, Chrissan Decl. at ¶ 38. Bowie,
`
`however, teaches that the loop has to be inactive when the system is in low power
`
`mode. Ex. 1004, Bowie at 5:28-29; Ex. 2003, Chrissan Decl. at ¶ 27. As such, the
`
`1995 ADSL Standard precludes the low power mode of the Bowie device. Ex.
`
`2003, Chrissan Decl. at ¶ 104.
`
`IV. LEVEL OF ORDINARY SKILL IN THE ART
`
`As of January 1998, and with respect to the ’404 patent, a POSITA would
`
`have had an electrical engineering background and experience in the design of
`
`multicarrier communication systems, such as
`
`those employing orthogonal
`
`frequency division multiplexing or discrete multitone modulation. Ex. 2003,
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`Chrissan Decl. at ¶¶ 47-48. Such a POSITA would have had a bachelor’s degree in
`
`electrical engineering (or a similar technical degree or equivalent work experience)
`
`
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`18
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`Patent Owner’s Response
`IPR2016-01470
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`and at least 3 years of experience working with such multicarrier communication
`
`systems. See id.
`
`V. CLAIM CONSTRUCTION
`
`A.
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`“Low Power Mode,” “Fine Gain Parameter,” “Transceiver”
`
`Petitioner only proposed constructions for three terms—“low power mode,”
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`“transceiver,” and “data.” See Pet. at 9-11. The Board adopted these
`
`constructions fo

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