Filed on behalf of TQ Delta, LLC
`By: Peter J. McAndrews
`Thomas J. Wimbiscus
`Scott P. McBride
`McAndrews, Held & Malloy, Ltd.
`500 W. Madison St., 34th Floor
`Chicago, IL 60661
`Tel: 312-775-8000
`Fax: 312-775-8100
`E-mail: pmcandrews@mcandrews-ip.com
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`_____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_____________
`
`CISCO SYSTEMS, INC.
`Petitioner
`
`v.
`
`TQ DELTA, LLC
`Patent Owner
`_____________
`
`Case No. IPR2016-01466
`Patent No. 8,611,404
`_____________
`
`PATENT OWNER’S PRELIMINARY RESPONSE
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`

`
`Patent Owner’s Preliminary Response
`IPR2016-01466
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`B. 
`
`TABLE OF CONTENTS
`
`INTRODUCTION ........................................................................................... 1 
`I. 
`SUMMARY OF THE 404 PATENT .............................................................. 6 
`II. 
`III.  CLAIM CONSTRUCTION ............................................................................ 6 
`IV.  NO REVIEW SHOULD BE INSTITUTED WITH
`RESPECT TO THE GROUND RAISED BY
`PETITIONER .................................................................................................. 7 
`A. 
`The Cited References .......................................................................... 10 
`1. 
`Bowie ........................................................................................ 10 
`2. 
`Yamano ..................................................................................... 12 
`3. 
`The ANSI Standard ................................................................... 17 
`The Combination of Bowie, Yamano, and the
`ANSI Standard Does Not Teach All of the
`Limitations of the Challenged Claims ................................................. 18 
`1. 
`The Combination of the References Fails
`to Disclose Both “A Synchronization
`Frame” and “A Synchronization Signal” ............................... 19 
`The Combination of the References Fails
`to Disclose the Storing Limitation ......................................... 22 
`a. 
`None of Bowie, Yamano, and the
`ANSI Standard Discloses Storing, in
`Low Power Mode, a Fine Gain
`Parameter or
`a Bit Allocation
`Parameter ........................................................................ 22 
`Petitioner’s
`Invalidity Arguments
`with Respect to the Storing Limitation
`Have No Merit ................................................................ 23 
`The Combination of the References Fails
`to Disclose the Exiting Limitation ......................................... 32 
`Petitioner Fails to Provide Sufficient Evidence
`that It Would Have Been Obvious to Combine
`Bowie and Yamano ............................................................................ 34 
`1. 
`The Statements in the Petition .................................................. 36 
`i
`
`C. 
`
`2. 
`
`3. 
`
`b. 
`
`
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`

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`Patent Owner’s Preliminary Response
`IPR2016-01466
`The First Paragraph ........................................................ 38 
`The Second Paragraph .................................................... 40 
`The Third Paragraph ....................................................... 43 
`The Fourth Paragraph ..................................................... 44 
`The Fifth Paragraph ........................................................ 46 
`Additional Statements Regarding
`Alleged Obviousness of Combining
`Bowie and Yamano ........................................................ 50 
`The Statements in the Kiaei Declaration .................................. 54 
`A Person of Skill in the Art Would Not
`Have Combined Bowie and Yamano as
`Petitioner Proposes .................................................................. 55 
`Petitioner Fails to Provide Sufficient Evidence
`that It Would Have Been Obvious to Combine
`Bowie/Yamano with the ANSI Standard ......................................... 57 
`CONCLUSION .............................................................................................. 59 
`
`2. 
`3. 
`
`D. 
`
`a. 
`b. 
`c. 
`d. 
`e. 
`f. 
`
`
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`
`
`ii
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`V. 
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`

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`Patent Owner’s Preliminary Response
`IPR2016-01466
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`
`
`TABLE OF AUTHORITIES
`
`
`CASES 
`Apple, Inc. v. Cellular Comm. Equip., LLC,
`Case No. IPR2015-00576, Paper 7 (P.T.A.B. June 12, 2015) ............................. 29
`Automotive US LLC v. Magna Electronics Inc.,
`Case IPR2014-00259, Paper No. 19 (P.T.A.B. Jun. 26, 2014) ..................... 30, 39
`BSP Software, LLC v. Motio, Inc.,
`IPR2013-00307, Paper 10 (P.T.A.B. Nov. 29, 2013) .......................................... 40
`Customplay, LLC v. Clearplay, Inc.,
`IPR2013-00484, Paper 29 (P.T.A.B. Nov. 5, 2014) .............................................. 7
`Daifuku Co., v. Murata Machinery, Ltd.,
`IPR2015-00084, 87, Paper 10 (P.T.A.B. May 4, 2015) ....................................... 52
`Depuy Spine, Inc. v. Medtronic Sofamor Danek, Inc.,
`567 F.3d 1314 (Fed. Cir. 2009) ............................................................................ 48
`DirecTV, LLC v. Qurio Holdings, Inc.,
`IPR2015-02007, Paper No. 6 (P.T.A.B. Apr. 4, 2016) ................................. 30, 35
`Dome Patent L.P. v. Lee,
`799 F.3d 1372 (Fed. Cir. 2015) ..................................................................... 28, 35
`Du Pont v. Monsanto Tech., LLC,
`IPR2014-00334, Paper 16 (P.T.A.B. July 11, 2014) .............................................. 8
`Ex parte DiCarlo,
`Appeal No. 2011-012966, 2014 Pat. App. LEXIS 1026
`(P.T.A.B. Feb. 28, 2014) ...................................................................................... 21
`Ex parte Frank,
`Appeal No. 2012-005804, 2014 Pat. App. LEXIS 4594
`(P.T.A.B. Jul. 29, 2014) ........................................................................................ 21
`Ex parte Grunert,
`Appeal 2013-004648, 2015 Pat. App. LEXIS 7069 (P.T.A.B.
`Jul. 14, 2015) ........................................................................................................ 20
`Ex parte Kaya,
`Appeal No. 2012-012639, 2014 Pat. App. LEXIS 9016
`(P.T.A.B. Dec. 26, 2014) ...................................................................................... 21
`iii
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`Patent Owner’s Preliminary Response
`IPR2016-01466
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`Ex parte Santilli,
`Appeal No. 2012-006027, 2014 Pat. App. LEXIS 7694
`(P.T.A.B. Nov. 21, 2014) ..................................................................................... 21
`Ex parte Scales,
`Appeal No. 2013-003744, 2015 Pat. App. LEXIS 5697
`(P.T.A.B. Jun. 19, 2015) ....................................................................................... 21
`Ex parte Sinde,
`Appeal 2009-00551, 2009 Pat. App. LEXIS 6457 (B.P.A.I.
`Aug. 10, 2009) ...................................................................................................... 41
`Grain Processing Corp. v. Am. Maize-Prods. Co.,
`840 F.2d 902 (Fed. Cir. 1988) .............................................................................. 29
`In re Gordon,
`733 F.2d 900 (Fed. Cir. 1984) .............................................................................. 56
`In re Robertson,
`169 F.3d 743 (Fed. Cir. 1999) .............................................................................. 21
`Jacobs Corp. v. Genesis III, Inc.,
`IPR2014-01267, Paper 12 (P.T.A.B. January 22, 2015) ........................................ 8
`K. J. Pretech Co., Ltd. v. Innovative Display Technologies LLC,
`IPR2015-01866, Paper No. 15 (P.T.A.B. Mar. 17, 2016) ............................. 28, 35
`Kinetic Techs., Inv. v. Skyworks Solutions, Inc.,
`IPR2014-00529, Paper 8 (P.T.A.B. Sep. 23, 2014) ...................................... 39, 55
`KSR Int'l Co. v. Teleflex Inc.,
`550 U.S. 398 (2007) ..................................................................................... passim
`Mobotix Corp. v. Comcam Intern., Inc.,
`IPR2015-00093, Paper 21 (P.T.A.B. April 28, 2016) .......................................... 17
`Oxford Nanopore Tech. Ltd. v. University of Washington,
`IPR2014-00512, Paper 12 (P.T.A.B. Sept. 15, 2014) ..................................... 9, 31
`PAR Pharm., Inc. v. TWI Pharm., Inc.,
`773 F.3d 1186 (Fed. Cir. 2014) ............................................................................ 35
`Princeton Biochemicals, Inc. v. Beckman Coulter, Inc.,
`411 F.3d 1332 (Fed. Cir. 2005) ............................................................................ 25
`SAS Institute, Inc. v. Complementsoft, LLC,
`IPR2013-00581, Paper 15 (P.T.A.B. December 30, 2013) .................................... 8
`
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`T-Mobile USA, Inc. et al. v. Mobile Telecomm. Tech., LLC,
`IPR2015-00017, Paper 9 (P.T.A.B. Apr. 8, 2015) ............................................... 52
`TRW Auto. US LLC v. Magna Elecs., Inc.,
`IPR2014-00262, Paper 20 (P.T.A.B. Aug. 27, 2014) .................................. passim
`Wowza Media Sys., LLC v. Adobe Sys., Inc.,
`IPR2013-00054, Paper 16 (P.T.A.B. July 13, 2013) ..................................... 16, 55
`STATUTES AND RULES 
`35 U.S.C. § 103(a) ........................................................................................... 1, 2, 7
`37 C.F.R. § 42.104(b) .............................................................................................. 42
`37 C.F.R. § 42.22(a)(2) ................................................................................. 8, 31, 54
`37 C.F.R. § 42.6(a)(3) ................................................................................... 9, 31, 54
`
`v
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`
`I.
`
`INTRODUCTION
`
`Patent Owner’s Preliminary Response
`IPR2016-01466
`
`Patent Owner TQ Delta, LLC (“TQ Delta” or “Patent Owner”) submits this
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`preliminary response to the Petition filed by Cisco Systems, Inc. (“Cisco” or
`
`“Petitioner”) requesting inter partes review of claims 6, 10, 11, 15, 16, and 20 of
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`U.S. Pat. No. 8,611,404 (the “404 patent”).
`
`The Petition fails to demonstrate a reasonable likelihood that claims 6, 10,
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`11, 15, 16, and 20 of the 404 patent are unpatentable. The Petition provides a
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`single ground for unpatentability – invalidity under 35 U.S.C. § 103(a) over U.S.
`
`Pat. No. 5,956,323 (“Bowie”) and U.S. Pat. No. 6,075,814 (“Yamano”) in view
`
`of the ANSI T1.413-1995 Standard (the “ANSI Standard”). Each of the
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`asserted prior art references, however, differs significantly from the inventions
`
`claimed by the 404 patent, and certain limitations of the challenged claims are
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`missing from each of the asserted prior art references. This is why Petitioner’s
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`asserted ground for unpatentability relies entirely on obviousness. Petitioner’s
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`proposed combination of prior art, however, still fails to teach or suggest all of the
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`limitations of the challenged claims.
`
` Moreover, Petitioner’s obviousness
`
`arguments fail to provide evidence of any valid reason for combining the
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`references or of any reasonable expectation of success. In fact, Petitioner’s
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`obviousness arguments are based on a misunderstanding of the prior art references
`
`and are undermined by the teachings of those references.
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`1
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`Patent Owner’s Preliminary Response
`IPR2016-01466
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`In particular, and for the following reasons, the Board should decline
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`instituting trial on the proposed Ground that claims 6, 10, 11, 15, 16, and 20 of the
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`440 patent would have been unpatentable under 35 U.S.C. § 103(a) over Bowie
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`and Yamano in view of the ANSI Standard:
`
`1)
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`Petitioner’s asserted obviousness combination does not disclose all of
`
`the limitations of each of the challenged claims.
`
`First, Petitioner has not established that any of the references disclose
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`receiving, in a full power mode, both “a synchronization frame” and “a
`
`synchronization signal,” as required by claims 6, 10, 16, and 20, or transmitting, in
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`a full power mode, both “a synchronization frame” and “a synchronization signal,”
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`as required by claims 11 and 15. Petitioner argues that a “synchronization symbol”
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`disclosed in the ANSI Standard is both the claimed “synchronization frame” and
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`the claimed “synchronization signal” that are sent or received in a full power
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`mode. The Petition does not, however, articulate why or how the “synchronization
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`symbol” disclosed
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`in
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`the ANSI Standard discloses both
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`the claimed
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`“synchronization symbol” and the “synchronization signal.”
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`Second, Petitioner has not established that any of the references disclose the
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`limitation of “store [or storing], in the [or a] low power mode, at least one
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`parameter associated with the full power mode operation wherein the at least one
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`parameter comprises at least one of a fine gain parameter and a bit allocation
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`2
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`Patent Owner’s Preliminary Response
`IPR2016-01466
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`parameter,” as required by claims 6, 10, 11, 15, 16, and 20. Indeed, Bowie does
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`not disclose storing a fine gain or bit allocation parameter, and the ANSI Standard
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`does not disclose storing, in a low power mode, parameters associated with full
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`power mode operation.1
`
`Undoubtedly recognizing that it cannot show that any of the references teach
`
`this limitation, Petitioner (improperly) splits the limitation up and (erroneously)
`
`argues that Bowie discloses storing in a low power mode at least one parameter
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`associated with the full power mode operation and that the “at least one parameter
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`compris[ing] at least one of a fine gain parameter and a bit allocation parameter” is
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`obvious over Bowie and the ANSI Standard. The requirement that the “at least one
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`parameter comprise[] at least one of a fine gain parameter and a bit allocation
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`parameter,” however, cannot be separated from the requirement that the at least
`
`one parameter be “stored in the low power mode.” Moreover, Petitioner only
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`provides conclusory arguments as to why a person of skill in the art would
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`combine Bowie with the ANSI Standard to arrive at the full teaching of this
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`limitation.
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`Third, Petitioner has not established that any of the references disclose the
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`limitation of “exit [or exiting] from the lower power and restore [or restoring] the
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`full power mode by using the at least one parameter and without needing to
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`
`1 Petitioner does not allege that Yamano discloses this limitation.
`3
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`Patent Owner’s Preliminary Response
`IPR2016-01466
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`reinitialize the transceiver,” as required by claims 6, 10, 11, 15, 16, and 20.
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`Petitioner argues, in error, that Bowie discloses this limitation by teaching the use
`
`of “loop characteristics” to resume data transmission upon a return to full power
`
`mode. Because the challenged claims require that the “at least one parameter” be
`
`at least one of a fine gain parameter and a bit allocation parameter, the “at least one
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`parameter” that is used to “restore the full power mode” must be at least one of a
`
`bit allocation parameter and a fine gain parameter. “Loop characteristics” do not
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`include a fine gain or bit allocation parameter. Therefore, Bowie does not teach or
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`suggest using at least one of a fine gain or bit allocation parameter to restore a full
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`power mode without the need for reinitialization. As Petitioner does not rely on
`
`any other reference for teaching this limitation, Petitioner fails to establish that the
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`limitation is taught by the combination of Bowie, Yamano, and the ANSI Standard.
`
`2)
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`Petitioner provides insufficient and conclusory statements – and not
`
`the requisite “articulated reasoning with rational underpinning” – as to why it
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`allegedly would have been obvious to combine Bowie, Yamano, and the ANSI
`
`Standard. Petitioner fails to explain why and how a POSITA would have been
`
`motivated to combine the teachings of those references as Petitioner proposes or
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`why a POSITA would have had a reasonable expectation of success in combining
`
`them. Also, Petitioner’s citations to the declaration of its expert, Sayfe Kiaei, do
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`not remedy the lack of reasoning and support in the Petition.
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`
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`4
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`Patent Owner’s Preliminary Response
`IPR2016-01466
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`Furthermore, Petitioner’s obviousness arguments are based on a
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`misunderstanding of
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`the
`
`teachings of Yamano.
`
` Petitioner
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`repeatedly
`
`mischaracterizes Yamano as teaching a modem that disables or reduces the power
`
`of a transmitter and then uses those mischaracterizations to buttress its obviousness
`
`arguments. Yamano, however, discloses disabling components of only a receiver
`
`circuit – it does not teach disabling or reducing the power of the transmitter.
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`3)
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`Lastly, Petitioner has failed to establish that it would have been
`
`obvious to combine Bowie and Yamano as Petitioner proposes because the
`
`references teach away from such a combination. The challenged claims recite
`
`transmitting or receiving, in a low power mode, a synchronization signal. Bowie
`
`teaches entering a low power mode but does not teach transmitting or receiving a
`
`synchronization signal in a low power mode and, in fact, does not need to maintain
`
`synchronization in order to wake up and operate. Petitioner argues that Yamano’s
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`disclosure of a “periodic poll or some other timing signal” fills the gap in Bowie’s
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`teachings, and that “the combination of Bowie and Yamano renders obvious” the
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`limitations. See Pet. at 42-43, 57-58. However, modifying the Bowie device to
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`receive the periodic poll of Yamano would render Bowie inoperable for its
`
`intended use. It would result in the Bowie device being woken up by a signal it
`
`does not need and having to keep circuitry powered during the low power mode to
`
`receive a signal it does not need.
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`5
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`Patent Owner’s Preliminary Response
`IPR2016-01466
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`II.
`
`SUMMARY OF THE 404 PATENT
`
`The 404 patent is one of a series of patents by the named inventors in the
`
`field of multicarrier communications, for example digital subscriber line (“DSL”)
`
`technology. DSL is a technology that provides high-speed broadband access over
`
`the wires of a telephone network.
`
`The inventors were substantial contributors of core technology to DSL
`
`standards on behalf of TQ Delta’s predecessor-in-interest, Aware, Inc., a world-
`
`leading innovator and provider of DSL technologies. Some of the core
`
`technologies developed by Aware, including the inventions of the 404 Patent, have
`
`been adopted for use in other communications protocols, such as the Multimedia
`
`over Coax Alliance (“MoCA”) protocol, which
`
`is used for high-speed
`
`communication of content over coaxial cables within a home. Petitioner uses the
`
`inventions of the 404 patent in both its DSL and MoCA products.
`
`III. CLAIM CONSTRUCTION
`
`Petitioner proposes two constructions in the Petition. Petitioner construes
`
`“store/storing, in a/the low power mode” to mean “maintaining in memory while in
`
`a reduced power consumption mode” and construes “synchronization signal” to
`
`mean “a signal used to maintain timing between transceivers.” See Pet. at 9-12. It
`
`is not necessary at this stage of the proceeding to construe these limitations.
`
`Nevertheless, Patent Owner proposes that the broadest reasonable interpretation of
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`
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`6
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`Patent Owner’s Preliminary Response
`IPR2016-01466
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`“store/storing, in a/the low power mode” is “maintaining in memory . . . while in a
`
`low power mode” and
`
`that
`
`the broadest
`
`reasonable
`
`interpretation of
`
`“synchronization signal” is “an indication used to establish or maintain a timing
`
`relationship between transceivers.”
`
`For purposes of determining whether to institute based on the Petition only,
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`Patent Owner does not construe any other claim terms of the 404 patent, but Patent
`
`Owner does not waive its right to propose new or additional constructions in
`
`litigation involving the 404 patent, or later in this proceeding if the Board should
`
`decide to institute a trial.
`
`IV. NO REVIEW SHOULD BE INSTITUTED WITH RESPECT TO THE
`GROUND RAISED BY PETITIONER
`
`The Petition fails to establish a reasonable likelihood that the challenged
`
`claims are unpatentable. Petitioner proposes one ground against the 404 patent:
`
`the unpatentability of claims 6, 10, 11, 15, 16, and 20 pursuant to 35 U.S.C. §
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`103(a) over Bowie and Yamano in view of the ANSI Standard. As explained in
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`more detail below, the Board should deny institution for several reasons.
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`The cited references do not, individually or collectively, disclose, teach, or
`
`suggest all of the elements of claims 6, 10, 11, 15, 16, and 20. Where none of the
`
`references discloses an element of the claims, inter partes review for obviousness
`
`cannot be instituted. See Customplay, LLC v. Clearplay, Inc., IPR2013-00484,
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`Paper 29 at p. 12 (P.T.A.B. Nov. 5, 2014) (claims not unpatentable where none of
`7
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`Patent Owner’s Preliminary Response
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`the asserted prior art references disclosed a claim element); Du Pont v. Monsanto
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`Tech., LLC, IPR2014-00334, Paper 16 at p. 8 (P.T.A.B. July 11, 2014) (denying
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`institution where none of the asserted prior art disclosed a claim element).
`
`Additionally, the Petition fails to provide a sufficient rationale for combining
`
`Bowie, Yamano, and the ANSI Standard as proposed. “An obviousness analysis
`
`requires more than simply showing that each limitation is found in the prior art.”
`
`Jacobs Corp. v. Genesis III, Inc., IPR2014-01267, Paper 12 at p. 8 (P.T.A.B.
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`January 22, 2015). “Petitioner must also show ‘whether there was an apparent
`
`reason to combine the known elements in the fashion claimed by the patent at
`
`issue.’” Id. “Petitioner must set forth sufficient articulated reasoning with rational
`
`underpinning to support its proposed obviousness ground.” SAS Institute, Inc. v.
`
`Complementsoft, LLC, IPR2013-00581, Paper 15 at p. 12 (P.T.A.B. December 30,
`
`2013). The Petition “has failed to address this latter, ‘reason to combine’ portion
`
`of the obviousness analysis.” Jacobs Corp., IPR2014-01267, Paper 12 at p. 8.
`
`In addition, Petitioner’s arguments as to why it would have been obvious to
`
`modify Bowie with the teachings of Yamano are based on a misunderstanding of
`
`the teachings of both Bowie and Yamano. Bowie and Yamano, properly
`
`understood, actually teach away from being combined as Petitioner proposes.
`
`Furthermore, the Petition’s blanket citations to the Kiaei Declaration do
`
`nothing to overcome the deficiencies in the Petition. See 37 C.F.R. § 42.22(a)(2)
`
`
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`8
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`Patent Owner’s Preliminary Response
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`(a petition must contain a “full statement of the reasons for the relief requested,
`
`including a detailed explanation of the significance of the evidence”). A Petition
`
`cannot incorporate by reference a more detailed expert declaration. See 37 C.F.R.
`
`§ 42.6(a)(3) (prohibiting arguments in a supporting document from being
`
`incorporated by reference into a petition); Oxford Nanopore Tech. Ltd. v.
`
`University of Washington, IPR2014-00512, Paper 12 at p. 16 (P.T.A.B. Sept. 15,
`
`2014) (“[E]ssentially none of the discussion in the cited paragraphs of the Branton
`
`Declaration, allegedly explaining why an ordinary artisan would have combined
`
`Akeson with Butler, Wong, or Faller, appears in the Petition. We decline to import
`
`the extensive discussion regarding obviousness from
`
`the declarations of
`
`Petitioner’s experts into the Petition, based solely on the Petition’s citation of
`
`certain paragraphs within the declarations.”).2
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`In addition, even if such incorporation by reference were allowed, the Kiaei
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`Declaration is no better than the Petition in terms of providing reasons to combine.
`
`As discussed in detail below, the Kiaei Declaration is replete with its own
`
`conclusory, unsupported statements regarding alleged reasons to combine the
`
`disparate references. The statements fall far short of constituting articulated
`
`reasoning with rational underpinning to support the proposed obviousness ground.
`
`
`2 All emphases in quotations are added unless noted otherwise.
`9
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`Patent Owner’s Preliminary Response
`IPR2016-01466
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`For the foregoing reasons and as further discussed in detail below, the
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`Petition fails to establish a prima facie case of obviousness. Accordingly, the
`
`Petition does not establish a reasonable likelihood that the challenged claims are
`
`unpatentable, and the Board should not institute an inter partes review.
`
`A. The Cited References
`
`As discussed below, the three references upon which the Petition relies
`
`differ in significant ways and fail to disclose key elements of the challenged
`
`claims.
`
`
`
`In addition, Petitioner’s obviousness argument
`
`is based on
`
`mischaracterizations of the teachings of the prior art references. In fact, the
`
`references’ teachings, properly understood, undermine Petitioner’s obviousness
`
`arguments.
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`1.
`
`Bowie
`
`As shown below, Bowie discloses an ADSL unit 100 that includes signal
`
`processing electronics 111, modulated data transmit circuitry 112, modulated data
`
`receive circuitry 113, and a resume signal detector 115.
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`
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`10
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`Patent Owner’s Preliminary Response
`IPR2016-01466
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`
`
`When Bowie’s ADSL unit 100 receives a shut down signal, the unit 100
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`enters a low power mode in which the signal processing electronics 111,
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`modulated data transmit circuitry 112, and modulated data receive circuitry 113 all
`
`shut down. See Ex. 1005 at 5:25-28. The resume signal detector 115 remains
`
`operational in order to receive a resume signal. See id. at 5:48-55. Thus, both the
`
`receiver circuitry and transmitter circuitry of the Bowie ADSL unit 100 are shut
`
`down when the unit 100 is in the low power mode. The unit 100 returns to full
`
`power after receiving a resume signal. See id. at 5:60-62.
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`
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`11
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`Patent Owner’s Preliminary Response
`IPR2016-01466
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`Importantly, Bowie does not disclose that the unit 100 is capable of
`
`transmitting or receiving a synchronization signal when in the low power mode.
`
`Bowie also does not disclose that the unit 100 stores a fine gain parameter or a bit
`
`allocation parameter when in the low power mode or uses a stored fine gain or bit
`
`allocation parameter to restore the unit 100 to a full power mode. Rather, Bowie
`
`discloses storing “characteristics of the loop” when in the low power mode and
`
`using the loop characteristics to enable resumption of data transmission upon the
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`unit 100 returning to full power mode. See id. at 4:64-5:3; 5:17-24; 5:60-66. Such
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`characteristics relate to the structure of the communication wire loop (e.g., loop
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`length, wire gauge, or wire composition) and do not include a fine gain parameter
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`or a bit allocation parameter. See id. at 4:64-5:3.
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`2.
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`Yamano
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`Petitioner’s description of Yamano, and obviousness arguments with respect
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`to the combination of Bowie and Yamano, are based on a deep misunderstanding
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`of the teachings of Yamano. Yamano does not teach or suggest a modem
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`transmitter that goes into a reduced processing mode or that is disabled in order to
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`save power as Petitioner repeatedly alleges. Instead, Yamano focuses primarily on
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`the structure and operation of a modem receiver circuit. See Ex. 1006 at Abstract.
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`In particular, Yamano discloses a modem having a receiver that can enter a
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`“standby mode” in which the processing requirements of the receiver circuit are
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`reduced. See Ex. 1006 at Abstract.
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`With reference to Figure 4 of Yamano below, the receiver circuit 400 of
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`Yamano includes a non-idle detector 401 that reduces the processing mode of the
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`receiver circuit when it is not receiving packet data. See id. at 14:20-51. The non-
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`idle detector 401 reduces the receiver processing mode by disabling receiver
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`components such as a resampler 302, equalizer 303, carrier recovery circuit 304,
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`symbol decision circuit 305, channel decoder 306, framer/idle detector 307, echo
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`canceler 309, timing update circuit 310, equalizer update circuit 311, carrier update
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`circuit 312, and packet queue 318. See id. at 14:33-42.
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`
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`Notably, nowhere does Yamano disclose “reducing the processing mode” of
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`a modem transmitter or disabling the transmitter or any of its components. Indeed,
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`even though Petitioner repeatedly argues that Yamano does disclose disabling the
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`transmitter or that the transmitter enters a reduced processing mode – and even
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`goes to the trouble of fabricating drawings of “modem states” that show Yamano’s
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`transmitter in a low power mode, Petitioner never cites any language from Yamano
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`that supports Petitioner’s characterizations of Yamano’s transmitter. Instead, as
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`shown below, Petitioner’s statements about Yamano’s transmitter cite to, and are
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`verbatim copies of, statements from the Kiaei Declaration:
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`Yamano, however, differs from Bowie in that it teaches that transmit
`and receive circuitry can be powered separately; that is, the transmit
`and receive circuitry can enter into a reduced processing mode
`independent of one another. Ex. 1003 [Kiaei Declaration] at p. 26.
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`Pet. at 17; see also Ex. 1003 at ¶ 68 (same).
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`Thus, Yamano describes transmit and receive circuitry in a modem
`that can operate in a reduced power consumption mode while a
`synchronization signal is transmitted and received during this reduced
`processing mode. Ex. 1003 [Kiaei Declaration] at p. 28.
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`Pet. at 19; see also Ex. 1003 at ¶ 71 (which is the same except that it states
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`“reduced power mode”).
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`In the low-power mode, the transmit and receive circuitry are shut
`down and the link between modems is actively transmitting or
`receiving data. Ex. 1003 [Kiaei Declaration] at p. 28-29.
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`Pet. at 20; see also Ex. 1003 at ¶ 72 (same).
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`Yamano differs from Bowie in that the transmit circuitry of a modem
`is shut down when not transmitting data and the receive circuitry of
`the modem is shut down when not receiving data. Ex. 1003 [Kiaei
`Declaration] at p. 29. This is possible because the transmit and
`receive circuitry in Yamano operate independently in a full-duplex
`mode where
`transmitting and
`receiving can be performed
`simultaneously. Ex. 1003 [Kiaei Declaration] at p. 29. Based on
`these teachings, Yamano’s modem can operate in four states as
`illustrated in the diagram below[.]
`
`Pet. at 20-21; see also Ex. 1003 at ¶ 73 (same).
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`Yamano, however, only activates the circuit needed for a particular
`communication and the other circuits remain inactive. Ex. 1003
`[Kiaei Declaration] at p. 31.
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`Pet. at 22; see also Ex. 1003 at ¶ 74 (same).
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`Moreover, while both Bowie and Yamano teach reducing power
`consumption of a modem circuitry when data is not being transmitted
`or received, they differ, as discussed above, in that Bowie’s system
`reduces power to both the transmit and receive circuitry when not
`communicating with another modem while Yamano deactivates only
`the circuit not being used. Ex. 1003 [Kiaei Declaration] at p. 35. This
`results in Yamano having a more defined power savings since
`unnecessary portions of the modem are deactivated while not in use.
`Ex. 1003 [Kiaei Declaration] at p. 35.
`
`Pet. at 26; see also Ex. 1003 at ¶ 82 (same).
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`Thus, given that Yamano teaches only activating the portion of the
`modem needed for communication, rather than the entire modem as in
`Bowie, a POSITA would understand that further power saving could
`be gained in applying Yamano’s teachings into Bowie’s system,
`thereby resulting in an even larger power savings across thousands of
`data connections. Ex. 1003 [Kiaei Declaration] at p. 36.
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`Pet. at 27; see also Ex. 1003 at ¶ 83 (same).
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`As discussed above, a POSITA would have combined the teachings of
`Yamano’s transmit and receive circuits to Bowie’s ADSL units
`because such combination would have been nothing more than the
`predictable result of an ADSL modem that could reduce power to
`transmit and receive circuits independently in order to achieve more
`efficient power usage. Ex. 1003 [Kiaei Declaration] at p. 57.
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`Pet. at 43; see also Ex. 1003 at p. 57 (same).
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`As such, Petitioner’s characterizations of the transmitter of Yamano are not
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`supported by the actual teachings of Yamano. Moreover, the portions of the Kiaei
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`Declaration on which Petitioner relies in support of its characterizations are
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`themselves conclusory statements and assumptions that do not cite to Yamano or
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`any other evidence of record. Therefore, they are unreliable and carry absolutely
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`no weight. See Wowza Media Sys., LLC v. Adobe