I970. No. 7./8!‘)
`
`225
`
`Some problems of MOS technology
`
`J. A. Appels, H. Kalter and E. Kooi
`
`Introduction
`
`Scientists and engineers working in MOS transistor
`technology are charged with the production of MOS
`transistors and integrated circuits that possess certain
`specified cltaraetcristics. are stable in behaviour. and
`give high production yields. The specified requirements
`determine the yarious steps in the production process:
`from the design geometry to the choice and techniques
`of oxidation. etching. ditlusion and other processes in
`the manufacture of 21 M05 transistorl”. Some of
`
`the problems which this involtes are described in this
`article: the structure and operation of the MOS trait-
`sistor. which are dealt \\ith else“ here in this issue l‘3l.
`are assunictl to he generally familiar to the reader.
`A typical example of a quantity that is determined
`by design geometry and technological processes is the
`transconductance ofthc MOS traiisistor. In the article
`
`the traitscondtictancc
`that
`is sliuwii
`it
`just notei.l”l
`—— and hence the current that the transistor can carry
`at the maximum permissible gate voltage
`is propor-
`tional to
`
`/I
`
`iiCi..w_‘I.
`
`.
`
`.
`
`.
`
`.
`
`.
`
`(I)
`
`Here ,4 is the mobility of the charge carriers in the
`channel. C.“ the capacitance of the gate per unit area.
`W is the width and I the length ofthe channel ( fig. I)
`The mobility _u depends on the senticoiidtictor
`ntatcrial of which the MOS transistor is made. For
`
`practical reasons this is almost iinariably silicon. One
`of these reasons is that it
`is relatisely simple to apply
`etTecti\‘e isolating layers to silicon by n\lLl.Illt)Il. Al-
`though iiiipurity centres or defects may be present at
`the Si.Si():» interface. the nature aitd concentrations of
`these impurities can now be controlled. and they can
`in fact be used to alter the beliatiour of a MOS tran-
`sistor in il desired direction. \luch of this article will
`be concerned with the Si«'Si0~; interface.
`ln the hulk of the silicon the mobility /4 may be
`regarded as at constant of the material. At the surface:
`the mobility is trsually appreciably lower than iii the
`bulk. Not only may it he alfectcd here hy the impurities
`or defects. but it is also found that [t decreases with
`increasing gate voltage. and therefore depends on the
`J.
`.4. App:-Ir, Drs. H. Kallcr (lfltl Dr. 1:. Kw: are tr/‘II: Pliilipr
`Rm:-nrrli In/mruliil/'i't‘. Fiiiil/mrmi
`
`magnitude of the charge induced in the channel. A
`theoretical analysis based on detailed physical consid-
`erations has shown that this is to he expected 13'.
`It has also been found that the surface mobility is
`dependent on the crystal orientation at the surface. For
`electrons the mobility is greatest for the (I00) plane of
`silicon: the surface mobility in this plane can eycn ap-
`proach the salue of [1 in the bulk. For the holes the
`
`
`
`Fig I
`Sclieniatic iliagram of an MOS transistor. made on a
`l"t\'pe silicon substrate.
`l\~o ditlused zones or N‘ silicon con-
`stitute the mtirce S‘ and the drain D Between them, isolated by
`an oxide layer 0.\’. is a metal control electrode, the gate 0.
`If
`(I is sufticit-ntl_\ [l0slli\c_ ;| cimci:nlr.ition of fret: electrons occurs
`under thc gate. forming an /V—typc conducting channel between
`source and drain. The length land witlth w of the channel. and
`the ll‘|l\.'l\llt.‘\\ /i of the oxide are the chief factors that determine
`the cluractcristics of the MOS trznisistor.
`
`mobility is greatest for the (l I I) orientation. but hole
`inohility is substantially less than electron mobility.
`'l o achieve the ina.\imum carrier mobility, and hence
`the ma.\iinuin traiiscoitductaiicc. the best choice is an
`i\’-chatinel transistor on a silicon chip whose surface is
`oriented in the (I00) plane.
`is also necessary to
`If a high value of /3 is desired it
`have a high Cm (see equation I). and for this purpose
`the oxide layer under the gate is made as thin as pos-
`sihle. The niinimuni thickness is mainly determined by
`
`l” A description ol the photo-etching and ditfusion processes is
`gi\en in: A. Schmill, Solid circuits, Philips tech. Rev. 27.
`I92-I99. I966.
`tit J. A. van lsielen. Operation and tie behmiotir of MOS tran-
`sistors: this issue. page 209.
`W N. St.
`J Murphy. F. Ben and l. Flinn. (‘ariici mobility in
`MOS transistors: this issue. page 237.
`
`Page 1 of 13
`
`TSMC Exhibit 1005
`
`

`
`226
`
`PHILIPS TECHNICAL REVIEW
`
`VOLUME 31
`
`the breakdown field—strength (about 103 V/pm); prac-
`tical values frequently lie between 0.05 and 0.25 y.m.
`The dimensions of the silicon chips set an upper limit
`to the width w of the channel, and of course the chance
`
`of a defect increases with increasing w. A width of a
`few millimetres is fairly easy to achieve, and special
`techniques can be applied to give a channel with a
`width of a few centimetres W.
`
`The length I of the channel cannot be made very
`small without running the risk of “punch-through", i.e.
`a flow of current between source and drain outside the
`
`channel. The length 1 is usually a few microns, but
`special methods can be used to bring it down to about
`1 micron. A very short channel is particularly impor-
`tant in MOS transistors for the UHF band I51.
`
`In addition to the transconductance ,3, the parasitic
`capacitances play an important part in fast transistors.
`
`The most detrimental one is usually the feedback capac-
`itance between drain and gate (31. This capacitance
`depends on the amount of overlap between drain and
`gate: it can be reduced by bringingthe gate into accur-
`ate register with the channel region. Various useful
`methods that we have developed for this will be
`discussed in this article.
`
`The speed of integrated circuits made with MOS tran-
`
`sistors is mainly limited by the parasitic capacitance
`between wiring and substrate. MOS transistors are
`
`therefore made with thick oxide layers under the wiring
`but with thin oxide layers at the active regions. This
`approach also tends to prevent the formation of para-
`sitic MOS transistors;
`these can be formed when a
`
`voltage applied to a conductor induces a conducting
`channel in the substrate underneath the conductor. l n
`the transition from the thick oxide to the thin oxide
`
`there has to be a step in the metallization; this has
`often proved to be a weak spot. We have therefore
`developed a process in which the thicker oxide is
`
`embedded deeper in the silicon substrate, so that any
`steps above the surface are smaller. This is known as
`the LOCOS process (local oxidation of silicon), and
`will also be described in this article.
`First of all we shall take a closer look at the sili-
`
`con/silicon-dioxide interface. The surface defects pres-
`ent there and the contact potential of the gate metal
`and the substrate doping all have an important effect
`
`on the threshold voltage, i.e. the minimum gate voltage
`needed to form a channel [2]. In fact these defects can
`
`influence than the contact
`have a much greater
`potential and substrate doping. They can change the
`threshold voltage by tens of volts, whereas the changes
`due to differences in contact potential between dissim-
`ilar metals and the variation of substrate doping that
`occurs in practice amount to only a few volts. The
`
`presence of mobile ions can result in a slow change
`
`in the threshold voltage. Control of the threshold
`voltage and making sure that it is stable are the main
`
`factors that decide which technology should be followed.
`
`The silicon/silicon-dioxide interface
`
`treatment given here of the sili-
`The theoretical
`con/silicon-dioxide interface makes no pretence at
`being complete, but is a simple model that is neverthe-
`les_s capable of explaining many experimental results,
`and one that has also been found useful for qualita-
`tively predicting the behaviour of the Si/SiO2 system
`from the processing conditions that were used when it
`was made. In this model we distinguish between defects
`of two kinds:
`
`a) Surface states -— states that can exchange charge
`with the silicon, and which can be described in
`
`physical terms as quantum states with an energy
`level between the valence and conduction band;
`
`b) Oxide charge — fixed positive charges (ionized
`donors) near the interface and presumably in the
`oxide.
`
`We shall now consider both types of defect in turn.
`
`IS/IS/"IS/I
`
`IS/"IS/IS/I
`
`ISIZO Si.
`
`0
`
`..
`
`0
`
`,.
`
`.
`
`a
`
`ISIISIZSII
`
`ISIISIIS/'.
`
`Fig. 2. a) Crystal lattice of silicon. At the surface of the crystal
`(top ofthe figure) each atom has an unpaired electron. b) Where
`the surface of the silicon crystal is covered with silicon dioxide,
`the lattices of the two substances do not exactly match. As a
`result silicon bonds remain unsaturated in places.
`
`Page 2 of 13
`
`

`
`MOS TECHNOLOGY
`
`227
`
`1970, No. 7/8/9
`
`Surface states
`
`If the crystal lattice terminates abruptly at the sur-
`face of a silicon chip, then a large number of unsaturat-
`ed silicon bonds are to be expected, i.e. each atom in
`the outside layer of silicon atoms should have an un-
`
`paired electron (fig. 2a). Since there are about 1015 Si
`atoms per cm? at the surface, one would expect about
`the same number of unsaturated bonds on a “clean”
`
`surface. If the silicon is oxidized, as it is in the case
`under consideration, then the number of unsaturated
`bonds is of course lower, but it is not equal to zero
`because there will probably not be an exact fit between
`the Si and SE02 networks (fig. 2b). We shall now con-
`sider what electrical effects can result from the un-
`saturated silicon bonds.
`
`It is very probable that it will take less energy to raise
`an unpaired electron into the conduction band than to
`raise a paired valence electron; in other words, the un-
`
`i
`
`bonds may act not only as electron donors or traps for
`holes, but (also as traps for electrons, since trapping an
`electron changes a silicon atom with an unpaired elec-
`tron into an atom with eight electrons in its outer shell.
`This is the inert-gas configuration:
`
`:S.i:+e*Z:éi:_.
`
`.
`
`.
`
`.
`
`.
`
`(4)
`
`The effect may also be seen as the giving-up of a hole:
`
`+e+,
`
`.
`
`.
`
`.
`
`.
`
`(5)
`
`and we may then conclude that the relevant energy
`level must lie in the forbidden band.
`
`From a wide variety of measurements [71 it has been
`found that energy levels do in fact occur in the for-
`bidden band, and that broadly two groups may be
`distinguished: a group near
`the conduction band
`
`
`
`
`
`Voooooeoo
`~OOOOOO§OOOOO0OOOO6006OO
`QOOQOOOOOOOQOQOOOOOOOOO
`v.0.0.0.0’.0.o.o.o.9.o.o.o.¢.o‘¢.o‘0.03.9.0.0
`
`e++j Si 1225;’:
`0
`I
`
`Fig. 3. The unpaired electron ofa silicon atom with an unsaturated bond has an energy E55
`which lies in the forbidden band between valence band (energy E».-) and conduction band
`(energy EC). The atom may occur as a donor; by giving up an electron (on the left) or taking
`up a hole (on the right) it then acquires a positive charge. If there is a high electron con-
`centration the atom may also occur as an acceptor and acquire a negative charge.
`
`paired electron possesses an energy level that lies in the
`forbidden band. A silicon atom to which such an elec-
`
`tron is bound may give up this electron or take up a
`hole, but in both cases the atom itself becomes posi-
`tively charged (fig. 3):
`-
`
`+
`
`:Si:Z:Si:+e',
`-
`+
`
`.
`
`.
`
`.
`
`.
`
`(2)
`
`e++:Si:Z;Si: ....... (3)
`
`If we are dealing, for example, with P-type silicon,
`then there are many holes and the equilibria (2) and (3)
`shift to the right. If moreover the energy gap Ess— Ev
`is small, a number of holes from the silicon may be
`
`trapped, and therefore the hole conduction near the
`surface of the crystal is not so good as in the bulk of
`the material.
`
`It is also conceivablethat the unsaturated silicon
`
`—- these are probably acceptor levels — and a group
`near the valence band — probably donor levels. De-
`pending on the voltages applied in the measurements,
`there is a tendency for electrons or holes to concentrate
`at the Si/SiO2 interface; if there is a high electron con-
`centration the defects act mainly as acceptor levels, but
`at a high hole concentration mainly as donor levels.
`On the same sample the number of acceptor levels
`found in one measurement is invariably almost equal
`
`I41 R. D. Josephy, MOS transistors for power amplification in
`the HF band; this issue, page 251.
`151 R. J. Nienhuis, A MOS tetrode for the UHF band witha
`channel l.S y.m long; this issue, page 259.
`.
`_
`W P. A. H. Hart and F. M. Klaassen, The MOS transistor as
`a small-signal amplifier; this issue, page 216.
`[71 E. Kooi, The surface properties of oxidized silicon, Thesis,
`Eindhoven 1967.
`M. V. Whelan, Influence of charge interactions on capaci-
`tance versus voltage curvcs in MOS structures, Philips Res.
`Repts. 20, 562-577, 1965; Electrical behaviour of defects ata
`thermally oxidized silicon surface, Thesis, Eindhoven 1970.
`
`Page 3 of 13
`
`

`
`228
`
`PHlI:IPS TECHNICAL REVIEW
`
`VOLUME 3|
`
`to the number of donor levels found in another meas-
`
`this lends plausibility to our assumption
`urement;
`that the same trapping centres are involved in both
`cases.
`'
`
`' The assumption that the centres are related to un-
`
`saturated silicon bonds explains why the number of
`surface states depends on the crystal orientation of the
`silicon surface. If this is a (lll) plane, then there are
`usually 3 to 5 times as many surface states as on a
`(100) plane. This suggests that the oxide network fits
`better on a (100) crystal plane than on a (111) plane.
`Other crystal‘ orientations give various numbers of sur-
`
`face states that lie between those ofthe U00) and (l I l)
`planes.
`The way in which the surface states can’ affect the
`characteristics of a MOS transistor will be demon-
`strated by means of a number of experimental transis-
`tors on a P-type silicon substrate, i.e. with an N—type
`channel. This channel would have to be induced by
`applying a positive voltage to the gate. Since the effect
`of this is a decrease in the concentration of holes near
`the silicon surface and an increase in the electron con-
`
`centration, the equilibria (2) and (3) shift to the left
`and the equilibria (4) and (5) to the right. This means
`that the donor states tend to become neutral (if they
`were not neutral already) and the acceptor states nega-
`tive. The build-up of negative charge in the surface
`states means that the mobile charge entering the bulk
`of the silicon is less than the total induced charge. Con-
`sequently the threshold voltage, required for inversion,
`is higher than expected, and on increasing the gate
`voltage the subsequent increase in the inversion charge
`(and hence in the current through the transistor) is
`lower, and the transconductance is therefore affected.
`
`The effect of the surface states is illustrated in fig. 4,
`which shows the la—Vgs curves for the experimental
`MOS transistors that all have the same dimensions but
`
`were annealed in different gas atmospheres after
`forming the gate oxide in an extremely dry atmosphere
`at about 1100 °C. During the anneal, the temperature
`was kept
`low (450 °C) compared with the normal
`growth "temperature of SiO2 on Si (I000 °C or
`higher), so that the processing steps could cause no
`
`difference in oxide thickness. They did, however, give
`rise to differences in the numbers of surface states,
`as may be shown from the threshold voltages and
`transconductances.
`In fact a ‘hydrogen atmosphere
`and water vapour in an atmosphere of wet nitrogen
`even lead to negative" threshold voltages and thus ap-
`pear to remove the surface states for the most part.
`Water vapour in an oxygen atmosphere has consider-
`ably less effect. This suggests that a reduction of water
`to hydrogen plays an important part in the process.
`This hypothesis seems to be confirmed by the experience
`
`Page 4 of 13
`
`that the treatment in wet nitrogen is most effective
`when the chip is heated to a high temperature in an
`inert gas immediately after the silicon is oxidized. This
`treatment
`reduces the oxygen content of the SiOz
`through the influence of the silicon beneath it.
`
`The simplest explanation for the disappearance of the
`surface states is a chemical reaction of hydrogen with
`the centres involved, i.e. the formation of SiH groups
`in our model. This explanation has been confirmed by
`infra-red absorption measurements [3]. With the aid of
`a sensitive method of measurement it has been shown
`
`invariably contains a certain
`the SiO2 almost
`that
`number of SiH groups, whose concentration is par-
`ticularly high when the oxidized surface is subjected to
`operations which reduce the number of surface states.
`Often very little water vapour is sufficient to reduce
`the number of surface states; a heat treatment in an
`inert gas (e.g. nitrogen or helium) which is not extreme-
`ly dry (containing a few ppm of water) may be elfec-
`tive. It is also found that treatment in a fairly dry en-
`vironment may also be highly effective if there isa base-
`metal electrode (e.g. of aluminium) on the silicon sur-
`face. Here again the surface states under the electrode
`disappear upon heating. it is assumed that in this case
`
`a reaction ofthe metal with traces of water produces
`sufficient hydrogen.
`
`2.5mA
`
`co
`
`A
`
`H,
`
`/v,(-H,o/
`
`02/+H20/
`
`Fig. 4. The lll'Vgs characteristics of a number of geometrically
`identical MOS transistors which have been processed in dilferent
`gas atmospheres after the chips had been oxidized.
`
`

`
`I970, No. 7/8/9
`
`MOS TECHNOLOGY
`
`229
`
`We may therefore conclude that the structure of the
`interface is generally very dependent on the crystal
`orientation of the silicon, on the method of growing
`the oxide and on the subsequent
`treatments. Many
`
`experiments can be explained on the assumption that
`the silicon bonds are or are not saturated with hydro-
`
`gen. We can be certain, however, that this does not give
`a complete description of the interface. A more exact
`theory would have to take into account, for example.
`the occurrence of SiOH groups and particularly the
`influence of other
`impurities (whether deliberately
`introduced or not) on the interface structure. We shall
`return to this in the next section.
`
`the oxide layer. The sodium atom breaks the bond
`between an oxygen and a silicon atom, and itself forms
`a bond with the oxygen atom. As a result, one of the
`valence electrons of the silicon loses its bond, and as
`
`this electron is easily released, a positively charged
`centre is formed.
`,
`
`The sodium at
`the interface may conceivably be
`replaced by other alkali metals and even by hydrogen.
`This may perhaps explain why, even under fairly clean
`conditions, oxidation in steam gives rise to more oxide
`charge than oxidation in dry oxygen. On the other
`hand. it has also been observed that heating in hydro-
`
`Positive charge at tlte oxide/silicon interface
`
`10 19Cm~3
`
`Anyone assuming that all the difficulties are resolved
`by a suitable after-treatment that reduces the number
`of surface states to a negligible value will be surprised
`by the result that. although the I..-Vg, curve has ap-
`proximately the theoretically expected shape after such
`a treatment, the threshold voltage often has a value less
`
`positive (or more negative) than was expected.
`indeed, the N-channel MOS transistors of fig. 4 have
`
`a negative threshold voltage after treatment in hydro-
`gen or wet nitrogen; in other words, they already have
`an inversion channel when the gate voltage is zero.
`
`This efi”ect cannot be explained in terms ofthe surface
`states, since they have the very effect of opposing the
`inversion.
`We must therefore assume that there are other cen-
`
`tres present in addition to the ones we have mentioned.
`it is usually supposed that the elTect
`is caused by the
`presence of positively charged centres in the oxide
`immediately adjacent to the silicon surface. although
`these are difficult to distinguish experimentally from
`ionized donor centres in the silicon near the surface.
`
`The amount of oxide charge, like the number of surface
`states described above, is connected with the interface
`
`structure. Again, with identical processing, the oxidized
`(100) plane is found to give the lowest oxide charge, and
`the (I l 1) plane the highest. Impurities have an impor-
`tant effect, particularly sodium. It has been clearly
`demonstrated [71 that the presence of sodium during
`oxidation can have a marked effect on the amount of
`
`charge, although the crystal orientation still remains
`important. It has been shown by neutron-activation
`analysis that the sodium has a distribution in the oxide
`like that illustrated infig. 5. Most of the sodium can be
`seen to lie in the top layer ofthe oxide, but there is also
`an accumulation at the interface with the silicon. The
`
`position of sodium in the oxide structure may perhaps
`best be represented as in fig. 6a. This structure may
`be regarded as a somewhat reduced oxide structure,
`which is also to be expected on the silicon side of
`
`Page 5 of 13
`
`
`
`
` 7/by/,.V///.'
`
`I
`
`?i
`6
`'5, .
`I
`
`.
`
`I
`
`I
`
`0.5
`
`.o.8pm
`
`Na
`
`10"’
`
`.
`
`‘
`
`
`0.4
`
`70 0
`
`0.2
`
`Fig. 5. Distribution of the concentration of Na atoms in the
`oxide as a function of the distance x from the silicon; the hatched
`area indicates the scatter of the measuring results.
`
`, 0
`
`0
`
`Q. 0:'s}:0:Na/esizo
`
`0
`
`0
`
`9 0.
`
`0
`
`E ozsizoz/vc;;.°s~}:o
`
`0
`
`.0
`
`Fig. 6. a) The location of a sodium atom in SiO2. The sodium
`atom breaks the bond between a silicon and an oxygen atom,
`and as a result one of the valence electrons or the silicon loses
`its bond;
`this electron is easily released and leaves behind a
`positive charge. b) A hydrogen atom can introduce an SiH group
`in SiO2. In this group the hydrogen atom forms a homopolar
`bond with the silicon and there is no longer an unpaired electron.
`
`[31 These measurements were carried out by Dr. K. H. Bcekmann
`and T. Tempelmann of the Philips Hamburg laboratories:
`see K. H. Beckmann and N. J. Harrick, J. Electrochem.
`Soc. 118, 614-6l9, l97l (No. 4).
`
`

`
`230
`
`PHILIPS TECHNICAL REVIEW
`
`VOLUME 3|
`
`gen or in water vapour — particularly at less elevated
`temperature (600 °C) — may cause the charge to de-
`crease. Here again, the formation of SiH may be ex-
`pected, resulting for example in the structure illustrated
`in fig. 6b. The hydrogen atom now forms a homopolar
`bond with the silicon atom. and this no longer has an
`unpaired electron.
`'
`.
`
`Fixed negative charge has sometimes been found. It
`can be caused by at least one impurity — gold. which is
`often present in small quantities. Gold is also readily
`made radioactive by neutron activation and its presence
`demonstrated in this way.
`The presence of sodium and of other impurities may
`have a variety ofcauses. The impurities may come from
`the chemicals used or from the quartz glass tubes in
`which the oxidations are carried out. Another impor-
`tant source may be dust; if.this settles on hot quartz
`tubes, sodium ions may easily enter the tube by diffu-
`sion and thus mix with the oxidizing gas. To achieve
`good process control it
`is therefore important to use
`pure chemicals and to protect the quartz tube from
`dust. Where extremely clean oxides are required, water-
`cooled quartz tubes may be used, and the silicon chip
`may then be heated by induction heating.
`
`For the control of the oxide charge, cleanliness is not the only
`important consideration, and indeed it may not always be neces-
`sary; what is particularly important, as in the case ofthe surface
`states, is the gas atmosphere. An oxidizing atmosphere increases
`the oxide charge, especially when the temperature is relatively
`low (the efl'ect is shown for example in fig. 4, where heating at
`450 °C in oxygen does not in fact give a transistor of the de-
`pletion type — because there are so many surface states opposing
`inversion — but it does clearly alter the threshold voltage in the
`negative direction, by 15 volts). This elTect of oxygen is not yet
`sufficiently understood. It is undoubtedly related to the oxidation
`mechanism: perhaps the_oxygen at the upper surface attracts
`electrons which are then generated by structural change of the
`oxide/silicon interface. it is also conceivable that traces of im-
`purities again play an important part: the transport of hydrogen
`from the interface towards the supplied oxygen is a likely possi-
`bility. which could cause the structure in fig. 6b to change for
`example to that in fig. 6a. In any case the significance for the
`technologist is that to obtain a low oxide charge he will have to
`end the oxidation in one way or another by tempering in a non-
`oxidizing gas.
`
`Depending on the process used, the oxide charge is
`found to have a value ranging from less than 101° to
`more than l01_3 unit charges per cmz. At an oxide
`thickness of say 0.2 pm, this means a change in the
`threshold voltage with respect to the theoretical value
`ranging from less than 0.1 V to more than I00 V.
`
`Process control has now advanced to a stage where
`variation of the oxide charge with a tolerance of 101°
`charges per cm? is quite feasible. One of the results of
`the presence of the positive oxide charge was that it was
`
`originally very difficult to make N-channel MOS tran-
`sitors that did not already have an inversion channel at
`zero gate voltage in the absence of surface states. This
`is the main reason why most MOS circuits have been
`(and still are) made with transistors of the P-channel
`
`type: here of course the presence of oxide charge only
`means that the threshold voltage is rather more nega-
`tive, since P-channel transitors are always of the en-
`hancement type.
`.
`»
`
`Determination of oxide charge and surface states by meas-
`urement of the MOS capacitance
`
`Information about the nature.and number of the surface states
`can be obtained by a.c. circuit measurements that determine how
`the elfective capacitance of the capacitor formed by gate, oxide
`layer and substrate depends on the applied d.c. voltage. A number
`of measurements have been made on MOS configurations spe-
`cially designed for the purpose, with the metal contact on the
`oxide much greater than the gate of a transistor but small with
`respect to the dimensions of the silicon wafer, which was entirely
`covered on the other side by a. metal substrate contact. These con-
`figurations might be referred to as MOS capacitors (fig. 7). The
`
`
`
`the ter-
`Fig. 7. M05 capacitor. The capacitance measured at
`minals is that of the series arrangement of C5502 and Cst. The
`magnitude of (‘st depends on the applied d.c. voltage.
`
`
`
`Fig. 8. Variation of the capacitance C of a MOS capacitor (on
`P-type silicon) with the applied d.c. voltage Vgs in the theoretical
`case where there are no surface states and no oxide charge. In
`this case the energy bands at Vus = 0 are not bent and the capac-
`itance measured is the flat-band capacitance C1. The MOS capac-
`itor has a capacitance equal to Cstoz when the silicon directly
`beneath the oxide is a good conductor. This can be demonstrated
`quite clearly with low-frequency a.c. voltages (curve LF), but at
`higher frequencies the agreement is not so good (HF).
`
`Page 6 of 13
`
`

`
`1970, No. 7/8/9
`
`MOS TECHNOLOGY
`
`231
`
`capacitance C measured at a particular frequency may be regarded
`as the resultant of the series configuration of a capacitance C5102
`across the oxide layer and a capacitance CS1, which is related to
`the fact that the charge on the lower ‘‘plate‘‘ of the capacitor has
`the form of a space—charge cloud in the silicon. We may write:
`
`then C W C3102-
`lf C5102 >v C51, then C a: C31; if Cst >> Cs-:02.
`ln these equations C5102 is a constant, but Cs; depends on the
`thickness of the depletion layer, that is to say on the applied
`voltage and on the doping concentration of the silicon.
`If there is no oxide charge and there are no surface states, we
`may expect the relation between Cand Vgs in a MOS configura-
`tion on a P-type substrate to be represented by curves like those
`in fig. 8. This figure also applies to N-type material, provided
`the positive and negative Vgs scales are interchanged.
`
`to about Csioz, but at higher frequencies C remains small. This
`is because the supply and removal of charge carriers in the inverted
`layer of an MOS capacitor cannot take place fast enough at such
`high frequencies. ln MOS transistors this efi"ect is not so pro-
`nounced,
`the inverted layer ‘here being connected with source
`and drain diffusion.
`
`Two typical examples of the results of capacitance measure-
`ments can be seen in fig. 9a and b. These measurements were not
`made on MOS capacitors but on MOS transistorsispecially made
`for the purpose, since it was also required to measure the drain
`current 1.1. This is also included in the figures. The transistors
`on which the measurements represented in fig. _9a and fig. 9b were
`carried out had the same shape and dimensions and were made
`on P-type substrates having the same conductivity (50 Qc_m).
`There was only a slight difference in the production process: after
`oxidation (16 hours at 1200 °C in oxygen)‘ and a phosphorus
`diffusion (4 hours at ll50 °C in dry nitrogen) the transistor of
`
`28pF
`
`1.5mA
`
`28pF
`
`1.5mA
`
`7.0
`
`Idsat
`
`0.5
`
`-1.0
`
`0
`
`40
`
`80
`
`720
`
`T. '65
`
`2
`
`0
`160V
`
` 26
`
`(f
`
`2/.
`
`22
`-30
`
`7.0
`
`Ifsat
`
`0.5
`
`0
`20V
`
`E‘
`
`2!.
`
`22
`-80
`
` 26
`
`Fig. 9. Variation of the gate capacitance C with the d.c. voltage Vgs in an N-channel MOS
`transistor. 0) After oxidation, the transistor was processed in wet nitrogen. From the cal-
`culated flat-band capacitance C; it follows that the flat-band voltage V; is -12 V. The thresh-
`old voltage Vm of this transistor is -6 V, as appears from the [.1 Sup Vgs characteristic.
`1:) Here the transistor has not undergone treatment in wet nitrogen, and consequently sur-
`face states are present at the SiO2/Si interface. The flat-band voltage Vr is ~30 V, the thresh-
`old voltage V“.
`is +80 V.
`
`The nature of the curves may be explained in qualitative terms
`as follows. In the case of a P-type substrate a negative charge
`on the measuring electrode of the MOS capacitor would increase
`the hole concentration at the surface. Charge variations caused
`by the a.c. signal used for measurement then occur so close to
`the interface that Cs; is relatively large and C is approximately
`
`equal to Csio2. If the negative voltage on the electrode is allowed
`to approach zero, then these charge variations gradually occur
`less close to the interface and Cs; becomes smaller. As a result
`the measured capacitance is also lower. If Vgs is raised to positive
`values, this process continues until the threshold voltage is reached
`and inversion takes place at the surface.
`The values of C found when Vgs is raised still further depend
`on the frequency at which the measurement is made. At low
`frequencies (below about 100 Hz): C increases with rising Vgs up
`
`fig. 9a was subjected to heat treatment at 450 °C for a further
`30 minutes in wet nitrogen before the electrode metal was de-
`posited.
`The oxide layer was 1.2 y.m thick in both transistors, and for
`the substrate conductivity of 50 Qcm the threshold voltage V”.
`should be +6 V when all other effects are neglected. As can be
`seen in fig. 9a, the threshold voltage is -6 V, i.e. 12 V lower.
`If the sum of the oxide charge and the charge present in the sur-
`face states at the threshold voltage is put at N; elementary charges
`:2 per cm‘3, we can calculate N; from the expression:
`
`Nu? = “'CoxA Vth,
`
`wherezl Va. is the change in Va. caused by the positive charge,
`i.e. —|2 V in the present case. We then arrive at N; = 2x 1011
`positive charges per cmz.
`
`Page 7 of 13
`
`Page 7 of 13
`
`

`
`232
`
`PHILIPS TECHNICAL REVIEW
`
`VOLUME 3|
`
`From the shape of the curves of fig. 90 it can be shown that
`the positive charge in this transistor must be situated almost
`entirely in.the oxide, and that the charge in the surface states is
`negligible in this case. Now let us return for a moment to fig. 8.
`This shows the variation of C with Vgs for the theoretical case
`in which there are no surface states and no oxide charges. In this
`case, for a gate voltage of V“ := 0 the energy bands in the energy-
`band diagram of the MOS transistor are not curved '21. and C
`has a value Cr that can be calculated from the oxide thickness
`and the substrate doping. lf oxide charges do exist, they cause
`band curvature at zero gate voltage. and a negative gate voltage
`la is then required to remove the band curvature and obtain the
`flat-band capacitance C1. If we calculate this for a given transistor
`\ve can ‘use the measured C- V35 curve to find the magnitude of
`V: for that transistor. The voltage V! is a measure of the oxide
`charge without the charge in the surface states, because it
`is
`measured when there is as yet no question of inversion and the
`associated electron trapping. In fig. 91:, V; = —l2 V, which is
`therefore the same as /I Vlh. It is apparent, that /IV...
`is then
`entirely due to the oxide charge, and the surface states are negli-
`gible. The calculatcd number NI. = 2x l0”/cm‘-’ therefore con-
`sists entirely of oxide charge.
`is
`In fig. 9b we have a dilferent case. Here the value of V.
`about —-30 V, and we see from the curve for I.. that Vu. is about
`-I 80 V. If we compare