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`

`EXTENDED ABSTRACTS
`
`VOLUME 94-1
`
`SPRING MEETING
`
`SAN FRANCISCO, CALIFORNIA
`
`MAY 22-27, 1994
`
`
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`
`
`Battery
`Corrosion
`
`Dielectric Science and Technology
`Electrodeposition
`Electronics
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`Energy Technology
`Fullerenes
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`High Temperature Materials
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`Industrial Electrolysis and Electrochemical Engineering
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`Luminescence and Display Materials
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`Organic and Biological Electrochemistry
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`Physical Electrochemistry
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`THE ELECTROCHEMICAL SOCIETY, INC.
`10 South Main St., Pennington, NJ 08534-2896
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`Page 2 of 5
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`

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`
`Copyright 1994
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`by
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`The Electrochemical Society, Inc.
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`Presentation of a paper at a Technical Meetingofthis
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`Society does not guarantee publicationin full by the
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`Society. Extended Abstracts contained herein may
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`publications other than those of The Electrochemical
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`Society in excess of 1/6 of the material presented,
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`illustrations to be presented during paper
`Not all
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`delivery are reproduced here. Production limitations
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`to this volume caused illustration reduction to a point
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`where a phenomenondescribed by the author may
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`in some cases, beenlost in reproduction. All
`have,
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`magnifications are those existing before photographic
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`reduction.
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`Library of Congress Catalog Number 94-70880
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`ISBN 1-56677-081-5
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`Printed in the United State of America
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`Page 3 of 5
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`Page 3 of 5
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`

`

`density 64 Mbit non-volatile devices.
`5x 106 times magnified observations
`the poly gate to
`fefill silicon dioxide interface is observed at
`the step of
`
`2_PROCESSFLOWchemical-mechanical polishing for densified (figure6)
`and undensified (figure7) materials. We clearly point
`The process flow of this process is given in figure
`out
`the difference of interface roughness . The surface
`L. After
`a masking step using a silicon nitride/silicon
`is
`short
`range perturbed on 7 to 8 atomic planes
`in
`dioxide
`stack
`(180nm/17.5nm), mask
`and
`trench
`the oxide bulk in the undensified case. Middle range
`etching are performed in a P5000 equipment, using an
`induced damage
`is
`also obtained in
`the undensified
`HBr,Cl2 chemistry in order
`to get 70°
`sloped grooves.
`case whilst
`the densified samples
`surface
`aspect
`is
`After
`resist
`removal
`eliminating also the
`polymer
`close
`to
`the
`as-deposited
`samples
`surface. We
`residues,
`a sidewall oxidation is performed to control
`evidence,
`as Trogolo
`et
`al.[8],
`that
`chemical-
`the silicon surface quality and screening of a possible
`mechanical polishing can
`damage
`the oxide surface
`sidewall
`implantation. The
`refill material
`is
`then
`deposited in
`a LPCVD reactor
`at 900°C using an
`but
`still
`this damage can be minimized by using
`SiH2C1I2,N20 based mixture. Chlorine is out-diffused
`Proper densification of the material. For
`the first
`time,
`using
`low temperature steam densification to avoid
`this
`is correlated to electrical
`results
`and
`the great
`impact of
`the densification process
`is
`reported.
`The
`“pancakes
`shapes"[6]
`after
`gate
`oxidation. The
`planarization
`step
`is
`achieved
`by
`using
`a
`100%
`saturation of possible dangling bonds by densification
`can
`explain why
`the
`surface
`dissolution
`and
`chemi
`mechanical polishing (CMP) process
`on
`a
`
`hydration by the CMP induces
`less damage on
`the
`PRESI equipment. Silicon nitride is used as
`an etch-
`densified material. The
`damaged
`areas
`can
`be
`a
`stopper with
`an oxide
`to
`niride
`selectivity of
`4,
`source of contamination (mobile
`and metallic
`ions)
`Scrubbing is performed after
`this
`step to remove the
`that
`can
`reach
`the oxide/silicon interface
`later
`in
`generated particles. The
`influence of
`the subsequent
`process, The
`removal
`of
`the
`damaged
`layer
`is
`HF dip is examined in the following. The active mask
`
`
`
`Necessary to achieve a contamination free process.
`stack is
`removed by using standard a BOE, H3PO4, HF
`
`
`
`
`
`References
`dip sequence
`before
`an
`implant
`sacrificial
`oxide
`
`
`
`
`
`
`
`
`
`
`
`growth
`and
`strip. The BOx-ON process
`is
`thus
`[1]Fuse et al.
`IEDM Tech. Digest, pp.732-735,1987
`
`
`
`
`
`
`
`
`
`
`[2]Davari et al.
`IEDM Tech. Digest, pp.61-64,1989
`completed. The
`following process
`steps
`are derived
`
`
`
`
`
`
`
`
`
`
`
`
`from standard CMOS.
`
`
`
`
`
`
`(3)Hisuname
`ct
`al.
`IEDM Tech. Digest,
`pp.$83-
`
`
`
`
`586,1989
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`3STRENCHREFILLANDSHAPERELATEDSTRESS.
`
`
`(4]Shibahara
`IEDM Tech, Digest,
`et
`al.
`pp 275-
`
`
`
`
`
`
`
`
`
`278,1992
`
`
`
`Figures2and3show SEM cross sections of 1 pm)
`
`
`
`
`
`
`
`
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`
`
`
`
`
`
`(5]Pierce et al. ECS Spring Tech. Digest, pp. 595-6,1991
`
`
`
`
`
`pitch
`arrays
`respectively
`for
`70°
`and 90°
`sloped
`
`
`
`
`
`
`
`{6)Watanabe et al, JECS,vol.128,n°12,pp2630-35,1981
`
`grooves after
`refill. These two extreme cases show that:
`
`
`
`
`[7]Deleonibus ESSDERC Tech. Digest, pp.391-398,1993
`1) no void is obtained in the 0.45 jim opening of the
`[8]Trogolo &Rajan,ECS Fall Tech.Digest,pp.382-3,1992
`70°
`sloped samples; 2) no stress
`figure is observed in
`
`
`
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`
`
`
`
`
`
`same example using a BOE revelation; 3)
`in the 90°
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`Page 4 of 5
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`

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`3&
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`i
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`u7 :"MASK & FIELD
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`Figure 1
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`—Box-ON process flow
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`70° sloped trenches after 1000 nm
`Figure 2
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`deposition of high temperature CVD SiO2. Chemical
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`revelation does not evidence any local stress or
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`voiding in tym pitch /0.45um space features.
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`Short
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`Figure 4
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`topography after 100% chemical-mechanical
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`polishing.on 90° sloped grooves.
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`Densifie - Poti
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`Figure 5, Flat-band voltage versus oxide thick-
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`ness after different process steps of
`the Box-ON
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`process. The evolution for densified and undensi-
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`tied material
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`Figure 6 HRTEM observation of poly gate /CVD oxide
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`interface on MOScapacitors for: densitied-
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`polished SiO2(figure 6); undensified-polished
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`SiO2( figure 7).
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`Figure 7
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`5S Milton
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`Page 5 of 5
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`90° sloped trenches after 1000 nm
`Figure 3
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`deposition of high temperature CVD SiO2 and
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`densification. Stress figures and voiding can be
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`revealed in 1m pitch /0.65um space teatures.
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`thermet
`Taitisi
`7
`ostdetion
`12
`1000 am Thermei CVD deposition
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`Dens
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`Chemicai-mechanical
`pol
`10
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`Contemineied anise remove!
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`Secrificiat oxtdetion &
`str
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`Gate oxidation
`—O— WITHOUT DENSIFICATION
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`WITH DENSIFICATION
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`Cc)
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`IVFBI(V)
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`venue
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`OXIDE THICKNESS(nm)
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`Page 5 of 5
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