`
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`____________
`
`Olympus Corporation and Olympus America Inc., et al.,
`Petitioners,
`
`v.
`
`Papst Licensing GmbH & Co., KG,
`Patent Owner.
`
`
`
`
`
`
`
`
`
`
`
`CASE: Unassigned
`Patent No. 8,504,746
`
`
`
`
`
`
`
`
`
`
`
`DECLARATION OF DR. PAUL F. REYNOLDS, Ph.D.
`IN SUPPORT OF
`PETITION FOR INTER PARTES REVIEW
`
`Olympus et al. 1103
`
`
`
`TABLE OF CONTENTS
`
`
`Page
`
`V.
`
`
`
`BACKGROUND AND QUALIFICATIONS ................................................ 1
`I.
`INFORMATION PROVIDED TO ME .......................................................... 6
`II.
`III. THE ‘746 PATENT ...................................................................................... 12
`IV. SPECIFIC DISCUSSION OF RELEVANT PATENTS AND
`ARTICLES ................................................................................................... 18
`A. Murata ‘821 Patent (Ex. 1102) ........................................................... 18
`CONCEPTS AND TERMS USED IN TASLER’S ’746 CLAIMS ............. 20
`A. Automatic Recognition Process ......................................................... 20
`B.
`File System Information ..................................................................... 20
`C.
`End User ............................................................................................. 21
`D. A SCSI and SCSI Disk Drive Discussion .......................................... 22
`E.
`File System Information Acquisition ................................................. 28
`F.
`UNIX Discussion ............................................................................... 36
`VI. DISCUSSION OF CLAIM ELEMENTS ..................................................... 38
`A.
`Independent claims 1, 31, and 34 ....................................................... 38
`1.
`The preamble of claim 1 .......................................................... 38
`
`2.
`The preambles of claims 31 and 34 ......................................... 41
`
`3.
`A program memory of claim 1 ................................................. 42
`
`4.
`An analog signal acquisition channel of claim 1 ..................... 44
`
`5.
`A processor operative interfaced (claims 1, 31 and 34) .......... 44
`
`6.
`or reads a portion of the image file that isn’t in the image
`
`buffer.A processor that is configured and programmed to
`implement a data generation process (claims 1, 31 and
`34) ............................................................................................ 46
`A processor that automatically causes at least one
`parameter indicative of the class of devices to be sent to a
`computer (claims 1, 31 and 34) ................................................ 50
`
`7.
`
`
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`-i-
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`Olympus et al. 1103
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`TABLE OF CONTENTS
`(continued)
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`Page
`
`(a) Anticipation .............................................................................. 51
`(b) Obviousness ............................................................................. 56
`8.
`A processor that is further configured and programmed to
`
`execute a file transfer process (claims 1, 31 and 34) ............... 59
`(a) Anticipation .............................................................................. 60
`(b) Obviousness ............................................................................. 66
`9.
`No requirement for any user-loaded file transfer enabling
`
`software (claims 1, 31 and 34) ................................................. 66
`B.
`Dependent claim 2 .............................................................................. 68
`C. Dependent claim 3 .............................................................................. 68
`D. Dependent claims 4 and 12 ................................................................ 69
`E.
`Dependent claims 5 and 11 ................................................................ 70
`F.
`Dependent claim 6 .............................................................................. 72
`G. Dependent claims 7 and 8 .................................................................. 73
`H. Dependent claim 9 .............................................................................. 74
`I.
`Dependent claim 10 ............................................................................ 75
`J.
`Dependent claim 14 ............................................................................ 76
`K. Dependent claim 15 ............................................................................ 77
`L.
`Dependent claims 16 and 22 .............................................................. 78
`M. Dependent claim 17 ............................................................................ 78
`1.
`Anticipation .............................................................................. 78
`
`2.
`Obviousness ............................................................................. 83
`
`N. Dependent claim 18 ............................................................................ 84
`1.
`Anticipation .............................................................................. 84
`
`2.
`Obviousness ............................................................................. 85
`
`O. Dependent claim 19 ............................................................................ 86
`1.
`Anticipation .............................................................................. 86
`
`
`-ii-
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`Olympus et al. 1103
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`TABLE OF CONTENTS
`(continued)
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`Page
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`
`
`Obviousness ............................................................................. 88
`2.
`
`P.
`Dependent claim 20 ............................................................................ 90
`Q. Dependent claim 21 ............................................................................ 90
`R. Dependent claim 23 ............................................................................ 91
`S.
`Dependent claim 24 ............................................................................ 92
`T.
`Dependent claim 25 ............................................................................ 93
`U. Dependent claim 26 ............................................................................ 94
`V. Dependent claims 27 and 28 .............................................................. 94
`W. Dependent claim 29 ............................................................................ 95
`X. Dependent claim 30 ............................................................................ 95
`Y. Dependent claim 35 ............................................................................ 97
`VII. MISCELLANEOUS MATTERS ................................................................. 99
`
`
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`-iii-
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`Olympus et al. 1103
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`EXHIBIT
`NO.
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`1001-
`1100
`
`1101
`
`1102
`
`1103
`
`1104
`
`1105
`
`1106
`
`1107
`
`1108
`
`1109
`
`1110
`
`APPENDIX OF EXHIBITS
`
`TITLE
`
`Reserved
`
`U.S. Patent No. 8,504,746 (“the ’746 patent”)
`
`U.S. Patent No. 5,508,821 to Murata (“Murata”)
`
`Declaration of Dr. Paul F. Reynolds, Ph.D. (“Reynolds Decl.”)
`
`Papst Litigation Claim Constructions
`
`American National Standards Institute, “ANSI X3.131-1994 - Small
`Computer System Interface-2” (1994)
`
`American National Standards Institute, Procedures for the
`Development and Coordination of American National Standards,
`Approved by the ANSI Board of Directors (Sept. 9, 1993).
`
`Ray Duncan, ed., “The MS-DOS Encyclopedia,” Microsoft Press
`(1988)
`
`Frank G. Fiamingo, “Unix System Administration,” The Ohio State
`University (1996)
`
`Declaration of Frank G. Fiamingo, Ph.D. (“Fiamingo Decl.”)
`
`Excerpts from Frisch, “Essential System Administration,” 2nd
`
`
`
`
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`-iv-
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`Olympus et al. 1103
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`1111
`
`1112
`
`1113
`
`Edition, O’Reilly & Associates (1995).
`
`Excerpts from McKusick, et al., “Design and Implementation of the
`4.4BSD Operating System,” Addison-Wesley Longman, Inc. (1996)
`
`U.S. Patent No. 5,731,834 to Huot et al. (“Huot”)
`
`JP H5-344283 to Takahashi (“Takahashi”) (including original
`certified English translation thereof)
`
`1114
`
`U.S. Patent No. 5,592,256 to Muramatsu (“Muramatsu”)
`
`1115
`
`Excerpt from the Microsoft Computer Dictionary (2nd ed. 1994)
`
`
`
`
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`-v-
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`Olympus et al. 1103
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`
`
`I.
`
`I, Dr. Paul F. Reynolds, Ph.D., declare as follows:
`
`BACKGROUND AND QUALIFICATIONS
`
`1.
`
`From 1980 until August 2012, I was a Professor of Computer Science
`
`at the University of Virginia’s School of Engineering and Applied Science.
`
`
`2.
`
`I have also served, and in some cases continue to serve, as an expert
`
`consultant on distributed system matters for MITRE, Aerospace Corporation, the
`
`Institute for Defense Analyses, Vanguard Research and currently for the U.S.
`
`Army National Ground Intelligence Center.
`
`
`3.
`
`I have a Bachelor of Arts degree in Psychology from Ohio Northern
`
`University that I obtained in 1970, a Master’s of Science in Computer Science
`
`from the University of Texas at Austin, obtained in 1975, and a Doctor of
`
`Philosophy in Computer Science from the University of Texas at Austin, obtained
`
`in 1979. Both my Masters and Ph.D. focused on parallel and distributed systems
`
`and networking topics.
`
`
`4.
`
`During my time as a Professor, I was awarded over 60 grants, and
`
`conducted research sponsored by DARPA, the National Science Foundation,
`
`DUSA (OR), the National Institute for Science and Technology, the Defense
`
`Modeling and Simulation Office, Virginia Center for Innovative Technology and
`
`numerous industries.
`
`
`
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`1
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`5.
`
`I taught many Ph.D. level classes on topics relating to distributed
`
`computing and high performance networking. I have advised, to completion, 65
`
`graduate degrees. The majority of my students, including my 16 Ph.D. students,
`
`conducted research in distributed computing and networking. I published on many
`
`of these topics.
`
`
`6.
`
`Since the mid-1970s, almost half of my research has been in the field
`
`of parallel and distributed systems and networking.
`
`
`7.
`
`In particular, much of my research in the 1980’s and 1990’s was
`
`focused on efficient time management of distributed simulations. I published
`
`widely on the topic, and was actively involved in the deployment of related
`
`technologies within the Department of Defense (DoD) modeling and simulation
`
`communities.
`
`
`8.
`
`Specifically, I was one of the originators of the DoD High Level
`
`Architecture for distributed simulations (IEEE standard 1516). I was also an
`
`organizer and overseer for the DoD Joint National Test Facility (having a focus on
`
`distributed simulation) in Colorado Springs.
`
`
`9.
`
`Because of my experience, I was selected to be the program chair for
`
`the IEEE Parallel and Distributed Simulation Conference on two different
`
`occasions.
`
`
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`10.
`
`I am also the co-architect of Isotach Networks, a system which
`
`guarantees message delivery order in distributed systems without employing real
`
`time clocks and supports very efficient management of consistency in concurrent
`
`caches. Isotach Networks was supported by both the National Science Foundation
`
`and the Defense Advanced Research Projects Agency and became subject material
`
`in four of the Ph.D. dissertations that I supervised.
`
` Below is a partial list of my publications:
`11.
`
`
`
`Spiegel, M., Reynolds, P.F., “Lock-Free Multiway Search Trees,”
`ACM/IEEE International Conference on Parallel Processing, Sept,
`2010.
`
` Highley, T.J., Reynolds, P.F., and Vellanki, V. “Marginal Cost-Benefit
`Analysis for Predictive File Prefetching,” ACM Southeast Conference,
`March, 2003
`
`
`
`Srinivasa, R., Reynolds, P.F., and Williams, C., “A New Look at Time-
`Stamp Ordering Concurrency Control,” 12th International Conference
`on Database and Expert Systems Applications - DEXA 2001, Sept,
`2001.
`
` Williams, C., Reynolds, P.F., and de Supinski, B.R. “Delta Coherence
`Protocols,” IEEE Concurrency, Spring, 2000.
`
`
`
`
`
`
`
`Srinivasa, R., Reynolds, P.F., and Williams, C. “IsoRule: Parallel
`Execution of Rule-based Systems,” 1999 Int’l Conference on Parallel
`Processing, June 1999.
`
`Srinivasan S., and Reynolds, P.F. “Elastic Time,” ACM Trans on
`Modeling and Computer Simulation, 1998.
`
`Srinivasan, S., Lyell, M., Wehrwein, J., Reynolds, P.F., “Fast
`Reductions on a Network of Workstations,” 1997 International
`Conference on High Performance Computing (HiPC97), Bangalore,
`India, Dec 1997.
`
`
`
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`3
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` Williams, C., and Reynolds,P.F. “Isotach Networks,” IEEE
`Transactions on Parallel and Distributed Systems, 1997.
`
` Williams, C., and Reynolds, P.F., “Combining Atomic Actions,”
`Journal of Parallel and Distributed Computing, pp. 152-163, Feb, 1995.
`
`
`
`Srinivasan, S. and Reynolds, P.F., “Non-Interfering GVT Computation
`via Asynchronous Global Reductions,” Proceedings of ACM Winter
`Simulation Conference, pp. 740-749, Dec, 1993.
`
` Reynolds, P.F., Pancerella, C., and Srinivasan, S., “Design and
`Performance Analysis of Hardware Support for Parallel Simulation,”
`Journal of Parallel and Distributed Computing, pp. 435-453, Aug, 1993.
`
`
`
`Pancerella, C. and Reynolds, P.F., “Disseminating Critical Target-
`Specific Synchronization Information in Parallel Discrete Event
`Simulations,” Proceedings of the 7th Workshop on Parallel and
`Distributed Simulation, pp. 52-59, May, 1993, San Diego, CA.
`
` Williams, C., and Reynolds, P.F., “Network-Based Coordination of
`Asynchronously Executing Processes with Caches,” Workshop on Fine-
`Grain Massively Parallel Coordination, 4 pages, May, 1993, San Diego,
`CA.
`
` Reynolds, P.F., Pancerella, C. and Srinivasan, S. “Making Parallel
`Simulations Go Fast,” Proceedings of the 1992 ACM Winter
`Simulation Conference, pp. 646-656, Dec, 1992.]
`
` Reynolds, P.F., “An Efficient Framework for Parallel Simulation,”
`International Journal on Computer Simulation, 2,4, pp. 427-445 (1992).
`
` Nicol, D.M., and Reynolds, P.F., “Optimal Dynamic Remapping of
`Parallel Computations,” IEEE Transactions on Computer Systems, pp.
`206-219 (Feb, 1990).
`
` Reynolds, P.F., “Heterogeneous Distributed Simulation,” Proceedings
`of the 1988 ACM Winter Simulation Conference, pp. 206-209, Dec,
`1988, San Diego, CA.
`
` Reynolds, P.F., “A Spectrum of Options for Parallel Simulation,”
`Proceedings of the 1988 ACM Winter Simulation Conference, pp. 325-
`332, Dec, 1988, San Diego, CA.
`4
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` Carson, S.D. and Reynolds, P.F., “The Geometry of Semaphore
`Programs,” ACM Transactions on Programming Languages and
`Systems, 9,1, pp. 25-53 (Jan, 1987).
`
` O’Hallaron, D.R. and Reynolds, P.F., “A Generalized Deadlock
`Predicate,” Information Processing Letters, pp. 181-188 (Nov, 1986).
`
` Nicol, D.M., and Reynolds, P.F., “An Optimal Repartitioning Decision
`Policy,” Proceedings of The ACM Winter Simulation Conference, pp.
`493-497, Nov, 1985, San Francisco, CA.
`
` Nicol, D.M. and Reynolds, P.F., “A Statistical Approach to Dynamic
`Partitioning,” Proceedings of the SCS Winter Multi-Conference, pp.
`53-56, Jan 24-26, 1985, San Diego, CA.
`
` Reynolds, P.F., “A Shared Resource Algorithm for Distributed
`Simulation,” Proceedings of The 9th International Symposium on
`Computer Architecture, pp. 259-266, April, 1982, Austin, TX.
`
` Chandy, K.M., and Reynolds, P.F., “Scheduling Partially Ordered
`Tasks with Probabilistic Execution Times,” Proceedings of Fifth
`SIGOPS, pp. 169-177, March, 1975, Austin, TX.
`
` A copy of my curriculum vitae, which describes in further detail my
`12.
`
`qualifications, responsibilities, employment history, honors, awards, professional
`
`associations, invited presentations, and publications is attached to this declaration
`
`as Appendix A-1.
`
`
`13.
`
`I have reviewed United States Patent No. 8,504,746 (“the ’746
`
`patent”) to Michael L. Tasler (“Tasler”) as well as the applications referenced in
`
`the section entitled “Related U.S. Application Data” and related U.S. Patent No.
`
`8,966,144 (“the ’144 patent”). I have also reviewed the publications cited in this
`
`declaration and referenced in the inter partes review petition submitted herewith.
`
`
`
`
`5
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`II.
`
`INFORMATION PROVIDED TO ME
`
`14.
`
`In proceedings before the USPTO, I understand that the claims of an
`
`unexpired patent are to be given their broadest reasonable interpretation in view of
`
`the specification from the perspective of one skilled in the field. I have been
`
`informed that the ‘746 patent has not expired. In comparing the claims of the ‘746
`
`patent to the known prior art, I have carefully considered the ‘746 patent, and the
`
`‘746 patent’s file history using my experience and knowledge in the relevant field.
`
`
`15.
`
`I am informed that the ‘746 patent was filed on September 27, 2010,
`
`but that it claims to be related to a chain of applications going back to a German
`
`application alleged to have been filed March 4, 1997. I am informed that this
`
`German application does not contain all of the disclosure of the ’746 patent.
`
`Nevertheless, for purposes of this declaration only, I have assumed a priority date
`
`of March 4, 1997 in determining whether a reference constitutes prior art.
`
`
`16.
`
`I understand that a claim is unpatentable if its subject matter is
`
`anticipated or obvious. I further understand that anticipation of a claim requires
`
`that every element of a claim be disclosed expressly or inherently in a single prior
`
`art reference, in combination, as claimed. I understand that a reference is read
`
`from the perspective of one of ordinary skill at the time of the invention.
`
`
`17.
`
`I further understand that obviousness of a claim requires that the claim
`
`be obvious from the perspective of a person having ordinary skill in the relevant art
`
`
`
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`6
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`at the time the alleged invention was made. I further understand that a patent
`
`claim can be found unpatentable as obvious where the differences between the
`
`subject matter sought to be patented and the prior art are such that the subject
`
`matter as a whole would have been obvious at the time the invention was made to a
`
`person having ordinary skill in the relevant field. I understand that an obviousness
`
`analysis involves a consideration of (1) the scope and content of the prior art; (2)
`
`the differences between the claimed invention and the prior art; and (3) the level of
`
`ordinary skill in the pertinent field.
`
`
`18.
`
`I further understand that certain factors may support or rebut the
`
`obviousness of a claim. I understand that such secondary considerations include,
`
`among other things, commercial success of the patented invention, skepticism of
`
`those having ordinary skill in the art at the time of invention, unexpected results of
`
`the invention, any long-felt but unsolved need in the art that was satisfied by the
`
`alleged invention, the failure of others to make the alleged invention, praise of the
`
`alleged invention by those having ordinary skill in the art, and copying of the
`
`alleged invention by others in the field. I understand that there must be a nexus—
`
`a connection—between any such secondary considerations and the alleged
`
`invention. I also understand that contemporaneous and independent invention by
`
`others is a secondary consideration tending to show obviousness.
`
`
`
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`7
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`Olympus et al. 1103
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`19.
`
`I further understand that a claim is obvious if it unites old elements
`
`with no change to their respective functions, or alters prior art by mere substitution
`
`of one element for another known in the field and that combination yields
`
`predictable results. While it may be helpful to identify a reason for this
`
`combination, common sense should guide and no rigid requirement of finding a
`
`teaching, suggestion or motivation to combine is required. When a product is
`
`available, design incentives and other market forces can prompt variations of it,
`
`either in the same field or different one. If a person having ordinary skill in the
`
`relevant art can implement a predictable variation, obviousness likely bars its
`
`patentability. For the same reason, if a technique has been used to improve one
`
`device and a person having ordinary skill in the art would recognize that it would
`
`improve similar devices in the same way, using the technique is obvious. I
`
`understand that a claim may be obvious if common sense directs one to combine
`
`multiple prior art references or add missing features to reproduce the alleged
`
`invention recited in the claims.
`
`
`20.
`
`I have been advised that there are multiple factors relevant to
`
`determining the level of ordinary skill in the pertinent art, including the educational
`
`level of active workers in the field at the time of the invention, the sophistication of
`
`the technology, the type of problems encountered in the art, and the prior art
`
`
`
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`8
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`solutions to those problems. I have also been informed that the level of skill in the
`
`art is evidenced by the prior art references.
`
` When I use the term “POSITA” in this document, I mean a person
`21.
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`having ordinary skill in the art at the relevant time (1996-1997). In my opinion a
`
`POSITA would have had at least a four-year degree from a reputable university in
`
`electrical engineering, computer science, or related field of study, or equivalent
`
`experience, and at least two years’ experience in studying or developing computer
`
`interfaces or peripherals. A POSITA would also be familiar with operating
`
`systems (e.g., DOS, Windows, Unix) and their associated file systems (e.g., FAT
`
`file system), and device drivers for computer components and peripherals (e.g.,
`
`mass storage device drivers) and communication interfaces (e.g., SCSI and
`
`PCMCIA interfaces).
`
` Based on my experience I have an understanding of the capabilities of
`22.
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`a person of ordinary skill in the relevant field. I have supervised and directed
`
`many such persons over the course of my career. Further, I had those capabilities
`
`myself at the priority date of the ’746 Patent.
`
`
`23.
`
`I have been asked to consider U.S. Patent 5,508,821 to Kazuyuki
`
`Murata (Ex. 1102, “Murata”), and whether the techniques and procedures
`
`discussed in the ‘821 patent Murata read on each limitation of the claims of the
`
`
`
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`9
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`’746 patent. My conclusion is that Murata renders claims 1, 2, 3, 6, 7, 8, 9, 14, 15,
`
`17, 18, 19, 21, 24, 25, 26, 27, 28, 30, 31, and 34 invalid as anticipated.
`
`
`24.
`
`In addition, to the extent that any of these claims are found not to be
`
`anticipated, it is my opinion that Murata in combination with admitted prior art in
`
`the ’746 patent (“Admitted Art”) and basic references showing the operation of
`
`SCSI, UNIX and DOS render the Challenged claims obvious. These basic
`
`references include:
`
` American National Standards Institute, “ANSI X3.131-1994 - Small
`
`Computer System Interface-2” (“SCSI Reference”) (Exhibit 1105),
`
`which was published in 1994;
`
` The MS-DOS Encyclopedia by Ray Duncan, General Editor (“MS-
`
`DOS Reference”) (Exhibit 1107), which was published in 1988;
`
` Frank G. Fiamingo, “Unix System Administration,” The Ohio State
`
`University (“UNIX-A Reference”) (Ex. 1108), which was published
`
`in 1996;
`
` Frisch, “Essential System Administration”, 2nd Edition, O’Reilly &
`
`Associates (“UNIX-B Reference”) (Ex. 1110), which was published
`
`in 1995;
`
` McKusick, et al., “Design and Implementation of the 4.4BSD
`
`Operating System,” Addison-Wesley Longman, Inc. (“UNIX-C
`
`
`
`
`10
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`Reference”) (Ex. 1111) was published in 1996. This reference is §
`
`102(b) prior art because it was published more than one year before
`
`the ’746 patent’s effective U.S. filing date.
`
`
`25.
`
`I herein refer to the SCSI, MS-DOS, and UNIX-A, UNIX-B, and
`
`UNIX-C References as the “Basic SCSI/DOS/UNIX References.” These basic
`
`SCSI, UNIX and DOS references (or those like them) demonstrate that elements in
`
`the challenged claims that are deemed not to be explicitly disclosed in Murata were
`
`well within the basic knowledge of a POSITA. In my opinion, claims 1, 2, 3, 6, 7,
`
`8, 9, 14, 15, 16, 17, 18, 19, 20, 21, 22, 24, 25, 26, 27, 28, 29, 30, 31, and 34 are, at
`
`a minimum, obvious over Murata in view of the Admitted Art and the Basic
`
`SCSI/DOS/UNIX References cited above.
`
`
`26.
`
`In addition, I have considered the following references:
`
` U.S. Patent No. 5,731,834 to Huot et al. (“Huot”) (Exhibit 1112),
`
`which was filed on June 7, 1995 and issued on March 24, 1998. I
`
`understand that Huot is prior art to the ‘746 patent under pre-AIA 35
`
`U.S.C. § 102(e).
`
` JP H5-344283 to Takahashi (“Takahashi”) (Exhibit 1113). Takahashi
`
`discloses a scanning device that attaches to a host computer via SCSI.
`
`Takahashi was filed on June 11, 1992 and published on December 24,
`
`
`
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`11
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`Olympus et al. 1103
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`1993. I understand this reference is prior art to the ’746 patent under
`
`35 U.S.C. § 102(b).
`
` U.S. Patent No. 5,592,256 to Muramatsu (“Muramatsu”) (Exhibit
`
`1114). Muramatsu discloses a camera photometric device that
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`implements a fast Fourier transform during the analog data generation
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`process. Muramatsu was filed on May 29, 1996, and issued on
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`January 7, 1997, and is prior art to the ’746 patent under 35 U.S.C. §
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`102(b).
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`27.
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`In my opinion, claims 4 and 12 are obvious over Murata in view of
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`Huot; claims 5 and 11 are obvious over Murata in view of Takahashi and Huot;
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`claims 10 and 35 are obvious over Murata in view of Takahashi; claim 23 is
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`obvious over Murata in view of Muramatsu.
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`III. THE ‘746 PATENT
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` The ‘746 patent generally relates to interface devices for transfer of 28.
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`data between a data device (a.k.a. “data transmit/receive device”) and a host (a.k.a.
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`“host computer” or “host device”). ‘746 Patent (Ex. 1101) at 1:20-24.
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`29.
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`(1.1) Tasler’s ‘746 patent presents “randomly chosen” exemplars (id.
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`at 1:63) in support of his statement that “Existing data acquisition systems for
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`computers are very limited in their areas of application.” Id. at 1:28-29. His first
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`example describes interface devices that “generally require very sophisticated
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`drivers which are prone to malfunction.” Id. at 1:37-38. No concrete examples are
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`offered in support his statement regarding “prone to malfunction.”
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`30.
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`(1.2) A second example presents a diagnostic radiology system that is
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`reporting a fault. A responding service technician with a laptop is characterized as
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`needing “fast data transfer and rapid data analysis.” Id. at 1:46-55. A third
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`example involves a multimeter as an input source, and a need “for the interface
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`device to support a high data transfer rate.” Id. at 1:56-62.
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`31.
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`(1.3) From these examples Tasler concludes that (1) “an interface
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`may be put to totally different uses;” (2) it should “be sufficiently flexible to
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`permit attachment of very different electrical or electronic systems to a host device
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`by means of the interface;” and (3) “a universal method of operating the interface
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`be provided for a large number of applications.” Id. at 1:63-2:5.
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`32.
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`(1.4) Tasler finds a disadvantage in interface devices that must be
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`installed inside a host computer: “such types of interface have the disadvantage
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`that they must be installed inside the computer casing to achieve maximum data
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`transfer rates.” Id. at 2:15-18.
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`33.
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`(1.5) Tasler discusses PCMCIA technology, which was extant at the
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`priority date of the patent. He states that PCMCIA is: “A solution to this problem”
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`regarding the need to install an interface device inside a computer’s casing—“The
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`interface devices are connected by means of a plug-in card, approximately the size
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`of a credit card, to the [PCMCIA] interface which is now a standard feature in
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`laptops.” Id. at 2:22-30. A PCMCIA’s interface to the host computer is via an
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`enhanced printer established standard (IEEE 1284). Tasler goes on to say about
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`the plug-in card using PCMCIA technology:
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`The known interface device generally consists of a driver
`component, a digital signal processor, a buffer and a hardware
`module which terminates in a connector to which the device whose
`data is to be acquired is attached. The driver component is attached
`directly to the enhanced printer interface thus permitting the known
`interface device to establish a connection between a computer and
`the device whose data is to be acquired.
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`Id. at 2:34-41.
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`34.
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`
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`(1.6) Tasler states “an interface-specific driver must be installed on
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`the host device . . . .” Id. at 2:42-45. Tasler goes on to state: “if the driver is a
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`general driver which is as flexible as possible and which can be used on many host
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`devices, compromises must be accepted with regard to the data transfer rate.” Id.
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`at 2:49-52. No substantiation is offered regarding the claimed compromises.
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`35.
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`(1.7) Tasler addresses the potential conflict for resources that may
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`occur among tasks, including those that support data acquisition. He states that
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`competing tasks may “result in a system crash.” Id. at 2:53-67. Tasler’s
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`discussion of competing tasks is not associated with any particular host, operating
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`system, driver technology or interface device technology.
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`36.
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`(1.8) Tasler discusses an interface device that connects to a bus. The
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`interface device can communicate with multiple peripheral devices. Control logic
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`in the interface device is implemented using finite states machines, one for each
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`peripheral. Tasler states: “This known interface device provides optimal matching
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`between a host device and a specific peripheral device.” Id. at 3:1-9.
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`37.
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`(1.9) Finally, Tasler discusses an interface device that communicates
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`with its host via its floppy drive interface, and permits attachment of a peripheral
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`device. Tasler notes there is “no information as to how communication should be
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`possible if the interface is connected to a multipurpose interface instead of to a
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`floppy disk drive controller.” Id. at 3:10-24.
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` The purported object of the ‘746 patent interface device is to “provide
`38.
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`an interface device . . . whose use is host device-independent and which delivers a
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`high data transfer rate.” Id. at 3:28-31. The interface device is meant to
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`“simulate[s], both in terms of hardware and software, the way in which a
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`conventional input/output device functions, preferably that of a hard disk.” Id. at
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`4:13-17.
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` The ‘746 patent describes an interface device capable of delivering the
`39.
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`output of a data transmit/receive device to a host computer while emulating a
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`customary i/o device. The interface device can be viewed as a multi-step device
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`that (1) receives data from an analog sensor, (2) stores digitized analog data in an
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`internal memory , and then (3) delivers the stored data to a host, presenting itself as
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`a customary device via a common multi-purpose interface, e.g. a hard drive via a
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`SCSI interface in the preferred embodiment. Id. at 3:49-55.
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` The ‘746 patent describes that the interface device contains a
`40.
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`processor, which may possibly be a digital signal processor (DSP), and a data
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`storage memory and a program memory from which the processor can retrieve
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`executable instructions. Upon receiving an SCSI INQUIRY from the host, the
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`interface device responds to the host, indicating that it is communicating with an
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`i/o device. Id. at 4:5-13. The interface device emulates a customary i/o device. Id.
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`at 4:13-17). Preferably the interface device emulates a hard disk that presents a file
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`system to the host. Id. at 5:11-14.
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` Communication between the interface device and the host computer
`41.
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`takes place through a multi-purpose interface using “specific driver software for
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`the multi-purpose interface” or “drivers integrated in the BIOS system of the host”,
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`or BIOS routines in parallel with the specific driver software.” Id. at 3:56-67. In
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`the ‘746 patent’s preferred embodiment, communications between the host device
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`and its multi-purpose interface are described as follows:
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` Communication between the host device and the multi-purpose
`42.
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`interface can take place not only via drivers for input/output device customary in a
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`host device which reside in the BIOS system of the host device but also via
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