Trials@uspto.gov
`571-272-7822
`
`
`
`
`
`Paper 6
`Entered: September 23, 2016
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`SAMSUNG ELECTRONICS CO., LTD.,
`Petitioner,
`
`v.
`
`DSS TECHNOLOGY MANAGEMENT, INC.,
`Patent Owner.
`____________
`
`Case IPR2016-00782
`Patent 6,784,552 B2
`
`
`
`Before BRYAN F. MOORE, BRIAN J. McNAMARA, and
`MINN CHUNG, Administrative Patent Judges.
`
`CHUNG, Administrative Patent Judge.
`
`
`
`
`DECISION
`Institution of Inter Partes Review
`37 C.F.R. § 42.108
`
`
`
`
`
`
`
`
`
`
`
`Case No. IPR2016-00782
`DSS.2002.001
`
`
`571-272-7822
`
`
`
`
`
`Paper 6
`Entered: September 23, 2016
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`SAMSUNG ELECTRONICS CO., LTD.,
`Petitioner,
`
`v.
`
`DSS TECHNOLOGY MANAGEMENT, INC.,
`Patent Owner.
`____________
`
`Case IPR2016-00782
`Patent 6,784,552 B2
`
`
`
`Before BRYAN F. MOORE, BRIAN J. McNAMARA, and
`MINN CHUNG, Administrative Patent Judges.
`
`CHUNG, Administrative Patent Judge.
`
`
`
`
`DECISION
`Institution of Inter Partes Review
`37 C.F.R. § 42.108
`
`
`
`
`
`
`
`
`
`
`
`Case No. IPR2016-00782
`DSS.2002.001
`
`
`
`IPR2016-00782
`Patent 6,784,552 B2
`
`
`
`I. INTRODUCTION
`
`Samsung Electronics Co., Ltd. (“Petitioner”) filed a Petition (Paper 1,
`
`“Pet.”) requesting an inter partes review of claims 1–12 (the “challenged
`
`claims”) of U.S. Patent No. 6,784,552 B2 (Ex. 1001, “the ’552 patent”).
`
`DSS Technology Management, Inc. (“Patent Owner”) did not file a
`
`Preliminary Response. We have jurisdiction under 35 U.S.C. § 314.
`
`The standard for instituting an inter partes review is set forth in
`
`35 U.S.C. § 314(a), which provides that an inter partes review may not be
`
`instituted “unless the Director determines . . . there is a reasonable likelihood
`
`that the petitioner would prevail with respect to at least 1 of the claims
`
`challenged in the petition.” For the reasons described below, we conclude
`
`Petitioner has established a reasonable likelihood of prevailing in showing
`
`the unpatentability of claims 1–12. Accordingly, we institute an inter partes
`
`review of claims 1–12 of the ’552 patent.
`
`A. Real Parties In Interest
`
`Petitioner identifies itself as the only real party-in-interest. Pet. 2.
`
`B. Related Proceedings
`
`According to Petitioner, the ’552 patent is the subject of the following
`
`patent infringement cases: DSS Tech. Mgmt., Inc. v. Samsung Elec. Co.,
`
`Ltd., Case No. 15-cv-690 (E.D. Tex.); DSS Tech. Mgmt., Inc. v. Intel, Corp.,
`
`Case No. 15-cv-130 (E.D. Tex.); DSS Tech. Mgmt., Inc. v. SK Hynix, Inc.,
`
`Case No. 15-cv-691 (E.D. Tex.); and DSS Tech. Mgmt., Inc. v. Qualcomm,
`
`Inc., Case No. 15-cv-692 (E.D. Tex.). Id.
`
`2
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`Case No. IPR2016-00782
`DSS.2002.002
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`IPR2016-00782
`Patent 6,784,552 B2
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`
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`C. The ’552 Patent
`
`The ’552 patent describes a process of semiconductor device
`
`fabrication and a structure of a semiconductor device having “substantially
`
`rectangular” lateral insulating spacers adjacent to gate electrodes. Ex. 1001,
`
`Abstract. The ’552 patent defines the term “substantially rectangular” to
`
`mean that “a side of the spacer has an angle relative to the substrate surface
`
`of more than 85°.” Id. at col. 8, ll. 40–42. Figure 4(D) of the ’552 patent is
`
`reproduced below.
`
`
`
`Figure 4(D) illustrates a cross-sectional view of a series of gates 415 (also
`
`called conducting layers or polysilicon layers) completely encapsulated in
`
`insulating material 420, e.g., TEOS (tetraethyl orthosilicate glass), where
`
`spacers 435 of the insulating material adjacent to the gates have substantially
`
`rectangular profiles. Id. at col. 9, ll. 9–13; col. 11, ll. 40–46. As shown in
`
`Figure 4(D), gates 415 are insulated from sources or drains 405 by insulating
`
`dielectric layers 410. See id. at col. 10, ll. 49–50. The ’552 patent describes
`
`a process of making high quality contacts to the sources or drains, such as
`
`“self-aligned” contacts, by etching structures over substrate 400 and sources
`
`or drains 405. Id. at col. 7, ll. 19–22; col. 8, ll. 4–6.
`
`3
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`Case No. IPR2016-00782
`DSS.2002.003
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`IPR2016-00782
`Patent 6,784,552 B2
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`Figure 4(I) of the ’552 patent is reproduced below.
`
`
`
`Figure 4(I) illustrates additional structures deposited and etched over the
`
`structure described in Figure 4(D), such as second dielectric layer 440
`
`(called etch stop layer), blanket layer 450, and photoresist mask layer 455.
`
`Id. at col. 9, ll. 33–39; col. 11, ll. 63–65; col. 12, ll. 34–42. According to the
`
`’552 patent, etch stop layer 440, e.g., silicon nitride layer 440, depicted in
`
`Figure 4(I) is distinct or different from the underlying TEOS insulating
`
`layer. Id. at col. 12, ll. 10–11. The etch stop layer protects the underlying
`
`TEOS layer when blanket layer 450 made of BPTEOS1 is etched away to
`
`create contact openings 460 and 465 above source or drain 445. See id. at
`
`col. 12, ll. 36–42; col. 4, ll. 41–59.
`
`A second etch is then performed to remove etch stop layer 440
`
`covering source or drain 445 in contact openings 460 and 465. Id. at col. 12,
`
`ll. 48–52; col. 7, ll. 43–45. The ’552 patent describes that the second etch is
`
`
`1 BPTEOS is an acronym for borophosphosilicate tetraethyl orthosilicate
`glass. See Ex. 1001, col. 11, ll. 6–7.
`
`4
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`Case No. IPR2016-00782
`DSS.2002.004
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`IPR2016-00782
`Patent 6,784,552 B2
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`
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`“almost completely anisotropic,” which means that the etchant etches in the
`
`vertical direction, or perpendicular relative to the substrate surface. Id. at
`
`col. 7, ll. 45–48; col. 12, ll. 55–58. Hence, the etch removes the etch stop
`
`material covering the area of the contact openings or contact regions 460 and
`
`465, but does not significantly etch the etch stop material adjacent to the
`
`spacer portions 435. Id. at col. 7, ll. 53–55; col. 12, ll. 58–61. Figures 4(J)
`
`and 4(K) of the ’552 patent are reproduced below.
`
`Figures 4(J) and 4(K) illustrate the structure of the semiconductor device of
`
`the ’552 patent after the second etch for removing the etch stop layer from
`
`the contact regions 460 and 465 is completed. As shown in Figures 4(J) and
`
`
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`5
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`Case No. IPR2016-00782
`DSS.2002.005
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`IPR2016-00782
`Patent 6,784,552 B2
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`4(K), due to the anisotropic or vertical nature of the second etch, only a
`
`small portion, i.e., portion 475, of the TEOS spacer portion 435 is removed
`
`during the etch. Id. at col. 13, ll. 6–9. Of primary significance, according to
`
`the ’552 patent, is that the spacer portion 435 of the TEOS insulating layer
`
`420 retains its substantially rectangular profile, in contrast to the
`
`conventional prior art method which transforms a substantially rectangular
`
`spacer into a sloped spacer. Id. at col. 13, ll. 9–10; col. 7, ll. 48–51; col. 5,
`
`ll. 4–14.
`
`D. Illustrative Claim
`
`Of the challenged claims, claims 1 and 8 are independent. Claims 2–7
`
`depend directly or indirectly from claim 1, and claims 9–12 depend directly
`
`or indirectly from claim 8. Claim 1 is illustrative of the challenged claims
`
`and is reproduced below with the key limitation (the “angle limitation”)
`
`emphasized in italics:
`
`1. A structure, comprising:
`
`(a) a conductive layer disposed over a substrate;
`
`(b) a first insulating layer on the conductive layer:
`
`(c) a contact region in said first insulating layer;
`
`(d) at least one insulating spacer in the contact region adjacent
`to the first insulating layer; and
`
`(e) an etch stop material over said first insulating layer and
`adjacent to the insulating spacer, the etch stop material being a
`different material from the insulating spacer,
`
`wherein a side of the insulating spacer has an angle relative to
`the substrate surface that is either a right angle or an acute
`angle of more than 85°.
`
`6
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`Case No. IPR2016-00782
`DSS.2002.006
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`IPR2016-00782
`Patent 6,784,552 B2
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`E. Asserted Grounds of Unpatentability
`
`Petitioner asserts the following grounds of unpatentability (Pet. 3–4):
`
`Claim(s) Challenged Statutory Basis
`
`Ground
`
`1, 2, 4–12
`
`§ 102(b)
`
`Anticipated by Kuesters2
`
`3
`
`§ 103(a)
`
`Obvious over Kuesters and
`Havemann3
`
`1, 2, 4–7
`
`§ 103(a)
`
`Obvious over Kuesters and Heath4
`
`3
`
`§ 103(a)
`
`Obvious over Kuesters, Heath, and
`Havemann
`
`
`
`II. CLAIM CONSTRUCTION
`
`The ’552 patent has expired. Pet. 13. Thus, we construe the claims in
`
`accordance with the standard set forth in Phillips v. AWH Corp., 415 F.3d
`
`1303 (Fed. Cir. 2005) (en banc). See In re Rambus, 694 F.3d 42, 46 (Fed.
`
`Cir. 2012) (“While claims are generally given their broadest possible scope
`
`during prosecution, the Board’s review of the claims of an expired patent is
`
`similar to that of a district court’s review.”). “In determining the meaning of
`
`the disputed claim limitation, we look principally to the intrinsic evidence of
`
`
`2 Kuesters et al., Self Aligned Bitline Contact For 4 Mbit dRAM,
`PROCEEDINGS OF THE FIRST INTERNATIONAL SYMPOSIUM ON ULTRA LARGE
`SCALE INTEGRATION SCIENCE AND TECHNOLOGY 640–49 (1987) (“Kuesters”)
`(Ex. 1005).
`
`3 U.S. Patent No. 5,482,894 (issued Jan. 9, 1996; filed Aug. 23, 1994)
`(“Havemann”) (Ex. 1006).
`
`4 U.S. Patent No. 4,686,000 (Aug. 11, 1987) (“Heath”) (Ex. 1007).
`
`7
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`Case No. IPR2016-00782
`DSS.2002.007
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`IPR2016-00782
`Patent 6,784,552 B2
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`record, examining the claim language itself, the written description, and the
`
`prosecution history, if in evidence.” DePuy Spine, Inc. v. Medtronic
`
`Sofamor Danek, Inc., 469 F.3d 1005, 1014 (Fed. Cir. 2006) (citing Phillips,
`
`415 F.3d at 1312–17). Only those terms which are in controversy need to be
`
`construed, and only to the extent necessary to resolve the controversy. Vivid
`
`Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999).
`
`“Contact Region” and “Contact Opening”
`
`Petitioner proposes we construe a pair of related claim terms, which
`
`are “contact region” and “contact opening” recited in claims 1 and 8,
`
`respectively. Pet. 13–14. Petitioner asserts that a person of ordinary skill in
`
`the art would have understood that the ordinary and customary meaning of
`
`“contact region” or “contact opening” is “contact opening or via” in the
`
`context of the ’552 patent because the ’552 patent expressly defines the
`
`terms as “contact openings and/or via[s].” Id. at 14 (citing Ex. 1001, col. 1,
`
`ll. 38–41). Petitioner further argues that Patent Owner has adopted the
`
`construction of “contact region” as “contact openings and/or vias” in the
`
`related district court litigation between Patent Owner and Intel Corporation.
`
`Id. at 14–15 (citing Ex. 1009).
`
`We agree with Petitioner that the ’552 patent explicitly defines the
`
`terms “contact region” or “contact opening” as “contact openings or via.”
`
`Ex. 1001, col. 1, ll. 38–41 (“For purposes of the claimed invention,
`
`henceforth ‘contact opening’ or ‘contact region’ will be used to refer to
`
`contact openings and/or via.”). Because the ’552 patent defines the terms
`
`explicitly and unambiguously, we need not further construe the terms
`
`8
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`Case No. IPR2016-00782
`DSS.2002.008
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`IPR2016-00782
`Patent 6,784,552 B2
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`“contact region” or “contact opening” for purposes of this Decision. “When
`
`the specification explains and defines a term used in the claims, without
`
`ambiguity or incompleteness, there is no need to search further for the
`
`meaning of the term.” Sinorgchem Co., Shandong v. Int’l Trade Comm’n,
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`511 F.3d 1132, 1138 (Fed. Cir. 2007) (quoting Multiform Desiccants, Inc. v.
`
`Medzam, Ltd., 133 F.3d 1473, 1478 (Fed. Cir. 1998)).
`
`III. ANALYSIS OF PETITIONER’S PRIOR ART CHALLENGES
`
`A. Kuesters As a Printed Publication
`
`Petitioner contends that Kuesters (Ex. 1005) is prior art to the ’552
`
`patent under 35 U.S.C. § 102(b) because it was available to the public at
`
`Stanford University Libraries no later than October 23, 1990.5 Pet. 3 (citing
`
`Ex. 1010). In support of its assertion, Petitioner submits a Declaration of
`
`Mariellen F. Calter (Ex. 1010), who is Associate University Librarian and
`
`Chief of Staff at the Stanford University Libraries located in Stanford,
`
`California. Pet. 3; Ex. 1010 ¶ 2.
`
`Whether a reference qualifies as a “printed publication” under § 102
`
`involves a case-by-case inquiry into the facts and circumstances surrounding
`
`the reference’s disclosure to members of the public. In re Klopfenstein, 380
`
`F.3d 1345, 1350 (Fed. Cir. 2004). The key inquiry is whether the reference
`
`was made “sufficiently accessible to the public interested in the art” before
`
`the critical date. In re Lister, 583 F.3d 1307, 1311 (Fed. Cir. 2009) (quoting
`
`
`5 As noted by Petitioner, the ’552 patent claims priority to a predecessor
`application filed on December 22, 1995. Pet. 5; Ex. 1001, 1 (Related U.S.
`Application Data).
`
`9
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`Case No. IPR2016-00782
`DSS.2002.009
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`IPR2016-00782
`Patent 6,784,552 B2
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`In re Cronyn, 890 F.2d 1158, 1160 (Fed. Cir. 1989)). A reference is
`
`considered “publicly accessible” upon a satisfactory showing that the
`
`document has been “disseminated or otherwise made available to the extent
`
`that persons interested and ordinarily skilled in the subject matter or art
`
`exercising reasonable diligence[] can locate it.” Kyocera Wireless Corp. v.
`
`ITC, 545 F.3d 1340, 1350 (Fed. Cir. 2008) (citation and internal quotation
`
`marks omitted). Often, the determination of public accessibility turns on
`
`whether a reference is indexed and catalogued in a meaningful way. For
`
`example, a dissertation shelved in the stacks and indexed in the catalog at a
`
`university library was found to be a printed publication. In re Hall, 781 F.2d
`
`897, 898–99 (Fed. Cir. 1986). However, indexing and cataloging must be
`
`prepared in a “meaningful” way, e.g., in relationship to the subject matter of
`
`the references, to allow an interested researcher exercising reasonable
`
`diligence to locate the prior art. See Cronyn, 890 F.2d at 1161.
`
`According to Ms. Calter, the Stanford University Libraries (“SUL”)
`
`maintains a catalog that is available to the public and searchable by subject,
`
`author, and keyword. Ex. 1010 ¶ 4. Ms. Calter states that the SUL catalog
`
`was searchable by subject, author, and keyword in 1987, although the
`
`interface to the catalog system has changed since then. Id. Ms. Calter
`
`testifies that she is familiar with the policies and procedures at SUL
`
`regarding the receipt, cataloging, and tracking of books at the library. Id.
`
`¶ 6. She testifies further that SUL creates catalog records for all materials it
`
`acquires for its collection in the normal course of business and that, in most
`
`cases, a catalog record is created at or near the time of acquisition. Id. ¶ 7.
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`According to Ms. Calter, SUL holds a copy of Proceedings of the
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`10
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`Case No. IPR2016-00782
`DSS.2002.010
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`IPR2016-00782
`Patent 6,784,552 B2
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`International Symposium on Ultra Large Scale Integration Science and
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`Technology, Volume 87-11, which includes the Kuesters reference, and the
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`SUL catalog indicates that a catalog record was created for the volume on
`
`November 6, 1987. Id. ¶¶ 5, 8. Ms. Calter also testifies that it has been
`
`common practice at SUL to stamp books that are borrowed with their return
`
`due dates and that the earliest stamp on the volume containing Kuesters
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`shows a return due date of October 23, 1990. Id. ¶ 10.
`
`On this record, we are persuaded, for purposes of this Decision, that
`
`Petitioner has demonstrated sufficiently that Kuesters was available to the
`
`public by October 23, 1990, and, therefore, constitutes prior art to the ’552
`
`patent under § 102(b).
`
`B. Anticipation By Kuesters
`
`Petitioner contends claims 1, 2, and 4–12 are unpatentable under
`
`35 U.S.C. § 102(b) as anticipated by Kuesters. Pet. 31–52. Petitioner
`
`provides detailed explanations and specific citations to Kuesters indicating
`
`where in the reference the claimed features are disclosed. Id. In addition,
`
`Petitioner relies upon the Declaration of Dr. Richard Fair (“Fair Decl.,”
`
`Ex. 1003) to support its position. Id.
`
`1. Principles of Law
`
`A claim is unpatentable under 35 U.S.C. § 102 only if a single prior
`
`art reference expressly or inherently describes each and every limitation set
`
`forth in the claim. See Perricone v. Medicis Pharm. Corp., 432 F.3d 1368,
`
`1375 (Fed. Cir. 2005); Verdegaal Bros., Inc. v. Union Oil Co., 814 F.2d 628,
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`631 (Fed. Cir. 1987). Further, a reference cannot anticipate “unless [it]
`
`11
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`Case No. IPR2016-00782
`DSS.2002.011
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`IPR2016-00782
`Patent 6,784,552 B2
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`discloses within the four corners of the document not only all of the
`
`limitations claimed[,] but also all of the limitations arranged or combined in
`
`the same way as recited in the claim.” Net MoneyIN, Inc. v. VeriSign, Inc.,
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`545 F.3d 1359, 1371 (Fed. Cir. 2008). Although the elements must be
`
`arranged in the same way as in the claim, “the reference need not satisfy an
`
`ipsissimis verbis test,” i.e., identity of terminology is not required. In re
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`Gleave, 560 F.3d 1331, 1334 (Fed. Cir. 2009); In re Bond, 910 F.2d 831,
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`832 (Fed. Cir. 1990). We analyze this asserted ground based on anticipation
`
`with the principles identified above in mind.
`
`2. Overview of Kuesters
`
`Kuesters describes a process of fabricating a 4 Mbit dRAM
`
`semiconductor device with a 25% reduction in cell size, “achieved by a self
`
`aligned bitline contact.” Ex. 1005, 3.6 Figure 2 of Kuesters is reproduced
`
`below.
`
`
`6 The page numbers for Exhibit 1005 refer to the page numbers inserted by
`Petitioner in the bottom, right-hand corner of each page.
`12
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`Case No. IPR2016-00782
`DSS.2002.012
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`IPR2016-00782
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`Figure 2 depicts the process of fabricating a 4 Mbit dRAM, as disclosed in
`
`Kuesters. Id. at 4. As shown in Figure 2-1 above, the process begins with
`
`the deposition of a polysilicon layer over a substrate to form a gate structure.
`
`Id. Then, an insulating oxide layer is deposited on the gate. Id. Next, an
`
`oxide spacer covering the sidewalls of the polysilicon/oxide layer is formed
`
`by oxide deposition and RIE etching. Id. According to Kuesters, “[a]
`
`vertical etch profile of [the polysilicon/oxide layer] . . . is essential” when
`
`forming the oxide sidewall spacers. Id.
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`13
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`Case No. IPR2016-00782
`DSS.2002.013
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`IPR2016-00782
`Patent 6,784,552 B2
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`As illustrated in Figure 2-2, a triple layer of “thin oxide/nitride/oxide”
`
`is then deposited over the entire structure. Id. After patterning a contact
`
`hole mask on top of the structure, the top oxide is etched to create a contact
`
`hole using the nitride as an etch stop. Id. Subsequently, the nitride etch stop
`
`and the remaining thin oxide are etched anisotropically, resulting in the
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`structure illustrated in Figure 2-3. Id. at 5. The contact area of the
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`fabricated self-aligned contact is “defined by gate and field oxide edges.”
`
`Id. Following the formation of the contact hole, the dRAM structure is
`
`completed by adding a bitline, which is accomplished by depositing
`
`conductive material (TaSi2 on top of polysilicon that is doped by As or P
`
`implantation) in the contact hole, as illustrated in Figure 2-4. Id. at 6.
`
`a. Claim 1
`
`3. Analysis
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`Petitioner contends that Kuesters discloses every limitation of claim 1.
`
`Pet. 31. Referencing Figures 2 and 4a, Petitioner provides detailed
`
`explanations and specific citations to Kuesters indicating where in the
`
`reference each limitation of claim 1 is disclosed. Id. at 31–40. For example,
`
`Petitioner asserts that the polysilicon gate layer formed over a substrate and
`
`the insulating oxide layer encapsulating the gate depicted in Figure 2
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`disclose “a conductive layer disposed over a substrate” and “a first insulating
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`layer on the conductive layer” recited in claim 1, respectively. Id. at 32–35
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`(citing Ex. 1005, 3, 4, Figures 2, 4a). Petitioner also contends that the
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`contact hole or contact area described in Kuesters discloses “a contact region
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`Case No. IPR2016-00782
`DSS.2002.014
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`IPR2016-00782
`Patent 6,784,552 B2
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`in said first insulating layer” recited in claim 1. Id. at 35–36 (citing
`
`Ex. 1005, 3, 4, 5, Figures 2, 4a).
`
`Petitioner provides annotated versions of Figures 2-3 and 4a shown
`
`below.
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`
`
`Annotated versions of Figures 2-3 and 4a in Petition
`
`Id. at 33. According to Petitioner and Dr. Fair, Figure 4a depicts a cross-
`
`section scanning electron microscope (“SEM”) image of the actual structure
`
`fabricated with an etch of the top oxide followed by an anisotropic etch
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`process to remove the nitride etch stop and the remaining thin oxide, as
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`described in Kuesters. Id. at 19–20; Ex. 1003 (“Fair Decl.”) ¶¶ 90, 91. A
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`similar structure at the same stage of fabrication is depicted in Figure 2-3.
`
`Pet. 19–20. For example, annotated Figures 2-3 and 4a above both show the
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`contact hole or contact area annotated in light blue. Id. at 36.
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`Case No. IPR2016-00782
`DSS.2002.015
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`IPR2016-00782
`Patent 6,784,552 B2
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`Petitioner asserts that the oxide sidewall spacers annotated in bright
`
`green in annotated Figures 2-3 and 4a disclose “at least one insulating spacer
`
`in the contact region adjacent to the first insulating layer,” as recited in claim
`
`1. Id. at 37–38 (citing Ex. 1005, 3, 4, Figures 2, 4a; Ex. 1003 ¶ 86).
`
`According to Petitioner, the oxide spacers are in the contact hole and
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`adjacent to the oxide insulating layer, as shown in annotated Figures 2-3 and
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`4a. Id.
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`Petitioner further contends that the nitride layer of Kuesters discloses
`
`“an etch stop material over said first insulating layer and adjacent to the
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`insulating spacer, the etch stop material being a different material from the
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`insulating spacer,” as recited in claim 1. Id. at 38–39. First, Petitioner
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`argues that the nitride layer of Kuesters—which is a different material from
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`the insulating spacers made of oxide—is an etch stop material. Id. (citing
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`Ex. 1005, 3 (the “nitride [layer] serves as an etch stop for top oxide etch”), 4
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`(“After patterning the contact hole mask the top oxide is etched using the
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`nitride as an etch stop.”). Petitioner also argues that annotated Figures 2-3
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`and 4a above show that the nitride layer, which is annotated in red, is over
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`the insulating oxide layer and adjacent to the oxide spacers. Id. at 39.
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`Citing the testimony of Dr. Fair, Petitioner contends that Figure 4a of
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`Kuesters discloses the angle limitation recited in claim 1, i.e., the limitation
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`reciting “a side of the insulating spacer has an angle relative to the substrate
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`surface that is either a right angle or an acute angle of more than 85°.” Id. at
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`39–40 (citing Ex. 1003 ¶ 96). Referring to the annotated version of Figure
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`4a reproduced above, Dr. Fair testifies that the black line on the insulating
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`spacers (annotated in bright green) denotes “the leading edge of the
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`DSS.2002.016
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`Patent 6,784,552 B2
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`insulating spacer at the front plane of the SEM image (i.e., the center of the
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`contact hole).” Ex. 1003 ¶ 93. Dr. Fair further testifies that the region also
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`annotated in bright green above the black line reflects “the sidewall spacer
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`receding into the page toward the back plane of the contact hole,” which is
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`an artifact of SEM imaging due to the fact that the incident angle of the
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`electron beam of the SEM to the surface of the sidewall spacer in this area is
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`not 90°. Id. Hence, according to Dr. Fair, for the actual fabricated structure
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`of Kuesters depicted in Figure 4a, the angle of a side of the insulating spacer
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`relative to the substrate surface can be measured where it contacts the pale
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`green of the substrate, i.e., where the black line meets the upper edge of the
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`horizontal substrate annotated in pale green. Id. ¶ 96. Petitioner provides a
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`further annotated version of Figure 4a, which is reproduced below.
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`Further annotated version of Figure 4a in Petition
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`Pet. 40. Dr. Fair testifies that he has measured the angle of a side of the
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`insulating spacer relative to the substrate surface in Kuesters, as illustrated in
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`further annotated Figure 4a shown above, and found the measured angle to
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`be “between 86° and 87°.” Ex. 1003 ¶ 96.
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`On this record, for the purposes of this Decision, we are satisfied that
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`Petitioner has cited sufficient disclosure from Kuesters to show that Kuesters
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`discloses all of the limitations of claim 1. Based on the foregoing
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`discussion, we are persuaded Petitioner has provided sufficient evidence that
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`establishes a reasonable likelihood of prevailing in its challenge to claim 1
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`under 35 U.S.C. § 102(b) as anticipated by Kuesters.
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`b. Claim 8
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`Independent claim 8 is similar to claim 1 but includes additional
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`limitations, such as “(a) a first electrically conductive material formed in
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`and/or on a surface of a substrate” and “(e) a blanket layer over the etch stop
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`material.” See Ex. 1001, col. 14, ll. 19–67. Both claims recite essentially
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`the same angle limitation. For similar limitations of claims 1 and 8,
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`Petitioner relies on the same or similar structures disclosed in Kuesters for
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`both claims. For example, for both “insulating spacer” recited in claim 1
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`and “electrically insulative spacer” recited in claim 8, Petitioner relies on the
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`oxide spacer described in Kuesters, including the oxide spacer annotated in
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`bright green in annotated Figures 2-3 and 4a. Pet. 37–38 (claim 1), 48
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`(claim 8). Similarly, for the angle limitations in claims 1 and 8, Petitioner
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`relies on the same disclosure in Kuesters, including the angle measured on
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`Figure 4a depicting an SEM image of the fabricated structure discussed
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`above with respect to claim 1. Id. at 39–40 (claim 1), 50–51 (claim 8).
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`For additional limitations recited in claim 8, Petitioner provides
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`detailed explanations and specific citations to Kuesters indicating where in
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`the reference each of the additional limitations of claim 8 is disclosed. Id. at
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`46–51. For example, Petitioner asserts that “n+ diffusion (source/drain of
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`transfer gates)” discussed in Kuesters discloses limitation (a), i.e., “a first
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`electrically conductive material formed in and/or on a surface of a
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`substrate,” recited in claim 8. Id. at 46–47 (citing Ex. 1005, 4; Figs. 2, 4a).
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`For limitation (e) of claim 8 reciting “a blanket layer over the etch stop
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`material,” Petitioner contends that the top oxide layer of the triple
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`oxide/nitride/oxide stack described in Kuesters (annotated in orange in
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`annotated Figures 2-3 and 4a reproduced above in Claim 1 section) discloses
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`the limitation. Id. at 43–44 (citing Ex. 1005, 3, 4; Figs. 2, 4a). On this
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`record, for the purposes of this Decision, we are satisfied that Petitioner has
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`cited sufficient disclosure from Kuesters to show Kuesters discloses all of
`
`the limitations of claim 8.
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`Based on the foregoing discussion, we are persuaded Petitioner has
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`provided sufficient evidence that establishes a reasonable likelihood of
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`prevailing in its challenge to claim 8 under 35 U.S.C. § 102(b) as anticipated
`
`by Kuesters.
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`c. Dependent Claims 2, 4–7, and 9–12
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`Claims 2 and 4–7 depend from claim 1, and claims 9–12 depend from
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`claim 8. Regarding these dependent claims, Petitioner provides detailed
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`explanations and specific citations to Kuesters indicating where in the
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`reference the additionally recited limitations of the dependent claims are
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`disclosed. Pet. 40–45, 51–52.
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`Claim 2 depends from claim 1 and further recites “said etch stop
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`material comprises silicon nitride.” Petitioner argues that the nitride etch
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`stop layer of Kuesters discussed above comprises silicon nitride. Id. at 40–
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`41 (citing Ex. 1005, 3, 4, 5). Regarding claims 6 and 11, which depend from
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`claims 1 and 8, respectively, and recite “further comprising a second
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`insulating layer on the etch stop layer and over the conductive layer,”
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`Petitioner asserts that the top oxide layer of the triple oxide/nitride/oxide
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`stack shown in Figures 2-3 and 4a discloses the additionally recited
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`limitations. Id. at 43–44 (citing Ex. 1005, 3, 4), 52. On this record, we are
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`persuaded that Kuesters discloses the limitations recited in claims 2, 6, and
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`11.
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`Claim 4 depends from claim 1 and further recites “the insulating
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`spacer has a surface portion in the contact region without overlying etch stop
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`material.” Claim 5 depends from claim 4 and additionally recites “the
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`insulating spacer surface portion without overlying etch stop material
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`comprises an insulating spacer surface portion most distant from said
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`substrate.” Claims 9 and 10, which depend from claim 8, recite additional
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`limitations similar to claims 4 and 5, respectively, with claims 9 and 10
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`reciting “electrically insulative spacer” instead of “insulating spacer” recited
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`in claims 4 and 5. Petitioner points to the structures depicted in Figures 2-3
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`and 4a of Kuesters and asserts that Kuesters discloses these additionally
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`recited limitations, providing description of the relevant structures and
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`explanations in support of its argument. Id. at 41–43 (citing Ex. 1005,
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`Figs. 2-3, 4a), 51–52. Upon reviewing Figure 2-3 and the structures or
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`geometries evidently shown in the figure, we are persuaded that Kuesters
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`discloses the limitations recited in claims 4, 5, 9, and 10.
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`Claims 7 and 12 depend from claims 6 and 11, respectively, and
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`additionally recite “further comprising a second conductive material in the
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`contact region.” Petitioner contends that Kuesters discloses the additionally
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`recited limitations of claims 7 and 12 because Kuesters describes a “contact
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`between polycide (TaSi) bitline” and the diffusion region of the substrate
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`(id. at 44–45 (citing Ex. 1005, 3)) and “a low resistivity polycide (poly
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`Si/TaSi2) layer,” which is “used for bitlines and local peripheral
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`interconnects” (id. at 45 (citing Ex. 1005, 4)). We are persuaded by
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`Petitioner’s argument because a polysilicon/ TaSi2 layer used to connect the
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`bitline to the source/drain region in the structure disclosed in Kuesters would
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`constitute a second conductive material in the contact region, distinct from
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`the polysilicon gate layer of Kuesters, i.e., the conductive layer or material
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`recited in claims 1 and 8 (id. at 32–34, 47–48).
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`On this record, for the purposes of this Decision, we are satisfied that
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`Petitioner has cited sufficient disclosure from Kuesters to show Kuesters
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`discloses all of the limitations of claims 2, 4–7, and 9–12. Based on the
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`foregoing discussion, we are persuaded Petitioner has provided sufficient
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`evidence that establishes a reasonable likelihood of prevailing in its
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`challenge to claims 2, 4–7, and 9–12 under 35 U.S.C. § 102(b) as anticipated
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`by Kuesters.
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`C. Obviousness Based on the Combination of Kuesters and Havemann
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`Claim 3 depends from claim 1 and further recites “said etch stop
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`material comprises silicon dioxide.” Petitioner contends claim 3 is
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`unpatentable under 35 U.S.C. § 103(a) over the combination of Kuesters and
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`Havemann (Ex. 1006). Pet. 52–54. Petitioner acknowledges Kuesters does
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`not disclose explicitly that the etch stop material comprises silicon dioxide.
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`Id. at 53. To satisfy this limitation, Petitioner contends Havemann teaches
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`that a thermally grown silicon dioxide can be used for the etch stop material.
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`Id. (citing Ex. 1006, col. 5, ll. 16–21; col. 6, ll. 31–33). Petitioner also
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`asserts that Havemann teaches the insulating cap and sidewall spacers may
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`comprise CVD oxide, silicon nitride, or silicon oxynitride, which are
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`different materials from silicon dioxide. Id. (citing Ex. 1006, col. 5, ll. 9–15;
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`col. 6, ll. 14–19).
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`Relying upon the testimony of Dr. Fair, Petitioner contends that a
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`person of ordinary skill in the art would have been motivated to combine
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`Kuesters and Havemann because the references are in the same field and use
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`similar methods to create similar structures and to solve the same problem.
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`Id. at 27–28 (citing Ex. 1003 ¶¶ 113–116). Petitioner also contends that it
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`would have been obvious to one skilled in the art to make the simple
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`substitution of the silicon dioxide etch stop and silicon oxynitride spacer
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`materials disclosed in Havemann for the nitride etch stop and oxide
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`insulating space
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