`
`329
`
`256 QAM Modem for Multicarrier 400 Mbit/S
`Digital Radio
`
`YASUHISA NAKAMURA, YOICHI SAITO, MEMBER,
`
`IEEE, AND SATORU AIKAWA
`
`Abstrucr—This paper describes the performance of a 256 QAM mo-
`dem with doll Mbit / s transmission capacity. A variety of novel tech-
`niques are introduced as ways to achieve good performance. Key tech-
`niques include 1) an accurate 256 QAM modulator employing a new
`monolithic multiplier IC. 2) a carrier recovery circuit which satisfies
`such requirements: good phase jitter performance and no false lock
`phenomenon. 3] it highly stable high-level decision circuit. and 4) a
`forward error correcting code. As an overall modern performance, BER
`characteristics and signatures are presented. The equivalent CNR deg-
`radations of 1 dB (at BER of III") and 2 dB {at BER of 10") are
`obtained using a single Lee-error correcting code and a seven-tap
`baseband transversnl equalizer. The residual bit errors are decreased
`below the order of 10"". The performance of a 256 QAM multicarrier
`modem has given prospect for the development of 40!) Mbit/s digital
`microwave radio system.
`
`I.
`
`INTRODUCTION
`
`NE of the most important criteria in the design of
`digital radio systems is the transmission capacity per
`RF bandwidth,
`i.c., bits/second/Hertz. High-level
`modulation schemes for increasing spectrum utilization ef-
`ficiency are now a major subject in the development of.
`digital microwave radio. In recent years, several digital
`radio systems with 16 QAM, and even with as high as 64
`QAM modulation have been developed and are in opera-
`tion in the microwave frequency band [l]—[4]. The trend
`to increase spectrum utilization efiiciency may continue
`[5]-
`As the modulation level increases, the system becomes
`more sensitive to multipath induced waveform distortion
`and interference noise. It was already demonstrated [8]
`that the multicarrier transmission method is effective for
`
`high-level modulation schemes in a multipath environ-
`ment. On the basis of the above considerations, this paper
`describes 21 25,6 QAM multicarrier modem for the 400
`Mbit/5 digital microwave radio (DM-400M) system [6].
`[7]-
`First, the performance of a newly developed monolithic
`multiplier IC for 256 QAM modulation and demodulation
`is described. Next, two principal techniques employed in
`a demodulator are stated. One is “a carrier recovery PLL
`with control mode selection function" which satisfies such
`
`requirements as good phase jitter performance and no false
`lock phenomenon. Another is "automatic gain and deci-
`
`Manuscript received September 15. I986: revised December 12. 1986.
`The authors on: with NTT Electrical Communication Laboratories, Nip-
`pon Telegraph and Telephone Corporation, Kanngawa, 238-03 Japan.
`IEEE Log Number 3613242.
`
`sion threshold control (AGTC) circuits." Due to these
`circuits. an excellent 256 QAM BER performance can be
`obtained. Forward error correction (FEC) is one of the
`key techniques for high-level modulation systems, be-
`cause it eliminates residual bit errors. A single Lce—error
`correcting code with low redundancy is employed.
`Finally, the 256 QAM BER pcrfonnance, and signature
`with and without adjacent channel interference are pre-
`sented. The equivalent CNR degradations of 1 dB at BER
`of 10” and of 2 dB at BER of 10”’ are obtained. The
`residual bit errors are decreased below the order of 10" ‘°.
`
`II. GENERAL Duscnrrrrrou
`
`A. Outline of 256 QAM Four-Carrier Modem
`
`For the realization of a digital radio system having a
`transmission capacity of 400 Mbits/s within 80 MHz
`bandwidth,
`at 256 QAM modulation using the Nyquist
`spectral shaping (or = 0.5) is required. This enables the
`frequency utilization efficiency of 10 bits I s / Hz when the
`orthogonal dual polarization is employed.
`In a high-level modulation system such as 64 QAM or
`256 QAM, the multipath fading causes large degradation
`of BER performance. A multicarrier system is considered
`to be a promising method for high—lc-vel signal transmis-
`sion in a fading channel. From the 256 QAM transmission
`characteristics estimation. a four-carrier system with 12.5
`MBaud data rate and rolloff factor of 0.5 was found nec-
`
`essary to achieve 400 Mbits / s [8]. In this situation, the
`frequency spacing between adjacent carriers is 20 MHZ
`and the radio channel is composed of four modems. The
`modem block-diagram and major system parameters are
`shown in Fig. l and Table I.
`The transmitting terminal equipment converts 400
`Mbit/ 5 data into 32 rails of 12.5 MBaud binary signals.
`These. 32 binary bit streams are fed to the four modulator
`circuitry. In each modulator, eight binary streams are dif-
`ferentially encoded (quadrant symmetry encoding) and re-
`dundant bits for error correcting are added by an FEC
`coder circuit. Thcsc streams are converted by DIA con-
`vorters to form in-phase and quadrature 16 level signals.
`Each 16 level signal modulates a local oscillator. The 256
`QAM signals with cosine rollolf spectrum shaping (or -—
`0.5) are then combined by a hybrid circuit and supplied
`to the transmitter. The 256 QAM four-carrier spectrum is
`shown in Fig. 2.
`At a demodulator, the 256 QAM four-carrier signals are
`
`0733-8716/87!040U-O329$0l.00 © 1987 IEEE
`
`1
`
`*1
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`titioner ARRIS — ARRIS 1019
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`1
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`1
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`Petitioner Samsung - SAM1019
`
`
`
`33‘3
`
`IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS. VOL. sac-5. N0. 3. APRIL 198'!
`
`
`
`
`Dernodulator
`
`Fig. 1. Block diagram of 256 QAM four-carrier modem.
`
`TABLE 1
`Man: PARAMETERS or 256 QAM 400 Mbit f s Mutncmiruss Monro
`
`
`
`[ii with orthogonal do-s1 polarisation
`
`distributed by a hybrid circuit and coherently detected to
`produce two orthogonal 16 level baseband signals. The
`seven-tap baseband transversal equalizers are employed
`to equalize both in-phase and quadrature waveform dis-
`tortions. In order to improve pull-in performance, ZF
`(zero forcing) with MLE (maximum level error) algo~
`rithrn is employed [6]. Demodulated 16 level signals are
`regenerated by AID converters to produce eight rails of
`12.5 MBaL|d binary signals. Error correction is then car-
`ried out in the FEC decoder circuit.
`
`l20MH2
`
`V : l0dB/div.
`H i 10MHz/div.
`"IF BW I IUOKHZ
`
`Video BW I 300Hz
`
`Fig. 2, Founcarrler spectrum.
`
`B. Key Techr.-r'que.r for an Accurate 256 QAM Modem
`In order to realize an accurate 256 QAM modem, the
`following novel techniques are applied.
`1) monolithic multiplier IC for the modulator and the
`phase detector.
`' 2) high-level decision circuit with automatic gain and
`decision threshold control (AGTC circuit).
`3) carrier recovery with control mode selection func-
`tion.
`4) forward error correction (FEC) technique.
`
`III. ClRCUlT DESCRIPTION
`
`A. Modulation Section
`
`The degradation factors arising at various parts in a mo-
`dern. such as wavefomi distortion. phase error, carrierjit-
`ter. etc. , were categorized and the etfects of these factors
`on 256 QAM equivalent CNR degradation were presented
`
`in [5]. Concerning the modulation section, it was revealed
`that the allowable maximum modulation phase error is
`i0.5° to satisfy the requirement for an equivalent CNR
`degradation of 0.5 dB at a BER of 10*‘ for 256 QAM.
`Therefore, a new monolithic multiplier IC capable of
`reducing the modulation phase and amplitude errors has
`been developed for the 256 QAM [9]. The main perfor-
`mance of the multiplier itself is presented in Table II. The
`new IC has a baseband input voltage linearity of more
`than 1.5 V and modulation phase error is less than 0.2”,
`which are extremely superior to the conventional ring
`modulators and to multiplier IC developed for a lo QAM
`system. Third—order intcnnodulation products (IM3) of
`more than 55 dB at the average output power level is ob-
`tained. These performances are achieved with the aid of
`the latest device technology: SST (super self—aligned pro-
`cess technology) [10]. The modulation phase error ob-
`
`
`
`2
`
`2
`
`
`
`NAKAMURA at HJ'.: 256 QAM MODEM FOR MULTICARRIER 400 Mbll/8 DIGITAL RADIO
`
`331
`
`20!]
`
`
`
`I:
`
`Ln1::
`MinibarofSignalPoints 3
`
`New Accurate
`
`0.5"
`u
`"Li 7—.a
`[deal
`Phase Ir:-er
`tdevtlepod for IEQRM
`
`1
`
`Fig. 3. Modulation phase error distributions comparing new monolithic IC
`and conventional modulator.
`
`
`
`Fig. 4. 256 QAM signal constellation.
`
`TABLE I1
`MCINDLITHIC MULTIPLIER IC Pnnronwmcs
`
`lam than Olzdegree
`modulation amplitude error
`less than fl.2d_B
`.
`.
`amplitude deviation between
`fioquncy aha-mflgnsuts
`ICIDMH: and 180MB: is |1.dd.B
`more than 1.5V
`laaneband input. l.i.nea.ri Ly voltage
`Ihl3I'Ll1iI‘|i1)1'd8.l‘Il1bB?‘I'l1DdI.l1ni-inn more than 5563
`products)
`urli are the output. back-otfis ran
`
`bechnolofli
`
`Mm_,_m pm”
`
`M (Super Self-aligned prmeu
`
`'
`
`tained from the new monolithic multiplier IC and conven-
`tional one developed for a 16 QAM system are measured.
`Fig. 3 shows the number of signal points versus modu-
`lation phase error comparing the two multiplier IC’s. The
`number of signal points of the quadrature multiplier with
`phase error of less than 10.5“ are 238 by using the new
`monolithic lC’s. The measured maximum phase error of
`less than 11° has been obtained.
`
`It is concluded from experimental results that the newly
`developed monolithic multiplier IC almost satisfies the re-
`quirements for 256 QAM modulator. Fig. 4 shows the
`measured 256 QAM signal space diagram.
`
`8. Demodulorion Section
`
`1) Carrier Recovery with Control Mode Selection
`Function .' A variety of carrier tracking loops for the QAM
`signal have been proposed [11], [12]. One of the most
`effective methods for 16 QAM carrier recovery was a se-
`lective gated phase locked loop (PLL), which uses only
`the error signal derived from the same phases of a 4—PSK
`signal. The recovered carrierjiner of more than 35 dB for
`a 16 QAM signal was obtained by this method [1 1]. How-
`
`I
`0.3
`u.s
`
`gnu
`v.2
`u
`-0.2
`o
`
`CNR =50dE|
`
`in 15 202530 3510 45
`s
`Phase error Eden.)
`
`Fig. 5. Phase comparator characteristic.
`
`ever, the required carrier jitter for 256 QAM is more than
`45 dB when the equivalent CNR degradation of 0.3 dB is
`pennitted. Therefore,
`it is necessary to design a earner
`recovery circuit which satisfies such requirements: a) good
`phase jitter performance and b) no false lock phenome-
`non.
`
`The received 256 QAM signal is demodulated into 16-
`level baseband signals at in-phase and quadrature chan-
`nels. The regenerated first.-bit signal sets (al, by). which
`are the most significant bit (MSB) of AD converters, and
`the fifth-bit signal sets (at, 255), which are error polarity
`signals, are multiplied and is used as the VCO control
`signal. The phase control voltage I/(B) is obtained as fol-
`lows.
`
`=d|55 _£]&5.
`
`The reduction of a PLL noise bandwidth and the im-
`
`provement of VCO phase jitter are necessary to obtain a
`recovered carrier jitter of more than 45 dB. The carrier
`jitter of more than 45 dB has been achieved by designing
`RF local oscillator frequency stability of the order of 10'
`and employing a voltage controlled crystal oscillator
`(VCXO) in the demodulator. In spite of a good carrier
`jitter performance,
`it has been clarified from the phase
`comparator characteristic that the carrier recovery circuit
`has a false-lock point in the same frequency when input
`CNR is sufficiently high [5].
`The selective gating of VCXO control signal during the
`course of an acquisition is effective in order to prevent the
`false-lock phenomenon.
`After looking into a normal phase, the operation of se-
`lecting the control signal
`is inhibited. The switching is
`performed by monitoring the intersymbol
`interference
`which is easily estimated from the multiplication of the
`fifth and the sixth bits of All) converter. This technique
`simultaneously enables the improvement of pull-in and
`carrier jitter performance.
`The phase comparator characteristic in a selective gat- _
`ing mode is obtained as follows.
`Let Dsi be the probability that the signal point i is in—_
`volved in a selective area. Dsi is shown as
`
`Dsi = Ssmufi P:'(x, y) cixdy
`
`(2)
`
`where, Pi(x, y) is a Gaussian pdf
`
`£1’ = 1 -- 256).
`
`
`
`3
`
`3
`
`
`
`332
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`IEEE JOURNAL on SELECTED AREAS IN cosmunrcartons. VOL. sac-5. no. 3. amt I937
`
`P:'(ic. y) = Pi(x) - Pam
`I
`(x - sax)’
`-—
`211-0 exp [
`202
`
`exp
`
`(y - Sty)’
`202
`
`g
`Sir = in-phase component of signal pointi
`Sty = quadrature component of signal point i
`02 = white Gaussian noise power
`26 = minimum distance between signal points.
`
`(3)
`
`The average CNR (carrier to noise ratio) of 256 QAM
`can be obtained as
`
`CNR = 35 52/6 = kg.
`
`(4)
`
`In (2), Rs means the positive area producing correct
`control voltage “+l" and E3 means the negative area
`producing error control voltage “ -1." When the signal
`point i is involved in a selective area, the phase control
`voltage Vt'(B) is shown as
`
`V,(8) = Sfim Pi(x, y) :11: dy
`
`—
`
`P':'(.I. y) dx dy.
`
`(5)
`
`When the signal point 1' is involved in a nonselective
`area, the phase control voltage Vi(6) is put into “hold"
`condition by a sample and hold circuit. Then, the follow-
`ing equations are introduced.
`
`Pe(o) = 2%? {me} on + Pe(6) (1 - Dst')}/256
`
`:°€(3) = phase comparator characteristic.
`
`(6)
`
`From (6), Peta) can be written as
`156
`
`256
`
`Pe(8) = E V(B)Dsi
`i=1
`
`E3 Dsi.
`[=1
`
`(7)
`
`The phase comparator characteristic in a selective gat-
`ing mode is shown in Fig. 5. -The number of error signals
`used in the selective gating in Fig. 5 is 96 out of 256.
`Note that the loop exhibits no false lock point. The re-
`covered carrier spectrum is shown in Fig. 6. The mea-
`sured_ carrier jitter was 45.5 dB and the pull-in frequency
`range of more than 8 kHz was obtained.
`2) High-Level Decision Circuit with Automatic Gain
`and Decision Threshold Contra! (AGTC): In order to
`achieve a good BER perfonnance, an automatic gain and
`decision threshold control (AGTC) circuit is employed
`[14]. It uses the first and fifth bits of AID converter as the
`feedback signals for the amplitude variation and dc drift
`of demodulated signals. These degradations are mainly
`caused by a local leak of the modulator, AGC level vari-
`ation and temperature characteristic of amplifiers. The"
`feedback signals are fed to the dc amplifier which is lo-
`cated before the AID converter. Fig. 7 shows the circuit
`configuration.
`
`
`
`110MHz
`
`V : l0dB/div.
`
`l0KHz/div.
`H :
`u= BWI II-(Hz
`
`Video BW I 100Hz
`
`Fig. 5. Recovered canier spectrum.
`
`
`
`
`Eaulvait-ntrmdegradation(am
`
`Fig. iv‘. Feedback circuit configuration.
`
`‘ESE: DAM
`
`lnout
`
`level vorlotlon toBl
`
`Fig. B. Equivalent C /N degradation due to input level variation.
`
`Let therinput signal to the AID converter be u(t) and
`applying Laplacian "s" to utt), in do drift compensation
`feedback loop [5]:
`um = I/(.9) + E(s)/(1 + as am).
`When F(s) is supposed to he a perfect integrator.
`
`(8)
`
`17(3) = Kn/.9.
`
`(9)
`
`then,
`
`U(:) = I/(3) + 3 + K: . Kd s(.-.~).
`
`(10)
`
`In amplitude variation compensation feedback loop (see
`Appendix),
`
`4
`
`4
`
`4
`
`
`
`NAKAMURA er al_: 256 QAM MODEM FDR MLTLTICARRIER -I-{IO Mbit/s DIGITAL RADIO
`
`333
`
`U(s) = V(s) + A(s)/mlfg Fla")
`
`(ll)
`
`therefore, (ll)becomes
`
`U(s) = ms) + mm‘ K Am.
`
`(12)
`
`where
`
`Vts) = 256 QAM demodulated signal
`E(s') = dc drift
`Ats) = amplitude variation
`F(s) = low-pass filter transmitting function
`Kd. Kg = the linearized gain constants of the loop
`I?! = gain constant of a dc amplifier.
`
`The mathematical model of the feedback system indi-
`cated in (9), (10) has shown that it has a high—pass fre-
`quency characteristic for both amplitude variation and dc
`drift. The high-pass frequency characteristic of the feed-
`back loops enables suppression of low frequency com-
`ponents of these degradations. Fig. 8 shows one experi-
`ment example of the input level variation compensation.
`This figure gives equivalent CNR degradation versus in-
`put level variation at BER of 10'“ for 256 QAM. Even a
`small level variation causes a large degradation in case of
`no control, while the CNR degradation is suppressed
`within 0.3 dB for the input level variation of ii dB by
`employing the amplitude control.
`A fifth bit of the AD converter is used as the feedback
`
`signal for the dc drift compensation, and an exclusive-or
`output of a first and fifth bits is used for amplitude vari-
`ation compensation. However it is revealed that, in both
`cases. if the dc drift or amplitude variation exceeds a half
`of the minimum distance between signal points. the com-
`pensated signal is locked to the incorrect voltage. Once
`the situations occur, burst bit errors are continually pro-
`duced. This phenomenon is called "false-lock" and the
`calculation of the control voltage characteristics also prove
`its existerices [5]. The dc leveliamplitude monitor circuits
`and gate circuits shown in Fig. 7 are used to slip out from
`this "false-lock" situation. It is effective to change the
`feedback signals. For example, the first and fifth bits of
`the A.-‘D converter are exchanged for the dc drift compen-
`sation and the exclusive—or output of the first and second
`bits is selected for the amplitude variation compensation
`once the “false-lock" occurs.
`
`C. Forward Error Correction (FEC)
`
`An application of FEC codes to high-level modulation
`systems greatly improves BER performance, particularly
`useful for the elimination of residual bit errors. Gener-
`
`ally, in high-level modulation schemes, the symbol error
`probability between the adjacent symbols is much larger
`than that between the separate symbols. Therefore,
`it is
`effective to select an FEC code which can mainly correct
`the error propagations to adjacent symbols. The represen-
`tative one is Lee-error correcting code [15]. The theoret-
`ical symbol error rate (SER) improvement due to the sin-
`
` c-——o zwltt-taut FEC
`
`I ---o : vi-th
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`Modern hack to hack
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`in
`
`3:
`
`Fig. 9. 256 QAM BER performance.
`
`gle Lee-error correcting code (72, 70) is shown as
`
`Pa _= 107 - P3
`
`Pa = SER after FEC
`
`P = SER before FEC.
`
`(13)
`
`The rate overhead of this code is only about 3 percent.
`The differential decoding is performed after error correc-
`tion.
`
`IV. OVERALL PERFORMANCE
`
`The 256 QAM signal has 16 baseband levels. The
`baseband signal is obtained by DIA converters as
`
`Sl=23-a,+22-rr3+2'a3+a4
`
`S2=23-b.+22-b2+2-b3+b.,.
`
`- (or. b.,) are binary codes and
`-
`-
`Signal sets (c,-. 12,),
`categorized as “Path 1” to “Path 4" indicating the first
`to fourth bit. The BER of 256 QAM is obtained as the
`average of the BER’s'of each path. Considering a quad-
`rant symrnetry differential encoding, the average BER of
`256 QAM becomes
`
`Pa = 19/64 erfc(5/J5 or)
`
`= 19/64 cm-.(k[,/Jfi)
`
`(14)
`
`25
`0,2
`
`minimum distance between signal points,
`white Gaussian noise power.
`
`The 256 QAM BER's for Path 4 (modern back to back)
`are shown in Fig. 9. The single Lee-error correcting code
`and a seven-tap baseband transversal equalizer are imple-
`mented in this system. The equivalent CNR degradation
`of 1 as (at a BER of 10*‘) and 2 dB (at a BER of HF”)
`are obtained. The measu_red_ coding gain by the FEC at a
`BER of 10-‘ is about 2.5 as. The residual bit errors have
`been reduced below the order of 1 X 10“°. The de-
`modulated eye pattern is presented in Fig. 10.
`The overall filter system should be designed to mini-
`mize intersymbol and interchannel (adjacent carrier) in-
`
`
`
`5
`
`5
`
`
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`334
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`IEEE JOURNAL ON sELEc'rED AREAS IN COMMUNICATIONS. vo:,, s,\(_-.5, no 3.
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`,\pa11_, 193::
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`95
`
`BER =13 10"
`r=|l}ns
`
`withotrt. adjacent
`"carrier interference
`' with adjacent
`’cnrriarlntnrferar1t:o
`
`I
`
`ID
`
`is
`
`W i5
`5
`-15 -ill "5 U
`Relative rtotch location {Mt-lei
`1' "delay diflarenee between direct and
`interlering revs
`
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`
`iij
`-1!
`-—n_
`1;».1;j
`1.
`j
`-j.
`1.
`L.
`-1
`
`25 an
`‘-'
`5 25
`E
`I" 2“
`
`Fig. I2. Equipment signatures for 256 QAM.
`
`Multicarricr branch filter B( f) is designed as the five
`stage Butterworth filter with 3 dB bandwidth normalized
`by clock frequency, HT, of 1.6.
`The BPF output spectrum and demodulated spectrum of
`256 QAM signals are shown in Fig. ll. The measured
`13/ U of the adjacent carrier interference at BPF output
`under normal conditions is 18 dB. The 256 QAM signal
`is coherently detected. and then rolloff filtered by the re-
`ceiving low-pass filter shown in (16). The measured D/U
`at the decision circuit input under normal conditions is
`54.9 dB, which satisfies almost the design criteria, 55 dB.
`To clarify the effect of adjacent carrier interference, the
`equipment signatures at BER of 10“ are measured using
`a two-ray fading simulator with 10 ns delay difference.
`Fig. 12 shows the measured results. The transversal
`equalizer is a seven-tap baseband type with MLE (maxi-
`mum level error) algorithm [6]. [7]. As shown in this fig-
`ure, there is a small difference between two signatures
`with and without the adjacent carrier interference.
`
`V. CONCLUSION
`
`This paper has presented the 256 QAM multicarrier
`modern configuration and several hardware techniques.
`New techniques presented here have become powerful
`tools to improve the modem performance. Particularly, 1)
`an accurate 256 QAM modulator employing the newly de-
`veloped monolithic multiplier IC, 2) the carrier recovery
`circuit with control mode selection, 3) high-level decision
`circuit and 4) FEC coding, have described in detail.
`Moreover,
`the BER characteristic and signatures have
`been presented as an overall modem p_erfon'nance. The
`equivalent CNR degradation of 1 dB (at a BER of 10"‘)
`and 2 dB (at a BER of 10'”) have been obtained by the
`FEC and seven-tap baseband transversal equalizer. The
`residual bit errors have been reduced below the order of
`10"". The comparison between two signatures with and
`without adjacent carrier interference has indicated that the
`degradation due to this interference is negligible.
`
`Aspen not
`
`In Fig. 7, the AID converter input signal Mr) is written
`
`as
`
`u(r) = a(t) - r:(t)
`
`(17)
`
`HI IOMHZ/div, v : l0dB/div
`
`lF BW : 300kHz
`
`Video BW I 300!-lz
`
`lass;-= :-
`
`I
`
`H : 2MHz/div, v: l0dB/div
`
`IF aw: |00kHz
`
`Video BW 1 l00Hz
`Fig. 1!. Spectnim characteristics. (a) BPF output spectrurtt. tb) Demod—
`ulated spectrum.
`
`terferences. From these requirements, overall spectrum
`shaping of the system is designed to be Nyquist‘s cosine
`rollofT{o: = 0.5).
`The transmitting and receiving filters are designed as
`
`H1(f}= x/Roll(f)/3(f)
`
`H2ffl = ~*R0“(fl/BU)
`
`(15)
`
`(15)
`
`where
`
`Roll {f} = Rolloff filter transfer function
`Stf)
`NR2 amplitude spectrum
`Multicarrier branch filter transfer function.
`Bff)
`
`
`
`6
`
`6
`
`
`
`NAKAMURA at a.!.: ‘256 QAM MODEM FOR MULTICARRIER -100 Mbit/s DIGITAL RADIO
`
`335
`
`Japanese)
`[10] T. Sakai at al., "Gigabit logic bipolar technology: Advanced super
`self-aligned process technology." Electron. Lett., vol. 19. pp. 233-
`284, Apr. I983.
`[ll] 1. I-loriltawa er el., “Design and performance of a ZOOM!) ,r’ s 16 QAM
`digital radio system," JEEE Trans. Con-tman.. vol. COM~2'J, pp.
`1953-1953. Dec. 1979.
`_[l2] A. Leclert er al., "Universal carrier recovery loop for QASK and
`PSK signal sets,” JEEE Trans. Comrnun.. vol. COM-31. pp. I30-
`l36, Jan. I983.
`[13] M. Maine at at, "Characteristic of 16 QAM carrier recovery phase
`locked loop with control mode selection function," Trans. JECE Ja-
`pan, vol. J68-B, no. 3, pp. 337-394, I935 {in Japanese)
`[14] "Y. Nakamura et nl., “Characteristics of multi-level decision circuit
`with automatic threshold control for 256 QAM digital radio system,"
`Paper Tech. Group, TGCS B4-T2. IECE Japan, 1984 {in Japanese)
`[15] K. Nakamura. “A class of error conecting codes for DPSK chan-
`nels." in Proc. Int. Conf. Commun.. I979, pp. 45.4-.l—4S.4.5.
`
`Yasuhisa Nakamura was bom in Yokohama, Ja-
`pan, on December 3, 1956. He received the B3.
`degree in applied physics from Tokyo University,
`Tokyo. Japan. in 1930.
`He joined the NTT Electrical Communications
`Laboratories, Nippon Telegraph and Telephone
`Corporation. Tokyo, Japan, in 1930. From I980
`to 1933, he was engaged in research concerning
`modulation techniques on subscriber digital radio.
`Since 1983 he has been working on development
`of 256 QAM modem.
`Mr. Nalcamura is a member of the Institute of Electronics and Com-
`munications Engineers of Japan.
`
`
`
`Yolchi Salto (M'8Z) was born in Chiba, Japan,
`on February 1‘, 1949. He received the 3.5. degree
`in electrophysics engineering from Tokyo Insti-
`tute of Technology, Tokyo, Japan, in 1972.
`Since joining the NTT Electrical Communica-
`tions Laboratories, Nippon Telegraph and Tele-
`phone Corporation, Tokyo, in 1972, he has been
`engaged in research and development on I6 and
`256 QAM modern and transversal equalization for
`digital microwave radio system.
`Mr. Saito is a member of the Institute of Elec-
`tronics and Communications Engineers of Japan.
`
`Saturn Aikawa was born in Tokyo, Japan, on
`January ll. 1962. He reccivccltlle B-.S. degree in
`electrical engineering from Yokohama National
`University in 1984.
`Since joining the NT!‘ Electrical Communica-
`tions Laboratories, Nippon Telegraph and Tele-
`phone Corporation. Tokyo, Japan,
`i984, he has
`been engaged in research and development on 256
`QAM modern.
`Mr. Ail-zawa is a member of the institute of
`Electronics and Communications Engineers of
`Japan.
`
`where
`
`C00) =f(f} * sun 1730) ' I750)
`em = um ~ om 6
`
`= [a(r) — 1] - u(:)’
`
`(13)
`
`(19)
`
`fir) = low-pass filter impulse response
`II = convolution.
`
`From (18) and (19),
`Ca(t)=f(!)*Ssn{|?’i(rJ' [am -1] mm}.
`(20)
`
`Nonlinear function; sgn ( ), followed by a low—pass fil-
`ter can be linearized as follows.
`
`Ca(t) e Kg -f(r) - [a(t) — 1] - :20).
`
`(21)
`
`By applying Laplacian “s” to (17) and (21),
`
`U(s) = A(s} - V(s)
`
`01(3) = Ks ' F(s) ' [AM - 1] ' V(s)-
`
`Therefore,
`
`up) = I’/(s) +
`
`Ca(.r)
`
`when the dc amplifier operates linearly,
`
`A(.r) = m - 02(5)
`m = gain constant.
`
`From (24) and (25), (11) can be derived.
`
`ACKNOWLEDGMENT
`
`(22)
`
`(23)
`
`(24)
`
`(25)
`
`The authors wish to express their appreciation to Dr.
`M. Shinji, Dr. K. Kohiyama, and Dr. 0. Kurita for their
`fruitful advice and suggestions. Dr. S. Komaki, Mr. T.
`Murase, and Mr. N. Imai provided many ideas and sug-
`gestions throughout the course of this study.
`
`REFERENCES
`
`[1] Y. Sailo er al., "SL-D1 digital radio system," in Proc. Int. Conf.
`CorrtIrrurt., 1982. pp. 2B.1.l-2B.l.7.
`[2] P. Dupuia eral.. "16 QAM modulation for high capacity digital radio
`system,“ JEEE Trans. C.‘ommtm.. vol. COM—2‘Jr‘. pp. 1171-1782. Dec.
`l9'i9.
`
`[3] T. Noguchi at m'., “GGHZ 135 MBPS digital radio system with 64
`QAM modulation." in Proc. Int. Canf. Cornmun.. 1983, pp. F2,4,1-
`F2.4.6.
`[4] J . D. Moll-licol er al., "Design and application of the RD-4A and RD-
`6A 64QAM digital radio systems," in Proc. Int. Canfi Carrm'mn.,
`1984. pp. 646-652.
`[5] Y. Saito er al., "256 QAM modem for high capacity digital radio
`1
`.
`s};-gm," JEEE Trans. Cornrnu.-1., vol. CDM—34. pp. 799-805, Aug.
`[61 —-—. "40t]Mb / s 256 QAM digital microwave radio system perfor-
`mance" in Prac. Int. Can)’. Conrmun.. 1986. pp. 456-465.
`['4'] H. lchilrawa er el.. “Z56 QAM mull‘:-carrier 4DOMb/ a microwave
`radio system field tests,“ in Proc. Int. Corgi Commun., 1987, to be
`published.
`_
`[S] Y. Saito et al., “Feasibility considerations of high-level QAM multi-
`carrier system," in Prac. Irrr. Con)’. Camrnun.. 1934. pp. 665-671.
`[9] N. Imaj er L. "Design of monolithic multiplier IC for 256 QAM
`system." Paper Tech. Group, TGCS 85-27, IECE Japan. 1985 [in
`
`_
`
`
`
`7
`
`7