A mere six years of microprocessor evolution have yielded a
`three-orders-of-magnitude performance improvement.
`
`Intel Microprocessors -
`8008to8086
`
`Stephen P. Morse,* Bruce W. Rav~ncl,* Stanley Mazor, and W!lliam B. Pohlman
`lntel Corporation
`
`Intel introduced its first microprocessor in November
`1971 with the advertisement, "Announcing a New Era in
`Integrated Electronics." The fulfillment of this prophecy
`has already occurred with the delivery of the 8008 in 1972,
`the 8080 in 1974, the 8085 in 1976, and the 8086 in 1978.
`During this time, throughput has improved one-hundred(cid:173)
`fold, the price of a CPU chip has declined from $300 to
`$3, and microcomputers have revqlutionized design
`concepts in countless applications. They are now entering
`our homes and cars.
`Each successive product implementation depended on
`fabrication innovations, improved architecture, better
`circuit design, and more sophisticated softwan:, and
`throughout this development, upward compatibility not
`envisioned by the first designers was maintained. Here,
`we will try to provide an insight into the evolutionary
`process that transformed the 8008 into the 8086 and give
`descriptions of the various processors, emphasizing the
`8086.
`
`Historical setting. In the late 1960's it became clear that
`the practical use of LSI circuits depended on defining
`chips having
`·
`• a high gate-to-pin ratio,
`• a regular cell structure, and
`• a large standard part market.
`In 1968, Intel Corporation was founded to exploit the
`semiconductor memory market, which uniquely fulfilled
`these criteria. Early semiconductor RAM&, ROMs, and
`shift registers were welcomed wherever small memories
`were needed, especially in calculators and CRT terminals.
`
`*Curre:m1y wit~ Language Resources~ S'!nnyvale, California.
`
`In 1969, Intel engineers began to study ways of integrating
`and partitioning the control logic functions of these
`systems into LSI chips.
`At this time, other companies (notably Texas lnstn.l(cid:173)
`ments) were exploring ways to reduce the time needed to
`develop custom integrated circuits. Computer-aided
`<:lesign of custom ICs was a hot issue then. Custom ICs are
`making a comeback today, this time, in the high-volume
`applications that typify the low end of the microprocessor
`market.
`An alternate approach was to think of a customer's
`application as a computer system requiring a control
`program, 110 monitoring, and arithmetic routines,
`rather than as a collection of special-purpose logic chips.
`Drawing on its strength jn memory, Intel partitioned
`systems into RAM, ROM, an<:! single controller chips,
`i.e., CPUs.
`Intel embarked on the design of two customer(cid:173)
`sponsored microprocessors-the 4004 for a calculator
`and the 8008 for a CRT terminal. The 4004 replaced what
`otherwise would have been six customized chips usable by
`only one customer. Because the first microcomputer ap(cid:173)
`plications were known' and easy to understand, instruc(cid:173)
`tion sets and architectures were defined in a matter of
`weeks. As programmable computers, their uses could be
`extended indefinitely.
`Both microprocessors were complete CPUs on a chip
`and had similar characteristics. But because the 4004 was
`designed for serial BCD arithmetic and the 8008 for 8-bit
`character handling, their instruction sets differed.
`The succeeding years saw the evolution that eventually
`led to the 8086. Table 1 summarizes the progression of
`features that took place during these years.
`
`42
`
`0018·9162/80/1000-0042$00.75 © i980 IEEE
`
`COMPUTER
`
`APPLE EX. 1025
`Page 1
`
`

`
`The 8008
`
`Late in 1969, Computer Terminal Corporation (today
`called Datapoint) contracted Intel to do a pushdown
`stack chip for a processor to be used in a CRT terminal.
`Datapoint had intended to build a bit-serial processor in
`TTL logic, using shift register memory. Intel counter(cid:173)
`proposed that the entire processor be implemented on one
`chi),'. This processor was to become the 8008 and, along
`with the 4004, was to be fabricated using PMOS, the then(cid:173)
`current memory fabrication technology; Due to the long
`lead time required by lntel, Datapoint proceeded to
`market the serial processor, and thus compatibility con(cid:173)
`straints were imposed on the 8008.
`Most of the instruction set and register organization
`were specified by Datapoint. Intel modified the instruc(cid:173)
`tion set so the processor would fit on one chip and added
`instructions to make it more general-purpose. For
`although Intel was developing the 8008 for a specific
`customer, they wanted to have the option of selling it to
`others. And since Intel was using only 16- and 18-pin
`packages in those days, they chqse to use 18 pins for the
`8008 rather tha.n design a new package for what was
`believed to be a low-volume chip.
`
`8008 instruction set processor. The 8008 processor ar(cid:173)
`chitecture is quite simple compared to that of today's
`microprocessors. The data hanqling facilities provide for
`byte data only. The memory space is limited to 16K bytes,
`and the stack is on the chip a11d limited to a depth of eight.
`The instruction set is small but symmetrical, with only a
`few operand addressing modes available. An interrupt
`mechanism is provided, but there is no way to disable in(cid:173)
`terrupts.
`
`Memory and 1/0 structure. The 8008 addressable
`memory space consists of 16K bytes. That seemed like a
`lot back in 1970 when memories were expensive and LSI
`deviCes were slow. It was inconceivable in those days that
`anybody would want to put more than 16K of this pre(cid:173)
`cious resource on anything as slow as a microprocessor.
`The memory size limitation was imposed by the lack of
`available pins. Addresses are sent out in two consecutive
`clock cycles over an · 8-bit address bus. Two control
`signals, which would have been on dedicated pins if such
`were available, are sent out with every address instead,
`thereby limiting addresses to 14 bits.
`·
`The 8008 supports eight 8-bit input ports and 24 8-bit
`output ports. Each port is directly addressable by the in-
`
`Table 1.
`Feature comparisol'!-lntel microprocessors, 1972-1978.
`
`8008
`1972
`
`66
`
`4
`
`8080
`1974
`
`111
`
`5
`
`8085
`1976
`
`113
`
`8086
`1978
`
`133
`
`9
`
`16K BYTES
`
`64K BYTES
`
`64K BYTES
`
`1M BYTES
`
`8 INPUT
`24 OUTPUT
`
`2561NPUT
`256 OUTPUT
`
`256 INPUT
`256 OUTPUT
`
`64KINPUT
`64K OUTPUT
`
`16
`
`8*
`
`8*
`
`40
`
`16
`
`8
`
`40
`
`16
`
`8
`
`40
`
`20*
`
`16*
`
`INTRODUCTION
`DATE
`
`NUMBER OF
`INSTRUCTIONS
`
`NUMBER OF
`FLAGS
`
`MAXIMUM
`MEMORY SIZE
`
`1/0 PORTS
`
`NUMBER OF
`PINS
`
`ADDRESS BUS
`WIDTH
`
`DATA BUS
`WIDTH
`
`DATA TYPES
`
`8-BIT UNSIGNED
`
`ADDRESSING
`MODES
`
`REGISTER
`IMMEDIATE**
`
`8-BIT UNSIGN~D
`16-BIT UNSIGNED
`(LIMITED)
`
`PACKED BCD
`{LIMITED)
`
`MEMORY DIRECT
`(LIMITED)
`MEMORY INDIRECT
`(LIMITED)
`REGISTER
`IMMEDIATE**
`
`8-BIT UNSIGNED
`16-BIT UNSIGNED
`(LIMITED)
`
`PACKED BCD
`(LIMITED)
`
`8-BIT UNSIGNED
`8-BIT SIGNED
`16-BIT UNSIGNED
`16'BIT SIGNED
`PACKED BCD
`UNPACKED BCD
`
`MEMORY DIRECT
`(LIMITED)
`MEMORY INDIRECT
`(LIMITED)
`REGISTER
`I M M EIJIATE* *
`
`MEMORY DIRECT
`MEMORY INDIRECT
`REGISTER
`IMMEDIATE
`INDEXING
`
`•ADDRESS AND DATA BUS MULTIPLEXED.
`••MEMORY CAN BE ADDRESSED AS A SPECIAL CASE BY USING REGISTER M.
`
`October 1980
`
`43
`
`APPLE EX. 1025
`Page 2
`
`

`
`struction set. The chip's designers felt that output ports
`were more important than input ports because input ports
`can always be multiplexed by external hardware under
`control of additional output ports.
`One of the interesting things about that era was that,
`for the first time, users were given access to the memory
`bus and could define their own memory structure; they
`were not confined to what the vendors offered, as they
`had been with minicomputers. The user had the option,
`for example, of putting 1/0 ports inside the memory ad(cid:173)
`dress space instead of in a separate 1/0 space.
`
`Register structure. The 8008 processor contains two
`register files and four 1-bit flags. The register files are the
`scratchpad and the address stack.
`Scratchpad. The scratchpad file contains an 8-bit ac(cid:173)
`cumulator called A and six additional8-bit registers called
`B,C,D,E,H, and L. All arithmetic operations use the ac(cid:173)
`cumulator as one of the operands and store the result back
`in the accumulator. All seven registers can be used inter(cid:173)
`changeably for on-chip temporary storage.
`There is one pseudoregister, M, which can be used in(cid:173)
`terchangeably with the scratchpad registers. M is, in ef-
`
`net effect on parity). The new setting of the PARI(cid:173)
`TY flag will be the complement of this bit (flag
`denotes even parity) and therefore will take on the
`original value of the PARITY flag.
`• Whenever the ZERO flag is 1, the SIGN flag must
`be 0 (zero is a positive 2's-complement number)
`and the PARITY flag must be 1 (zero has even
`parity). Thus, an original ZERO flag value of 1 will
`C().use all bits of FLAGS, with the possible excep(cid:173)
`flon of bit 7, to be 0. After the execution of the
`ADD instruction, all bits of the result will be 0 and
`the new value of the ZERO flag will therefore be 1.
`• An original ZERO flag value of 0 will cause two
`bits in FLAGS to be 1 and will wind up in the result
`as well. The new value of the ZERO flag will
`therefore be 0.
`
`The above algorithm relies on consistent flag
`values; i.e., the SIGN flag cannot be a 1 when the ZERO ·
`flag is a 1. This is always true in the 8008, since the
`flags come up in a consistent state whenever the pro(cid:173)
`cessor is reset and since flags can be modified only by
`instructions which always leave the flags in a consis(cid:173)
`tent state. The 8080 and its derivatives allow the pro(cid:173)
`grammer to arbitrarily modify the flags by popping a
`value of his choice off the stack and into the flags.
`Thus, the above algorithm will not work on those pro(cid:173)
`cessors.
`
`Saving and restoring flags in the 8008
`
`Interrupt routines must leave all processor flags and registers
`unaltered so as not to contaminate the processing that was inter·
`rupted. This is most simply done by having the interrupt routine
`save all flags and registers on entry and restore them prior to ex·
`iting. The 8008, unlike its successors, has no instruction for directly
`saving or restoring flags. Thus, 8008 interrupt routines that alter
`flags (practically every routine does) must conditionally test each
`flag to obtain its value and must then save that value. Since there
`are no instructions for directly setting or clearing flags, the flag
`values must be restored by executing code that will put the flags in
`ttw saved state.
`The 8008 flags can be restored very efficiently if they are saved in
`a bytE! in memory in the following format:
`
`765432
`
`0
`
`c s s ololzlziF>
`
`most significant bit = bit 7 = original value of CARRY
`bit 6 = original value of SIGN
`bit 5 = original value of SIGN
`bit4 = 0
`bit 3 = 0
`bit 2 = complement of original value of ZERO
`bit 1 = complement of original value of ZERO
`bii 0 = complement of original value of PARITY
`
`With the formatted information saved in a byte called FLAGS, the
`following two instructions will restore all the saved flag values:
`
`LOA FLAGS
`ADDA
`
`; load saved flags into accumulator
`; add the accumulator to itself
`
`This instruction sequence loads the saved flags into the ac·
`. cumulator and then doubles the value, thereby moving each bit one
`position to the left. This causes each flag to be set to its original
`value for the following reasons:
`
`• The original value of the CARRY flag, in the leftmost bit, will be
`moved out of the accumulator and wind up in the CARRY flag.
`• The original value of the SIGN flag, in bit 6, will wind up in bit 7
`and will become the sign of the result. The new value of the
`SIGN flag will reflect this sign.
`• The complement of the original value of the PARITY flag will
`wind up in bit 1, and it alone will determine the parity of the
`result (all other bits in the result are paired up and have no
`
`A code sequence for saving the flags in the required
`format is as .follows:
`MVI A,O
`; move zero in accumulator
`JNC L1
`; jump if CARRY not set
`ORA SOH
`; OR accumulator with SOH hex
`(set bit?)
`; jump if ZERO set (and SIGN
`not set and PARITY set)
`; OR accumulator with 03 hex
`(set bits 1 and 2)
`; jump if negative (SIGN set)
`OR accumulator with 60 hex
`(set bits 5 and 6)
`jump if parity even (PARITY set)
`OR accumulator with 01 hex
`(set bit 0)
`store accumulator in FLAGS
`
`L 1: JZ
`
`L3
`
`ORA 06H
`
`L2
`JM
`ORA 60H
`
`L2: JPE L3
`ORA 01H
`
`L3: STA FLAGS
`
`44
`
`COMPUTER
`
`APPLE EX. 1025
`Page 3
`
`

`
`feet, that particular byte in memory whose address is cur(cid:173)
`rently contained in H and L (L contains the eight low(cid:173)
`order bits of the address and H contains the six high-order
`bits). Thus, M is a byte in memory and not a register;
`although instructions address Mas if it were a register, ac(cid:173)
`cesses to M actually involve memory references. The M
`register is the only mechanism by which data in memory
`can be accessed.
`Address stack. The address stack contains a 3-bit stack
`pointer and eight 14-bit address registers providing
`storage for eight addresses. The programmer cannot
`directly access these registers; instead, he manipulates
`them with control-transfer instructions.
`Any one of the eight address registers in the address
`stack can serve as the program counter; the current pro(cid:173)
`gram counter is specified by the stack pointer. The other
`seven address registers permit storage for nesting of
`subroutines up to seven levels deep. The execution of a
`call instruction causes the next address register to become
`the current program counter, and the return instruction
`causes the address register that last served as the program
`counter to again become the program counter. The stack
`will wrap around if subroutines are nested more than
`seven levels deep.
`Flags. The four flags in the 8008 are CARRY, ZERO,
`SIGN, and PARITY. They reflect the status of the latest
`arithmetic or logical operation. Any flag can be used to
`alter program flow through the use of the conditional
`jump, call, or return instructions. There is no direct
`mechanism for saving or restoring flags, which places a
`severe burden on interrupt processing (see box at left for
`details).
`The CARRY flag indicates if a carry-out or borrow-in
`was generated, thereby providing a multiple-precision
`binary arithmetic capability.
`The ZERO flag indicates whether or not the result is
`zero. This provides the ability to compare two values for
`equality.
`The SIGN flag reflects the setting of the leftmost bit of
`the result. The presence of this flag creates the illusion
`that the 8008 is able to handle signed numbers. However,
`there is no facility for detecting signed overflow on addi(cid:173)
`tions and subtractions. Furthermore, comparing signed
`numbers by subtracting them and then testing the SIGN
`flag will not give the correct result if the subtraction
`resulted iil signed overflow. This oversight was not cor(cid:173)
`rected until the 8086.
`The PARITY flag indicates whether the result is of even
`or odd parity. This permits testing for transmission er(cid:173)
`rors, an obviously useful function for a CRT terminal.
`
`Instruction set. The 8008 instructions are designed for
`moving or modifying 8-bit operands. Operands are con(cid:173)
`tained in the instruction itself (immediate operand), in a
`scratchpad register (register operand), or in theM register
`(memory operand). Since theM registers can be used in(cid:173)
`terchangeably with the scratchpad registers, there are on(cid:173)
`ly two distinct operand addressing modes-immediate
`and register. Typical instruction formats for these modes
`are shown in Figure 1.
`The instruction set consists of scratchpad-register in-
`structions, accumulator-specific instructions, transfer-
`
`of-control instructions, input/output instructions, and
`processor-control instructions.
`The scratchpad-register instructions modify the con(cid:173)
`tents of theM register or any scratch pad register. This can
`
`NO OPERANDS
`
`OPCODE
`
`ONE OPERAND
`
`OPCODE I REG I OPERAND IN REGISTER
`I OPC I REG I OPCOO I OPERAND IN REGISTER
`I OPC I RP I OPCODE I OPERAND IN REGISTER PAIR (80800NLY)
`I OPC I RP I OPCODE 'INDIRECT ADDRESSING(80800NLY)
`I IMMEDIATE OPERAND
`II
`II
`II
`
`OPCODE
`
`DATA
`
`OPCODE
`
`ADDR·LO
`
`ADDR·HI
`
`DIRECT
`
`I ADDRESSING
`
`(8080
`ONLY)
`
`TWO OPERANDS
`
`I oPel REG I REG I BOTH OPERANDS IN REGISTER
`I I I
`I I
`I ONE OPERAND IN REGISTER.
`IOPC I RP I ~PCODE I I
`I I DATA-HI
`I PAIR, OTHER
`
`OPC REG
`
`OPG
`
`L __ D_A_TA __ ..J OTHER IS IMMEDIATE OPERAND
`ONE OPERAND
`,---------, IN REGISTER
`
`.
`
`.
`
`.
`
`DATA·LO
`'-· - - - - - - '
`
`.
`
`IS IMMEDIATE
`OPERAND
`(8080 ONLY)
`
`INPUT /OUTPUT
`
`loPe I PORT I D I (80080NLY)
`II
`
`OPCODE
`
`PORT
`
`I (80800NLY)
`
`JUMPS AND CALLS
`
`OPCODE
`
`OPCODE
`
`8008
`OOO:A
`001 B
`010 G
`011 :D
`100:E
`101 :H
`110:L
`111:M
`
`REG
`
`ADDR·LO Ill ADDR·HI I (80080NLY!
`II
`I (80800NLY)
`I I AODR·HI
`I I ADDR·LO
`
`REG
`
`8080
`000:8
`001:C
`010:D
`011 :E
`100:H
`101 :L
`110:M
`111:A
`
`8080
`
`OO:BC
`01 :DE
`10:HL
`11 :SP
`
`RP
`
`Figure 1. Typical8008 and 8080 instruction formats.
`
`October 1980
`
`45
`
`APPLE EX. 1025
`Page 4
`
`

`
`involve moving data between any two registers, moving
`immediate data into a register, or incrementing or
`decrementing the contents of a register. The incrementing
`and decrementing instructions were not in Datapoint's
`specified instruction set; they were added by Intel to pro(cid:173)
`vide for loop control, thereby making the processor more
`general-purpose.
`Most of the accumulator-specific instructions perform
`operations involving the accumulator and a specified
`operand. The operand can be any one of the scratch pad
`registers, including M, or it can be immediate data. The
`operations are add, add-with-carry, subtract, subtract(cid:173)
`with-borrow, logical ANI:), logical OR, logical exclusive(cid:173)
`OR, and compare. Furthermore, there are four unit(cid:173)
`rotate instructions that operate on the accumulator.
`These instructions perform either ah 8- or 9-bit rotate (the
`CARRY flag acts as a ninth bit) in either the left or right
`direction.
`Transfer-of-control instructions consist of jumps,
`calls, and returns. Any transfer can be unconditional, or
`conditional based on the setting of any one of the four
`flags. Making calls and returns conditional was done only
`to preserve the symmetrY with jumps. A short one-byte
`
`Jl.n m:be )Seginning . ..
`
`Jln the beginning Intel created the 4004 and ttie 8008. Arid these
`processors were without enough memory and throughput. And In·
`tel said, "Let there be an 8080," and there was an 8080 and Intel saw
`that it was good. And Intel separated the 8008 market from the 8080
`market.
`~nd Intel said, "Let there be an 8085 with an oscillator on the
`sa:me chip as the proce:;;sor, and let an on,chip system controller
`separate. the data from the control. lines. And Intel made a firma·
`ment ahd divided the added instructions which were under the fir·
`rhament from the added instructions which were·above the firma·
`ment. And Intel called the first set of instructions RIM and SIM.
`And the other instructions Intel never announced.
`~ntl Intel said, "Let the market below the 8085 market be served
`with a processor and let on-chip ROM appear." And Intel called the
`new processor the 8048. And the market it served Intel called the
`low end. And Intel saw that it was good.
`~nd Intel said, "Let a hew-generation processor serve the mid·
`range market. .Arid let there be true 16·bit facilities in the mid-range.
`Alld let there be one megabyte of memory and efficient interrupt·
`ible byte-string instructions and full decimal arithmetic." And in tel
`saw the collection of all these things, that it was good, and Intel
`called it the 8086.
`~nd Intel said, "Now let.u:;; make a processor in our image, after
`our likeness, and let it have dominion over the high-end market."
`So Intel created the APX 432 in his own image, in the image of Intel
`created he it, data processor and 1/0 processor created he them.
`And Intel blessed them and said uhto them. be fruitfui and
`multiprocess and revolutionize the microprocessor market and
`have dominion over the Z8000 and the M68000 and over every com·
`petitor that enters the market.
`~nd Intel saw everything that he had made and, behold, it was
`good.
`
`-S.P. Morse
`
`form of call-which will be discussed with interrupts-is
`also provided.
`.
`Each jump and call instruction (with the exception of
`the one-byte call) specifies an absolute code address in the
`second and third byte of the instruction. The. second byte
`contains the six high•order bits of the address and the
`third byte the eight low-order bits. This inverted storage,
`which was to haunt all processors evolved from the 8008,
`was a result of a need for compatibility with the Datapoint
`bit-serial processor, which processes addresses from low
`bit to high biL This inverted storage did have a virtue in
`those early days when 256 x 8 memory chips were popular:
`It allowed all memory chips to select a byte and latch it for
`output while waiting for the six high-order bits which
`selected the chip. This speeded up memory access.
`There are eight input and 24 output instructions using
`up 32 opcodes. Each 1/0 instruction transfers a byte of
`data between the accumulator and a designated 110 port.
`The processor-control instructions are halt and no-op.
`Halt puts the processor into a waiting state. The processor
`remains in that state until an interrupt occurs. No-op is
`actually one of the move instructions; specifically, it
`moves the contents of the accumulator into the ac(cid:173)
`cumulator, thereby having no net effect (move instruc(cid:173)
`tions do not alter flag settings).
`
`Interrupts. Interrupt processing was not a requirement
`for the 8008. Hence, only the most primitive mechanism
`conceivable-not incrementing the program counter(cid:173)
`was provided. Such a mechanism permits an interrupting
`device to jam an instruction into the processor's instruc(cid:173)
`tion stream. This is accomplished by having the interrupt(cid:173)
`ing device, instead of memory, respond to the instruction
`fetch; since the program counter isn't incremented, the
`instruction in memory that didn't get fetched won't be
`skipped. The instruction typically supplied by the inter(cid:173)
`rupting device is a call, so that an interrupt service routine
`can be entered and then the main program can be resumed
`after interrupt processing is complete (a jump instruction
`would result in the loss of the main program return ad(cid:173)
`dress). To simplify the interrupting device's task of
`generating an instruction, the 8008 instruction set pro(cid:173)
`vides eight one-byte subroutine calls, each to a fixed loca(cid:173)
`tion in memory.
`There are no instructions for disabling the interrupt
`mechanism; thus, this function must be realized whh ex(cid:173)
`ternal hardware. More important, there are no instruc(cid:173)
`tions for conveniently saving the registers and flags when
`an interrupt occurs.
`
`The soso
`
`By 1973, memory fabrication technology had ad(cid:173)
`vanced from PMOS to NMOS. As an engineering exer(cid:173)
`cise, Intel decided to use the 8008 layout masks with the
`NMOS process to obtain a faster 8008. After a short
`study, the company determined that a new layout was re(cid:173)
`quired. It therefore decided to enhance the processor at
`the same time aild to utilize the new 40-pin package made
`practical by high-volume calculator chips. The resuit was
`the 8080 processor.
`
`46
`
`COMPUTER
`
`APPLE EX. 1025
`Page 5
`
`

`
`of inveited storage aiready noted in the: transfer instruc(cid:173)
`tions of the 8008.
`The 8080exterids the 32·port capacity of the 8008 to'256
`input ports and 256 output ports. Here, the 8080 is actual(cid:173)
`ly more s:Yminetrical than the. 8008. Like the 8008, the
`8080 instructioh set can directly address aU the ports.
`
`Register structilre. The 8080 processor contains a file of
`seven 8-bit general registers, a .16-bit program counter
`(PC) and stack pointer (SP), and five !-bit flags. A com(cid:173)
`parison between the 8008 and 8080 register sets is shown in
`Figure2.
`General registers.. The 8080 registers are the same seven
`8-bit registers that were in the 8008 scratchpad-namely,
`A,B,C,D,E,H, and L. In order to incorporate 16-bit data
`
`8008
`
`8080
`
`SCRATCH PAD
`
`GENERAL REGISTERS
`
`0 7
`
`~
`
`0
`
`H
`
`A
`c
`
`E
`
`L
`
`A
`
`B
`c
`
`D
`
`E
`
`H
`
`L
`
`ADDRESS STACK
`
`STACK POINTER AND PROGRAM COUNTER
`
`13
`
`2 0
`
`15
`
`The 8080 was the first processor designed specifically
`for the microprocessor market. It was constrained to in(cid:173)
`clude all the 8008 instructions, bui not necessar.iiy with the
`same encodings. This,meant that a-user's software would
`be portable, but that the actuai ROM chips containing the
`programs would have to be replaced. The main objective
`of the 8080 was to obtain ,a ten-to-one improvement in
`throughput, eliminate many of the 8008 shortcomings
`that had by then become apparent, and provide new pro(cid:173)
`cessing capabilities not found in the 8008. The latter in(cid:173)
`cluded handling of 16-bit data types (mainly for address
`computations), BCD arithmetic, enhanced operand ad(cid:173)
`dressing modes; and improved interrupt processing.
`Memory costs had come down and processing s))eed was
`approaching TTL, so larger memory spaces seemed more
`practical. Hence, another goal was direct addressing of
`more than 16K bytes. Symmetry was not a goal because
`the benefits to be gained from making the extensions sym(cid:173)
`metric would not have justified the resulting increase in
`chip size and opcode space.
`
`The 8080 instruction set processor. ;fhe 8080 architec(cid:173)
`ture is an unsymmetrical extension of the 8008. The byte
`handling facilities are augmented with a limited number
`of 16-bit facilities. The memory space is 64K bytes and the
`stack is virtually unlimited. .
`.
`Various alternatives for the. 8080 were considered. The
`simplest involved merely adding a memory stack and
`stack instrm:;tions to the 8008. An intermediate strategy
`was to augment the above with i&.bit arithmetic facilities
`that could be used for explicit address manipulation as
`well as for 16-bit data manipulation; The most difficult
`alternative involved a syrnmetric extension which re(cid:173)
`placed the one-byte M-register instructions with three(cid:173)
`byte generalized memory access instructions. The laSt two
`bytes of these instructions colitained two address mode
`bits specifying indirect addressing and indexing (using HL
`as an index register) and a 14-bit displacement. Although
`this would have been a more versa,tile addressing
`mechanism, it would have resulted in significant code ex(cid:173)
`pansion oil existing 8008 programs. Furthermore, the
`logic needed to implement this solution would have
`precluded 16-bit arithmetic; such arithmetic would not
`have been needed for address manipulations under this
`enhanced addressing facility, but would still have been
`desirable for data manipulations. For these reasons, the
`intermediate approach was finally taken.
`
`15
`
`SP
`
`PC
`
`FLAGS
`
`0
`
`Memory and 1/0 structure. The 8080 can address pp to
`64K bytes of memory, a four-fold increase over the 8008
`(the 14-bit address stack of the 8008 was eliminated). The
`address bus of the 8080 is 16 bits wide (iri contrast to eight
`bits for the 8008), so an entire address Qli1 be sent down
`the bus in one memory cycle. Although the data handling
`facilities of the 8080 are primarily byte-oriented (the 8008
`was exclusively byte-oriented), certain operations permit
`two consecutive bytes of memory to be treated as a single
`data item. The two bytes are called a word. The data bus
`of the 8080 is only eight bits wide, and hence, word ac-
`cesses require an extra memory cycle.
`·
`The most significant eight bits of a word iue located at
`the higher memory address. This results in the same kind Figure 2. 8008 and 8080 registers.
`
`lzl
`lgl
`Ll Ll
`EJ 0
`
`FLAGS
`
`October 1980
`
`47
`
`APPLE EX. 1025
`Page 6
`
`

`
`facilities in the 8080, certain instructions operate on the
`register pairs BC, DE, and HL.
`The seven registers can be used interchangeably for on(cid:173)
`chip temporary storage. The three register pairs are used
`for address manipulations, but their roles are not inter(cid:173)
`changeable; there is an 8080instruction that allows opera(cid:173)
`tions on DE and not BC, and there are address modes that
`access memory indirectly through BC or DE but not
`through HL.
`As in the 8008, the A register has a unique role in
`arithmetic and logical operations: It serves as one of the
`operands and is the receptacle for the result. The HL
`register again has its special role of pointing to the
`pseudoregister M.
`
`Stack pointer and program counter. The 8080 has a
`single program counter instead of the floating program
`counter of the 8008. The program counter is 16 bits (two
`bits more than the 8008's program counter), thereby per(cid:173)
`mitting art address space of 64K.
`The stack is contained in memory instead of on the
`chip, a strategy which removes the restriction of only
`seven levels of nested subroutines. The entries on the
`stack are 16 bits wide. The 16-bit stack pointer is used to
`locate the stack in memory. The execution of a call in(cid:173)
`struction causes the contents of the program counter to be
`pushed onto the stack, and the return instruction causes
`the last stack entry to be popped into the program
`counter. The stack pointer was chosen to run ''downhill''
`
`Decimal arithmetic
`
`Packed BCD
`
`Addition. Numbers can be represented as a sequence of decimal
`digits by using a 4-bit binary encoding of the digits and packing
`these encodings two to a byte. Such a representation is called
`packed BCD (unpacked BCD would contain only one digit per byte).
`In order to preserve this decimal interpretation when performing
`binary addition on packed BCD numbers, the value 6 must be added
`to each digit of the sum whenever (1) the resulting digit is greater
`than 9, or (2) a carry occurs out of this digit as a result of the addi·
`tion. This must be done because the 4-bit encoding contains six
`more combinations than there are decimal digits. Consider the
`following examples (for convenience, numbers are written in hex(cid:173)
`adecimal instead of in binary):
`
`Example 1: 81 + 52
`d2 d1 dO
`8 1
`5 2
`D 3
`6
`
`+
`
`+
`
`names of digit positions
`packed BCD augend
`packed BCD addend
`
`adjustment because d1 greater than 9
`
`3 3
`
`packed BCD sum
`
`Example 2: 28 + 19
`d2 d1 dO
`2 8
`9
`4 1
`6
`4 7
`
`+
`
`+
`
`names of digit positions
`packed BCD augend
`packed BCD addend
`carry occurred out of dO
`adjustment for above carry
`packed BCD sum
`
`For such adjustments to be made, carries out of either digit posi(cid:173)
`tion must be recorded during the addition operation. The 4004,
`8080, 8085; and 8086 use the CARRY and AUXILIARY CARRY flags
`to record carries out of the leftmost and rightmost digits, respec(cid:173)
`tively. All these processors provide an instruction for performing
`the adjustments. Furthermore, they all contain an add-with-carry in(cid:173)
`struction to facilitate the addition of numbers containing more than
`two digits.
`
`Subtraction. Subtraction of packed BCD numbers is
`performed in a similar manner. However, none of the
`Intel processors prior to t.he 8086 provides an instruc(cid:173)
`tion for performing decimal adjustment following a
`subtraction (Zilog's Z-80, introduced two years before
`the 8086, has such an instruction). On processors
`without the subtr;:tct adjustment instruction, subtrac(cid:173)
`tion of packed BCD numbers is accomplished by
`generating the 10's complement of the subtrahend
`and adding.
`Multiplication. Multiplication of packed BCD
`numbers can also be adjusted to give the correct
`decimal result if the out-of-digit carries occurring dur(cid:173)
`ing the multiplication are recorded .. The result of
`multiplying two one-byte operands is two bytes long
`(four digits); out-of-digit carries can occur on any of the
`three low-order digits, all of which must be recorded.
`Furthermore, the carries out of any digit are no longer
`restricted to unity, so counters rather than flags are re(cid:173)
`quired to record th.e carries. This is illustrated in the
`following example (again, numbers are written in hex(cid:173)
`adecimal instead of in binary):
`
`Example 3: 94 • 63
`
`d3 d2 d1 dO
`9 4
`6 3
`1 B c
`3 7 8
`
`3 9 3 c
`6 6
`6 6
`6 6
`4 c 5 c
`
`6 6
`
`5 2 B c
`6
`5 8 B c
`6
`
`5 8 c 2
`
`+
`+
`+
`
`+
`
`+
`