United States Patent ra9J
`Gulick et aL
`
`II 1111111111111
`
`liS005797028A
`[llJ Patent Number :
`!451 Date of Patent:
`
`5,797,028
`Aug. 18, 1998
`
`[54] COMPUTER SYSTEM HAVING AN
`IMPROVED DIGITAL AND ANALOG
`CONFIGURATION
`
`[75)
`
`Inventors: Dale E. Gulick: Andy Lambrecht:
`Mike Webb: Larry Hewitt. all of
`Austin: Brian Barnes. Round Rock. ail
`of Tex.
`
`[73) Assignee: Advanced Mjcro Jnvices, Inc..
`Sunnyvale. Calif.
`
`[21] Appl. No.: 5U,488
`
`[22) Filed:
`
`Sep. 11, 1m
`6 ~····································~·······~····· G06F 15/00
`Int. CL
`[5 1]
`[521 U.S. Ct. .................................. 3~/80G.32; 3641228.6;
`364/DIG. 1
`{58] Field of Seartb ............................... 395/800. 800.32.
`395/800.35. 800.01: 364/489. 228.6. DIG. 1
`
`[56]
`
`References Cited
`U.S. PATENT DOCUMENTS
`5/1988 Kupnick.i et al .
`......................•.. 380/14
`4.742,544
`611991 Fujimori ................................. 348/233
`5.027.214
`5.091.951 2/1992 Ida et al . ............................•.•.... 381/63
`5,111,409 5/1992 Gas~ et al. ·······-···-············ 3951801
`
`5.2 10.806
`5.434.913
`5.592.391
`
`5/1993 Kihara et al . ........................... 381/103
`7/1995 Tung et al .
`............................. 3791202
`111997 Muyshondt et al ..................... 3~1489
`
`OTHER PUBLICATIONS
`
`PC'I Local Bus-PC/ Multimedia Design Guide-Revision
`1.0-Mar. 29. 199.t. 43 pages.
`
`Primary Examiner-John E. Harrity
`Attome>; Agent, or Firm-Conley. Rose & Tayoo: Jeffrey C.
`Hood
`
`(57)
`
`ABSTRACT
`
`A computer system including separate digital and analog
`system chips which provides increased perfonnance over
`current computer architectures. The computer system of the
`present invention includes a digital system chip which
`performs various digital functions. including multimedia
`functions and chipset functions. and a separate analog chip
`which performs analog fu nctions. including digital to analog
`and analog to digital conversions. Thus the present invention
`optimizes silicon use and design by splitting up digital and
`analog functions on separate cltips. The system of the
`present invention also separates digital noise from analog
`noise. allowing a higher degree of integration while increas(cid:173)
`ing stability.
`
`32 Claims, 11 Drawing Sheets
`
`v 102
`
`CPU
`
`132
`
`Video
`Monitor
`
`134
`
`Spkrs
`
`1:
`136)
`
`114
`
`Analog
`System
`Chip
`
`1128
`
`Digital
`System
`Chip
`USB Ports
`u u
`
`PCI Bus
`
`I
`Network
`Card
`
`124
`
`I
`Hard
`Disk
`T 122
`
`110
`
`Main
`Memory
`
`II
`Floppy
`Drive ~141
`
`120
`
`l
`
`Page 1 of 20 ZTE EXHIBIT 1023
`
`

`
`v-102
`
`CPU
`
`~6
`
`11!?._
`
`Main
`Memory
`
`J
`
`112
`
`Digital
`System
`Chip
`USB Ports ISDN
`
`107
`
`Floppy J... 141
`Dnve
`
`- · -
`
`PCI Bus
`L - __l
`Hard
`Network
`Disk
`Card
`--r--
`124
`
`122
`
`T
`
`T
`
`120
`
`l
`
`Fig. 1
`
`~ •
`00
`• ;p
`.... g ....
`
`> c
`~
`......
`
`90 -~
`
`iJ'J =(cid:173)~
`
`~ --0
`~ -......
`
`01
`_.
`.....J
`\C
`"'-l
`
`_. = N
`
`00
`
`114
`
`TV
`146--1 Tuner
`CD H Analog
`
`144--1 ROM
`
`Syst~m
`Chrp
`
`142~ MIC I
`
`136
`
`Page 2 of 20
`
`Video
`Monitor
`
`Spkrs
`
`132
`
`134
`
`\
`
`

`
`2((4
`
`Audio
`Engine
`
`~ 112
`
`234 Memory
`Buffer
`
`c= •
`
`00
`•
`
`~ .....
`~ = .....
`
`236~ DMA
`Engine
`
`208
`
`Power
`Management
`Logic
`
`> c
`
`~ -$'J -\C
`
`~
`
`2((2
`
`Video/Graphics
`Engine
`
`D
`
`260
`
`Digital r
`Ports 'r
`232
`
`Page 3 of 20
`
`to 201-..r(cid:173)
`Analog
`System(cid:173)
`Chip
`
`.__
`
`2((6
`
`General
`Purpose
`DSP
`
`207i ROM/I
`
`RAM
`
`I
`I
`
`I
`I
`
`r----------.
`212J Digital
`: AID 0/A .
`
`I
`I
`I
`' - - - -
`
`-
`
`I
`I
`I
`- - - · _ J
`
`222
`
`USB
`Interface
`
`224
`
`Serial/
`Parrallel
`Port
`Interface
`
`226
`
`228
`
`Floppy
`Controller
`lntertace
`
`Peripheral
`Function
`Logic
`
`Fig. 2
`
`'JJ :r
`~ ....
`
`~
`
`N
`
`0 ""'' --
`
`Ol
`~ '-l
`\C
`...
`'-l
`~
`N
`00
`
`

`
`e •
`C/')
`•
`""'0
`~ ......
`
`t'tl = ......
`
`~ c:
`~ ....
`~
`"'""' ~
`
`242
`
`\
`
`General
`Purpose
`DSP
`
`244
`
`\
`
`General
`Purpose
`DSP
`
`246
`
`\
`
`General I
`
`Purpose
`DSP
`
`I ~112A
`I
`
`Page 4 of 20
`
`2Q7
`
`Microcode
`RAM/
`ROM
`
`298
`
`Power
`Management
`Logic
`
`r---------,
`[ Digital
`l
`!
`212~ AID
`: &0/A :
`
`I
`
`I
`I
`: _ __ _ _ _ __ _ _ J
`
`Fig. 3
`
`en
`::r
`
`~ -w
`
`0
`
`~ ....
`....
`
`222
`
`\
`
`USB
`Interface
`
`224
`
`\
`
`SeriaV
`Parrallel
`Port
`Interface
`
`226
`
`\
`
`Floppy
`Controller
`Interface
`
`228
`
`Peripheral
`Function
`Logic
`
`f.Jl
`'4 ....,J
`\0
`.......
`Q
`N
`00
`
`'4
`
`

`
`,-- 114
`
`~
`00
`•
`
`~ ;-= ....
`
`> c:
`
`~
`1-
`
`SJO -~
`
`~ =-~ ...
`0 ....,
`.... I -
`
`~
`
`Fig. 4
`
`Vt
`~
`\0
`-...I
`
`.... = N
`
`00
`
`402
`
`Analog
`AID
`
`4Q4
`
`Analog
`0 /A
`
`TV Tuner
`l ~ut -412
`Converter ~452
`N SC
`c
`CD-ROM 1-414
`Input
`
`@]416
`
`t
`
`Voltage -454
`Inverter
`
`Page 5 of 20
`
`422
`
`424
`
`Video
`Port
`
`Audio
`Port
`
`432
`
`I
`
`434
`
`426
`
`Modem
`
`DAA
`
`I
`
`I
`
`436
`
`406 B
`
`442
`
`Radio
`Transceiver
`
`414
`
`IR
`Transceiver
`
`416
`
`Audio
`System
`Inputs
`
`

`
`102
`
`CPU
`
`I
`
`~ • (J).
`•
`~
`~
`~
`
`~ a
`
`Page 6 of 20
`
`132~ Video
`Monitor'
`
`-
`
`134--l Spkrs
`-
`
`114
`...l.
`
`'
`
`Analog
`System
`Chip
`
`[
`136)
`
`1128
`
`__i
`
`Digital
`System
`Chip
`USB Ports
`u u
`
`110
`
`~
`
`r-
`
`Main
`Memory
`
`II
`-
`Floppy f.--141
`Drive
`
`PCI Bus
`
`120
`
`Hard 1
`Disk
`- , -
`122
`
`'Network
`Card
`
`124
`
`Fig. 5
`
`> c
`~
`.....
`
`SJO -~
`
`QO
`
`\J)
`:::'
`~
`
`~ -(Jl
`..... -
`
`Q
`""')
`
`Ul
`~
`\C
`-...l
`
`... = N
`
`00
`
`

`
`y--- 1128
`
`604-l Memory
`Controller
`Logic
`
`612
`
`Hard
`Drive
`Controller
`
`208
`
`Power
`Management
`Logic
`
`0 • rJ1 •
`;?
`;-
`= ,....
`
`> = ~
`
`1-'
`~
`1-'
`~
`
`00
`0'
`
`~ -Q\
`
`0 ...,
`~ ....
`
`Fig. 6
`
`r---------~
`I
`I
`I
`I
`212J Digital
`:
`! 0 /AA/D l
`'----------"
`602
`
`I
`:
`
`I
`I
`
`PCI
`Bridge
`Logic
`
`VI
`....
`'-l
`\e
`'-l
`
`.... = N oc
`
`2Q2
`
`Video/Graphics
`Engine
`
`2Q4
`
`Audio
`Engine
`
`Page 7 of 20
`
`296
`
`General
`Purpose
`DSP
`
`696
`
`L2
`Cache
`Controller
`
`222
`
`USB
`Interface
`
`608
`
`Chipset
`Logic
`
`224
`
`Serial/
`Parallel
`Port
`Interface
`
`Periphe ral
`Function
`Logic
`
`226
`
`Floppy
`Controller
`Interface
`
`

`
`~
`
`~
`00 •
`~ ....
`~ ::s ....
`
`> c
`
`~ -$10 -~ QC
`
`110
`
`I Mai~
`
`Memory
`
`rJJ
`0"
`
`~ ...
`
`-..I
`0
`
`~ --
`
`v-102
`
`CPU
`
`Page 8 of 20
`
`L
`
`PCI Bus
`
`I
`120
`
`1128 I
`
`I
`
`I
`
`I
`
`141
`
`114
`
`Analog
`System
`Chip
`
`Fig. 7
`
`~ Analog
`Connector
`
`134
`
`Ol
`~ -...J
`\C
`...
`-....I
`~
`N
`00
`
`

`
`1~6A
`
`Chipset
`Logic
`
`PCI
`Bridge
`
`120
`
`110
`
`Main
`Memory
`
`124-- Network
`Interface
`Card
`II
`
`PCI Bus
`
`Hard
`Disk
`
`T
`
`, 1, '2
`
`_l
`
`174
`
`Expansion
`Bus
`Bridge
`
`Expansion Bus
`
`~ 1
`
`t f6
`
`~ •
`00
`•
`""= ~
`"""" ~ = flllfo.
`
`> c
`
`00
`
`/;J} =:r
`
`o;c -$10 -~
`:i -00
`~ ..... -
`
`Fig. 8
`
`...
`Ul
`........
`\C
`........
`...
`0
`N
`QC
`
`v 102
`
`CPU
`
`Page 9 of 20
`
`\
`
`I
`[
`USB Digital
`[ Ports System
`~ Floppy
`141
`Drive~
`Chip
`I
`Analog
`System
`Chip
`
`TV
`'46 Tuner
`
`r44
`
`CD
`ROM
`
`.,112C
`
`.,114A
`
`142- MIC
`
`~136
`
`I
`Spkrs
`,
`134
`
`Video
`Monitor
`
`132
`
`

`
`110
`
`Main
`Memory
`
`124--. Network
`Interface
`Card
`II
`
`PCI Bus
`
`e •
`00
`•
`~
`~ = ~
`
`~
`
`> = ~ ....
`9'J
`....
`~
`00
`
`\J')
`t:r
`~ ......
`\C
`
`~ -....
`
`(
`
`v-174
`
`Expansion
`Bus
`Bridge
`
`\
`
`Expansion Bus
`
`I
`'
`
`1l6
`
`tit
`':..:~
`\C
`-....1
`
`... = N
`
`00
`
`10
`
`16
`
`A
`
`Chipset
`Logic
`
`PCI
`Bridge
`
`!--r102
`
`CPU
`
`Page 10 of 20
`
`\
`
`\
`
`II
`
`Digital
`System
`Chip
`
`Analog
`System
`Chip
`
`I
`Video
`Monitor
`
`v-112C
`
`120
`
`/ 112C
`
`II
`
`Digital
`System
`Chip
`
`'
`
`1~0
`
`/ 114A
`
`Analog v114A
`System
`Chip
`
`I
`Spkrs
`
`- - - -
`
`

`
`~ • r::n •
`~
`""" ~ = """
`~ -~ -\0
`
`~ c
`
`\0
`QO
`
`~
`
`r:Jj c:r
`
`~ ..... -0
`~ --
`
`...
`Ol
`......:t
`\C
`......:t
`b
`N oc
`
`242
`
`General
`Purpose
`DSP
`
`243
`
`RAM
`
`Page 11 of 20
`
`2£(7
`
`Microcode
`RAM/
`ROM
`
`2$0
`
`PCI
`Interface
`
`222
`
`USB
`Interface
`
`234
`
`Memory
`Buffer
`
`DMA ..-236
`Engine
`...__ _ _, 208
`
`Power
`Management
`Logic
`
`r----------,
`: Digital l
`212""" AID
`:
`l & 0/A
`
`J
`I
`:
`•-- ----- ---~
`
`~112C
`
`Fig. 10
`
`224
`
`Serial/
`Parallel
`Port
`Interface
`
`226
`
`228
`
`Floppy
`Controller
`Interface
`
`Peripheral
`Function
`Logic
`
`

`
`..,-114A
`
`~ •
`00
`•
`~
`
`~ g ,..
`
`4q2
`
`Analog
`AID
`
`404
`
`Analog
`0 /A
`
`4Q6
`
`Mixers
`
`Page 12 of 20
`
`---412
`
`TV Tuner
`Input
`NTSC
`Converter
`
`§1452
`
`c
`
`CD-ROM ---414
`Input
`
`@]416
`
`t
`
`---454
`
`Voltage
`Inverter
`
`422
`
`424
`
`Video
`Port
`
`Audio
`Port
`
`426
`
`Modem
`
`DAA
`
`432
`
`434
`
`436
`
`442
`
`Radio
`Transceiver
`
`444
`
`IR
`Transceiver
`
`446
`
`Audio
`System
`Inputs
`
`470
`
`Audio
`Detect
`Logic
`
`~
`~
`~
`......
`
`S'J -~
`
`010
`
`rJJ
`::r
`~
`~
`......
`......
`
`~ -....
`
`Ol
`~
`\C
`........
`....
`~
`N
`00
`
`Fig. 11
`
`

`
`5.797.028
`
`2
`For example. a video card includes digital circuitry which
`performs polygon rendering. texture mapping and other
`pixel manipulation operations. and also includes the digital
`memory portion of a RAMDAC (random access memory
`5 digital to analog converter). A video c ard also includes
`analog circuitry which performs the digital to analog con(cid:173)
`version and generates RGB (red. green and blue) analog
`voltages which drive a video monitor. Likewise. a sound
`card includes digital circuitry which performs audio pro-
`tO cessing functions such as MIDL wavetable synthesis. etc ..
`and also includes analog circuitry to generate the appropriate
`analog audio signals that are provided to the speakers.
`As multimedia and communication applications become
`more prevalent. multimedia and communication hardware
`15 will correspondingly become essential components in per(cid:173)
`sonal computer systems. Therefore. an improved computer
`system architecture is desired which is optimized for mul(cid:173)
`timedia and communication applicatioms as well as for
`non-realtime applications.
`
`1
`COMPUTER SYSTEM HAVING AN
`IMPROVED DIG ITAL AND ANALOG
`CONFIGURATION
`FIELD OF THE ll'NENTION
`The present invention relates to a computer system having
`separate digital and analog system chips which is optimized
`for real-time multimedia and communications applications.
`wherein the digital chip integrates digital portions of mul(cid:173)
`timedia and communications processing and the analog chip
`integrates analog portions of multimedia and communica(cid:173)
`tions processing.
`DESCRIPI10N OF THE RELATED ART
`Computer architectures generally include a plurality of
`devices interconnected by one or more various buses. For
`example. modern computer systems typically include a CP U
`coupled through bridge logic to main memory. The bridge
`logic also typically couples to a high bandwidth local
`expansion bus. such as the peripheral component intercon(cid:173)
`nect (PCI) bus or the VESA (Video Electronics Standards 20
`Association) VL bus. Examples of devices which can be
`coupled to local expansion buses include video accelerator
`cards. audio cards. telephony cards. SCSI adapters. network
`interface cards. etc. An older type expansion bus is generally
`coupled to the local expansion bus. Examples of such
`expansion buses included the industry standard architecture
`(ISA) bus. also referred to as the AT bus. the extended
`industry standard architecture (EISA) bus. or the mkrochan-
`nel architecture (MCA) bus. Various devices may be coupled
`to this second expansion bus. including a fax/modem. sound
`card. etc.
`Personal computer systems were originally developed for
`business applications such as word processing and
`spreadsheels. among others. However. computer systems are
`currently being used to handle a number of real time
`applications. including multimedia applications having
`video and audio components. video capture and playback.
`telephony applications. and speech recognition and
`synthesis. among others. These real time applications typi(cid:173)
`cally require a Large amount of system resources and band(cid:173)
`width.
`One problem that has arisen is that computer systems
`originally designed for business applications are not well
`suited for the real-time requirements of modern multimedia
`and communications applications. For example. modern
`personal computer system architectures still presume that
`the majority of applications executing on the computer
`system are non real-time business applications such as word
`processing and/or spreadsheet applications. which execute
`primarily on the main CPU. In general. computer systems
`have not traditionally been designed with multimedia and/or
`communication hardware as part of the system. and thus the
`system is not optimized for multimedia applications. Rather.
`multimedia and/or communication hardware is typically
`designed as an add-in card for optional insertion in an
`expansion bus of the computer system.
`In many cases. multimedia hardware cards situated on an
`expansion bus do not have the required access to system
`memory and other system resow-ces for proper operation. In
`addition. since the computer system architecture is not
`optimized for real-time applications. multimedia and com(cid:173)
`munications hardware cards generally do not make efficient
`use of system resources. As an example. hardware cards
`which perform video. audio and/or communications fu nc(cid:173)
`tions each typically include a digital portion which processes
`digital data and an analog portion which processes analog
`data.
`
`35
`
`SUMMARY OF THE INVENTION
`The present invention comprises a computer system
`which provides increased performance over current com-
`25 puler architectures. The computer syste m of the present
`invention includes a digital system chip which performs
`various digital functions. including multimedia and commu(cid:173)
`nication functions. and a separate analog chip which per(cid:173)
`forms analog functions. Thus the present invention op!i-
`30 mizes silicon use and design by splitting up digital and
`analog functions on separate chips. The system of the
`present invention also separates digital n oise from analog
`noise. allowing a higher degree of integration while increas(cid:173)
`ing stability.
`In the preferred embodiment. the computer system
`includes a CPU coupled through chip set or bridge logic to
`main memory. The bridge logic also couples to a local
`expansion bus such as the PCI bus. Various devices may be
`connected to the PCI bus. including a network interface
`40 card. as well as other peripherals. The bridge logic and main
`memory also couple to a digital system cbip which performs
`various digital function s in the computer system. In one
`embodiment. the digital system chip couples directly to the
`CPU and main memory. and the digital system chip includes
`45 the PCI bridge logic. the main memory controller logic. and
`other chipset logic.
`The digital system chip includes one oc more DSP engines
`that perform video. graphics. audio and/or telephony appli(cid:173)
`cations. The DSP engines may comprise either dedicated
`50 video. audio and/or communication engines or general pur(cid:173)
`pose DSP engines. The digital system c hip also performs
`various digital operations in the computer system. including
`one or more of power management functions. floppy con(cid:173)
`troUer functions. serial and parallel 110 port functions. and
`ss bard disk interface functions. As desired. the digital system
`chip may perform other fu nctions. including. EIDE support
`and SCSI support. Thus the digital system chip perfonns a
`number of real-time digital functions. including audio and
`video functions. as well as othe.rs.
`An analog system chip is connected directly to the digital
`system chip and performs various analog functions. includ(cid:173)
`ing analog-to-digital (AID) conversion and digital to analog
`(DfA) conversion for various functions. including video.
`audio. modem functionality. and a telephone handset. among
`6S others. In one embodiment. the analog system chip only
`includes analog portions of the AID and DfA logic
`functionality. and the digital portion of the ND and Df A
`
`60
`
`Page 13 of 20
`
`

`
`5.797.028
`
`4
`FIG. 8 is a block diagram of a computer system including
`digital and analog system chips coupled to a PCI expansion
`bus according to an alternate embodiment of the present
`invention:
`FIG. 9 illustrates the computer system of FIG. 8 including
`a plurality of digital and anal?g system chips. w~e~in the
`system includes a bus compmed between the dig1tal and
`analog system chips:
`FIG. 10 is a block diagram of the digital system chip of
`IO FIGS. 8 and 9: and
`FIG. 11 is a block diagram of the analog system chip of
`FIGS. 8 and 9.
`
`3
`logic is comprised in the digital system chip. Th~ analog
`system chip further includes video ports for coupling to a
`video monitor. audio ports for coupling to an audio DAC or
`speakers. and one or more communication ports for trans(cid:173)
`ferring analog information. In one embodim~nt. the an~og s
`system chip includes one or more of a radio transcetver.
`infrared (IR) transceiver. analog mixer. and a NTSC
`(National Television Standards Committee) converter. The
`analog system chip further includes analog inputs ~or receiv(cid:173)
`ing input from various peripherals. such as a mtcrophone.
`CD-ROM. stereo system and TV tuner. among others.
`In an alternate embodiment. the digital system chip
`couples to the PCI bus. The digital syste_m chip ma_y. be
`comprised on the motherboard or. alte~atlvely. the digital
`DETAll.ED DESCRIPTION OF THE
`chip is comprised on a modular expaoston card adaJl(ed ~or
`PREFERRED EMBODIMENT
`insertion into a connector slot on the PCI bus. thus allowmg
`Incorporation by Reference
`for improved modularity and upgradeability. The analog
`PCI System Arcltitectu.re by Tom Shanley and Don Ander(cid:173)
`system chip preferably couples directly to the digital system
`son and available from Mindshare Press. 2202 Buttercup
`chip. and the analog system chip couples to various
`Dr .. Richardson. Tex. 75082 (214) 231-2216. is hereby
`peripherals. including a monitor and speakers.
`20 incorporated by reference in its entirety.
`. .
`In one embodiment. the computer system includes a
`The Intel Peripherals Handbook. 1994 and 1995 editions.
`separate intermediate bus coupled ~tween _the digi~ sys(cid:173)
`available from Intel Corporation. are hereby incorporated by
`tem cltip and the analog system chip. In this embodiment.
`reference in their entirety. Also. data sheets on the Intel
`one or more digital system chips are coupled to the PCI bus.
`82430FX PCiset cltipset. also referred to as the Triton
`wherein the one or more digital system chips connect to the
`25 chipset. are hereby incorporated by reference in their
`intermediate bus. One or more analog system chips are also
`entirety. inc.luding the 82430 Cache Memory Subsystem
`coupled to the intermediate bus. This configuration allows
`data sheeJ (Order No. 290482-004 ). the 8242<Y82430 PC'Iset
`for .improved modularity and upgradeability. This configu(cid:173)
`ISA and EISA bridge data sheet (Order No. 290483-004).
`ration also allows communication between each of the
`and the Intel 82430FX PCiset Product Brief (Order No.
`digital system chips and analog system chips. as well. as
`30 297559-001). all of which are available from Intel
`communication between the respective digital system chips
`C01p0ration. Literature Sales. P.O. Box 7641. Mt. Prospect.
`and communication between the respective analog system
`m. 6005~7641 (1-800-879-4683). and all of wltich are
`chips.
`hereby incorporated by reference in their e ntirety.
`Therefore. the present invention comprises a novel com(cid:173)
`U.S. Pat. No. 4.994.801 titled "Apparatus Adaptable for
`puter system arcltitecture which incr~e~ the perfo~n~
`35 Use in Effecting Communication Between an Analog Device
`of real-time applications. A dedicated digital system ctup lS
`and a Digital Device". which was filed on Oct. 30. 1989. and
`included in the system wltich performs various digital mul(cid:173)
`which issued Feb. 19. 1991. whose inventors are Saf Asghar.
`timedia and communication operations. and an analog sys(cid:173)
`John Bartlc.owiak. and Miki Moyal. and which is assigned to
`tem chip is coupled directly to the digital system chip which
`Advanced Micro Devices C01p0ration. is hereby incorpo-
`performs various corresponding an_alog ~uncti~ns: This -~pa­
`40 rated by reference in its entirety.
`ration of digital and analog funco.onality opturuzes silicon
`Computer System Block Diagram
`use and reduces noise issues while also providing improved
`Referring now to FIG. 1. a block diagram of a computer
`pe.rfonnance.
`system according to the present invention is shown. As
`shown. the computer system includes a central processing
`45 unit (CPU) lt2 wltich is coupled through a CPU local bus
`to a host/PCI/cache bridge or chipset 116. The chipset
`includes arbitration logic 107 as shown. The chipset lt6 is
`preferably simiJar to the Triton chipset available from Intel
`Corporation. A second level or U cache memory (oot
`so shown) may be coupled to a cache controller in the chipset.
`as desired. The bridge or chipset 116 couples through a
`memory bus 1CI8 to maio memory llt. The maio memory
`110 is preferably DRAM (dynamic random access memory)
`or EDO (extended data out) memory. as desired.
`The host/PCJ/cache bridge or chipset lK also interfaces
`to a peripheral component interconnect (PCI) bus Ut.Io the
`preferred embodiment. a PCI local bus is u sed. However. it
`is ooted that other local buses may be used. such as the
`VESA (Video Electronics Standards Association) VL bus.
`60 Various types of devices may be connected to the PCI bus
`12t.
`In the embodiment shown in RG. 1. a digital system cltip
`112 according to the present invention is coupled to the
`chipset 106. The digital system chip 112 performs various
`65 digital functions. including multimedia functions su~h. as
`video and audio. as discussed further below. The dtgJtal
`system chip 112 includes a Universal Serial Bus (USB)
`
`BRIEF DESCRlPTION OF THE DRAWINGS
`A better understanding of the present invention can be
`obtained when the following detailed description of the
`preferred embo<l.i.ment is considered in conjunction with the
`following drawings. in which:
`FIG. 1 is a block diagram of a computer system including
`a digital system chip and an analog system chip according to
`the preferred embodiment of the Jresent invention;
`FIG. 2 is a block diagram of the digital system chip of
`FIG. 1:
`FIG. 3 is a block diagram of an alternate embodiment of
`the digital system chip of FIG. 1 according to the present
`invention:
`FIG. 4 is a block diagram of the analog system chip of
`FIG. 1:
`FIG. S is a block diagram of a computer system including
`a digital system chip and an analog chip according to an
`alternate embodiment of the present invention;
`FIG. 6 is a block diagram of the digital system chip of
`FIG. S:
`FIG. 7 is a block diagram of a computer system including
`a digital system cltip and an analog chip according to a third
`embodiment of the present invention:
`
`15
`
`55
`
`Page 14 of 20
`
`

`
`5.797.028
`
`s
`interface as well as a paralleUseriaJ port interface. The
`digital system chip 112 also preferably includes an IS DN
`(integrated Services Digital Network) interface. The digital
`system chip 112 also preferably couples to fl oppy drive 141.
`Various other devices may be coupled to the digital system s
`chip 112. such as a hard drive or other digital devices. The
`digital system chip 112 preferably only comprises digital
`circuitry.
`The digital system chip 112 preferably communicates
`with devices on the PCI bus 120 through the chipset 106. In 10
`one embodiment. the digital system chip 112 includes a PCI
`interface for coupling directly to the PCJ bus U.. In this
`embodiment. the digital system chip 112 can arbitrate for the
`PCI bus and can communicate directly with devices on the
`PCI bus with less involvement of the chipset logic 106. The IS
`digital system chip 112 is also preferably coupled to other
`devices in the computer system to perform power manage(cid:173)
`ment functions. as well as other fu nctions. as desired.
`An analog system chip 114 is coupled to the digital system
`chip 112. The a nalog system chip 114 performs various 20
`analog fu nctions. including analog to digital (A/D)
`conversion. digital to analog (D/A) conversion, and modem
`functionalily. among others. The analog system chip 114 is
`coupled to provide outputs to various analog devices.
`including a video monitor 132 and speakers 134. The analog 2s
`system chip 114 also includes an analog modem output 136
`for coupling to a telephone line. The analog system chip 114
`also couples to various devices to receive various analog
`inputs. including a microphone 142. a CD-ROM 144. and a
`TV runer 146. lt is noted that only the analog output of the 30
`CD-ROM is provided to the analog system chip 114. The
`analog system chip 114 preferably substantially comprises
`analog circuitry. and preferably only includes digital "front(cid:173)
`end" circuitry for interfacing to the digital system chip 112.
`Various devices may be coupled to the PCI bus llt. Foc 3S
`example. a hard disk 122 and a network interface controller
`124 are shown coupled to the PCI bus 121. A SCSI (small
`computer systems interface) adapter (not shown) may also
`be coupled to the PCI bus 120. In one embodiment. the
`digital system chip 112 includes a hard disk interface for 40
`coupling to a hard disk and a SCSI interface foe coupling to
`SCSI devices. In addition. the digital system chip 112 may
`also include network interface circuitry such as Ethernet or
`token ring circuitry foc interfacing to a network. However. in
`the preferred embodiment. the digital system chip 112 does 4S
`not include network circuitry. but rather network functions
`are performed by a modular network card coupled to the PCI
`bus 12t. Various other devices may be connected to the PCI
`bus 1241. as is well known in the art.
`Expansion bus bridge logic (not shown) is also pr eferably so
`coupled to the PCI bus 120. The expansion bus bridge logic
`interfaces to an expansion bus (not shown). The expansion
`bus may be any of varying 1ypes. including the industry
`standard architecture (ISA) bus. also referred to as the /JJ
`bus. the extended industry standard architecture (EISA) bus. ss
`or the rnicroch annel architecture (MCA) bus. Various
`devices may be coupled to the expansion bus. such as
`expansion bus memory (not shown).
`Digital System Chip Block Diagram
`Referring now to FlG. 2. a more detailed block diagram 60
`illustrating the digital system chip 112 is shown. The digital
`system chip 112 includes a connectoc 201 for connecting to
`analog system chip 114. and also includes a connector 203
`for coupling to the chipset logic I 06. Although not shown in
`AG. 2. the various devices in the digital system chip 112 are 6s
`interconnected through respective data channels or signal
`traces to form a functional unit. The digital system chip 112
`
`6
`also preferably includes one or more input/output (110)
`channels for transmitting data to the analog system chip 114
`and to the chipset logic 106.
`In the preferred embodiment shown in FIG. 2. the digital
`system chip 112 includes a video/graphics en gine 2e2 which
`performs video and graphics operations s uch as polygon
`rendering. texture mapping. and other pixel manipulation
`operations. among others. The video/graphics engine 202
`performs operations similar to currently available graphics
`accelerators from companies such as S3. Tseng. Weitek. and
`others. The digital system chip 112 may also include a
`dedicated MPEG (Motion Pictures Electronics Group)
`decoder (not shown).
`The digital system chip 112 also includes an audio engine
`2e4 which performs digital audio processing operations such
`as MIDI and wavetable synthesis. among others. the audio
`engine 204 performs operations similar to currently avail(cid:173)
`able sound cards such as Sound.Blaster or SoundBiaster(cid:173)
`compatibJe cards.
`The digital system chip 112 also preferably includes a
`general purpose DSP e ngine 206 which is programmable to
`perform various functions. such as MPEG decoding. LZ
`compression. and other advanced video. audio. and/or com(cid:173)
`munication.s functions. A read only memory (ROM) 207 is
`preferably coopted to the DSP Engine 106 which stores
`instructions for use by the DSP Engine 206. Alternatively. a
`non-volatile RAM or SRAM is used which receives down(cid:173)
`loadable instructions from the main memory 110. In one
`embodiment. the DSP engine 2t6 is a dedicated communi(cid:173)
`cation engine which performs digital communication
`operations. such as ISDN operations and/or telephony
`operations. ln another embodiment. the digital system chip
`112 includes a dedicated communication engine (not shown)
`in addition to the general purpose DSP engine 2CHi. and the
`dedicated communication engine performs ISDN and/or
`telephony operations.
`ln one embodiment. the digital system chip 112 includes
`multimedia memory (not shown) for storing multimedia
`data, such as video data and audio data. The multimedia
`memory corresponds to video RAM (VRAM) found on
`current video accelerator cards. and is also used for storing
`audio data as well as other multimedia and communications
`data. The multimedia memory pr eferably comprises VRAM.
`DRAM (dynamic RAM). SRAM (static RAM). or EDO
`(extended data out) RAM. as desired. Alternatively. the
`m ultimedia memory is located off-chip and is coupled
`directly to the digital system chip 112.
`ln one embodiment, the digital syst.em chip 112 does not
`include multimedia memory. but rather video data and audio
`data are stored in the system memory 110 accocding to a
`unified memory architecrure. In this embodiment. the digital
`system chip 112 preferably includes a memory buffer 234
`and a direct memory access ( DMA) engine 236 for trans(cid:173)
`feaing data from the main memory 110 to the memory
`buffer 234 in the digital system chip 112.
`ln one embodiment. the video engine 202 and audio
`engine 214 couple through one or moce 110 channels to
`respective digital l/0 ports 232. including video and audio
`ports. The digital video port is included foc providing digital
`video data to peripheral devices. such as an MPEG decoder
`or a digital video display. The digital audio por1 is included
`for providing digital audio data to digital peripheral devices.
`such as for exter nal mixing. as desired. In an embodiment
`which includes a dedicated communication engine. the
`digital system chip 112 preferably includes one or more
`digital communication ports 232 for coupling to an ISDN
`line or other digital line.
`
`Page 15 of 20
`
`

`
`5.797.028
`
`s
`
`7
`8
`store microcode corresponding to video. audio and rommu-
`As shown. the digital system chip 112 also preferably
`includes a USB (Universal Serial Bus) interface 222 for
`nication processing instructions. or receive downloadable
`interfacing to a Universal Serial Bus. The Universal Serial
`microcode from the system memory 110>.
`Analog System Chip
`Bus is a bus specification proposed by Microsoft and Intel
`Referring now to FlG. 4. the analog system chip 114 is
`which is designed to replace the various peripheral connec-
`shown. In the preferred embodiment shown in FIG. 4. the
`tors on current PCs with a single connector for most
`analog system chip 114 includes analog to digital (AID)
`peripherals. such as keyboards. mice. monitors. and other
`circuitry 402 and digital to analog (D/ A) circuitry 404. The
`devices. The digital system chip 111 also pceferably includes
`analog system chip 114 preferably includes AID and 0 /A
`serial/parallel port interface logic 214 for providing a serial
`port and a parallel port. The serial/parallel port interface 10 logic for video. audio. modem and telephone handset tunc-
`tionality. In the preferred embodiment. lhe analog system
`logic 224 preferably implements a universal asynchronous
`receiver/transmitter (UA.RT). The digital system chip 112
`chip ll4 include a single NO converter and a single 0/A
`also JXeferably includes a floppy controller interface 226 for
`converter for all of the above fuoction.s. Alternatively. the
`ND circuitry block 402 and the D/A circuitry block 484
`interfacing to floppy drive 141. The digital system chip 112
`may include other functions. including RIDE support and IS each include a plurality of NO converters and a plurality of
`SCSI support.
`D/A converters. respectively. for each of the above func-
`In the preferred embodiment. the digital system chip 112
`tions.
`includes video processing circuitry and/or finuware corn-
`In one embodiment. the analog system chip 114 includes
`prised in the video engine 2t2. including the digital portion
`only the analog circuitry portion of the AID and D/A logic.
`of a random access memory digital to analog converter 20 and the digital portion of this logic