IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`
`Application
`13/734,874
`Number:
`1‘;:'1‘t'c‘§‘% °’ 37' (C) 301-04-2013
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`”“""‘°a“°"
`Type:
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`iUtility
`_
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`Customer Num-
`bcr:
`Status:
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`30232
`Non Final Action Mailed
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`Status Date‘
`'
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`05-28-2013
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`Examiner Name: :
`...
`.
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`Location:
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`ELECTRONIC
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`Group Art Unit: 2827
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`Confirmation
`Number:
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`I 6033
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`Attorney Docket f
`Number:
`§130104MMD2'US
`Class / Subclass: £257/777
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`Location Date:
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`Earliest Publica-
`tion No:
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`Earliest Publica-
`tion Date:
`Patent Number:
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`First Named ln-
`ventor:
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`fGlenn J. Leedy , Carmel,
`CA (US)
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`Issue Date of
`Patent:
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`-
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`_
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`'
`-
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`_
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`.
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`Entity Status:
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`‘
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`;Small
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`AIA F’ .t l
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`vent; tl:Fil‘;): No
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`-
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`Title of Invention:
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`Three dimensional structure memory
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`RESPONSE
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`Sir:
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`Responsive to the prior Office Action, please amend this application as follows.
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`SAMSUNG ET AL. EXHJBIT 1019
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`Page 1 of 9
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`IN THE CLAIMS
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`(Currently amended) A thin and substantially flexible substrate—structure compris-
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`a thin, substantially flexible semiconductor layer of one piece; and
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`a dielectric layer formed on the semiconductor layer and having a stress of
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`about 5 x 108 dynes/cm2 tensile or less.
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`2.
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`(Currently amended) The thin and substantially flexible stmcture of
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`Claim 1, further comprising:
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`a Vertical interconnect conductor extending Vertically through the semiconduc-
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`tor layer; and
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`a Vertical dielectric insulator extending Vertically through the semiconductor
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`layer and around the interconnect conductor and having a stress of about 5 x 108
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`dynes/cmz tensile or less.
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`3.
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`(Currently amended) The thin and substantially flexible structure of
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`Claim 2, wherein:
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`the thin semiconductor layer includes vertical holes etched therethrough; and
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`the vertical interconnect conductors and the vertical dielectric insulators are
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`formed in the Vertical holes of the thin semiconductor layer.
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`4.
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`(Currently amended) The thin and substantially flexible stmcture of
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`Claim 2, wherein the thin semiconductor layer comprises monocystalline silicon.
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`5.
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`(Currently amended) The thin and substantially flexible stmcture of
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`Claim 2, wherein the thin semiconductor layer is formed from a semiconductor wafer.
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`6.
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`(Canceled)
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`SAMSUNG ET AL. EXHIBIT 1019
`Page 2 of 9
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`7.
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`(Currently amended) The thin and substantially flexible stmcture of
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`Claim 26, wherein the thin and substantially flexible substrate has a thickness of 50 microns
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`or less.
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`8.
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`(Currently amended) The thin and substantially flexible stmcture of
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`Claim 5, wherein the semiconductor wafer comprises monocrystalline silicon, and the thin
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`semiconductor layer comprises monocrystalline silicon flom the semiconductor wafer .
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`9.
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`(Currently amended) The thin a11d substantially flexible st111ct111‘e of
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`Claim 2, wherein the thin semiconductor layer is unitary.
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`10.
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`(Currently amended) The thin and substantially flexible stmcture of
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`Claim 2, wherein the thin semiconductor layer extends from edge to edge of the thin and sub-
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`stantially flcxiblc substrate.
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`11.
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`(Currently amended) The thin and substantially flexible stmcture of
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`Claim 10, wherein the dielectric layer extends from edge to edge of the thin and substantially
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`flexible substrate.
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`12.
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`(Currently amended) The thin and substantially flexible structure of
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`Claim 6, wherein the thin semiconductor layer comprises a polished surface formed by re-
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`moving material during thinning of the thin semiconductor to expose a surface thereof and
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`then polishing the exposed surface.
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`13.
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`(Currently amended) The thin and substantially flexible stmcture of
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`Claim 2, further comprising:
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`a bottomside surface and a topside surface;
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`a contact formed on the bottomside surface and electrically connected to the
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`Vertical interconnect conductor; and
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`an interconnect, contact or circuit formed on or near the topside surface and
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`electrically connected to the Vertical interconnect conductor;
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`3
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`SAMSUNG ET AL. EXHIBIT 1019
`Page 3 of 9
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`wherein the interconnect, contact or circuit is electrically connected to the
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`contact on the bottomside surface via the vertical interconnect.
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`14.
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`(Currently amended) A thin and substantially flexible circuit comprising:
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`a thin semiconductor layer of one piece;
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`a dielectric layer formed on the semiconductor layer and having a stress of
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`about 5 x 108 dynes/cmz tensile or less; and
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`circuitry sumoned by the thin semiconductor layer and the die-
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`lectric layer defining an integrated circuit die having an area, wherein the thin semi-
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`conductor layer extends throughout a substantial portion of the area of the integrated
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`circuit die.
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`15.
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`(Previously presented) The thin and substantially flexible circuit of Claim 31,
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`wherein:
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`the thin semiconductor layer includes vertical holes etched therethrough; and
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`the vertical interconnect conductors and the vertical dielectric insulators are
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`formed in the vertical holes of the thin semiconductor layer.
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`16.
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`(Previously presented) The thin and substantially flexible circuit of Claim 31,
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`wherein the thin semiconductor layer comprises monocystalline silicon.
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`17.
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`(Previously presented) The thin and substantially flexible circuit of Claim 31,
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`wherein the thin semiconductor layer is formed from a semiconductor wafer.
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`18.
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`(Canceled)
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`19.
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`(Currently amended) The thin and substantially flexible circuit of Claim Q-l-8,
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`wherein the thin and substantially flexible substrate has a thickness of 50 microns or less.
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`SAMSUNG ET AL. EXHIBIT 1019
`Page 4 of 9
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`20.
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`(Previously presented) The thin and substantially flexible circuit of Claim 17,
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`wherein the semiconductor wafer comprises monocrystalline silicon, and the thin semicon-
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`ductor layer comprises monocrystalline silicon from the semiconductor wafer .
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`21.
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`(Previously presented) The thin and substantially flexible circuit of Claim 31,
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`wherein the thin semiconductor layer is unitary.
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`22.
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`(Previously presented) The thin and substantially flexible circuit of Claim 31,
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`wherein the thin semiconductor layer extends from edge to edge of the thin a11d substantially
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`flexible substrate.
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`23.
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`(Previously presented) The thin and substantially flexible circuit of Claim 22,
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`wherein the dielectric layer extends from edge to edge of the thin and substantially flexible
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`24.
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`(Currently amended) The thin and substantially flexible circuit of Claim -1-824,
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`wherein the thin semiconductor layer comprises a polished surface fonned by removing ma-
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`terial during thinning of the thin semiconductor to expose a surface thereof and then polishing
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`the exposed surface.
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`25.
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`(Previously presented) The thin and substantially flexible circuit of Claim 31,
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`further comprising:
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`a bottomside surface and a topside surface;
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`a contact formed on the bottomside surface and electrically connected to the
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`vertical interconnect conductor; and
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`an interconnect, contact or circuit formed on or near the topside surface and
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`electrically connected to the vertical interconnect conductor;
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`wherein the interconnect, contact or circuit is electrically connected to the
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`contact on the bottomside surface via the vertical interconnect.
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`SAMSUNG ET AL. EXHIBIT 1019
`Page 5 of 9
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`26.
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`(Currently amended) A stmcture com-
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`a semiconductor layer of one piece; and
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`a dielectric layer formed on the semiconductor layer and having a stress of
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`about 5 x 108 dynes/cm2 tensile or less;
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`wherein the semiconductor layer is capable of being thinned to obtain a thin
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`and substantially flexible substrate.
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`27.
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`(Currently amended) The stmcture of
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`Claim 32, further comprising:
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`a bottomside surface and a topside surface;
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`contacts formed on the bottomside surface and electrically connected to the
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`Vertical interconnect conductor; and
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`interconnects, contacts or circuits formed on or near the topside surface and
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`electrically connected to the Vertical interconnect conductors;
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`wherein the interconnects, contacts or circuits are electrically connected to the
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`contacts on the bottomside surface Via the Vertical interconnects.
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`28.
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`(Currently amended) The stmcture of
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`Claim 27, wherein at least a portion of the thin and substantially flexible substrate contains a
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`high density of the Vertical interconnect conductors.
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`29.
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`(Currently amended) The stmcture of
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`Claim 28, comprising an array of at least dimensions 8 x 8 of Vertical interconnect conduc-
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`30. (Currently amended) A thin and substantially flexible integrated circuit compris-
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`a thin, substantially flexible semiconductor layer of one piece comprising integrated
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`circuit devices; and
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`SAMSUNG ET AL. EXHIBIT 1019
`Page 6 of 9
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`a dielectric layer formed on the semiconductor layer and having a stress of about 5 x
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`108 dynes/cmz tensile or less.
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`31. (Currently amended) The thin and substantially flexible stmcture of
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`Claim 14, comprising:
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`a Vertical interconnect conductor extending Vertically through the semiconductor layer
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`and coupled to said circuitry; and
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`a Vertical dielectric insulator extending Vertically through the semiconductor layer and
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`around the interconnect conductor and having a stress of about 5 x 108 dynes/cmzEor
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`less.
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`32. (Currently amended) The thin and substantially flexible stmcture of
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`Claim 26, comprising:
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`a Vertical interconnect conductor extending Vertically through the semiconductor layer
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`and coupled to said circuitry; and
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`a Vertical dielectric insulator extending Vertically through the semiconductor layer and
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`around the interconnect conductor and having a stress of about 5 x 108 dynes/cmz tensile or
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`less.
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`SAMSUNG ET AL. EXHIBIT 1019
`Page 7 of 9
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`REMARKS
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`The prior Office Action has been carefully considered. In response thereto, the claims
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`have been amended as set forth above. Reconsideration in view of the foregoing amendments
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`and the present Rcmarks is rcspcctfully rcqucstcd.
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`The undersigned thanks Examiner Lam for courtesies extended during the interview
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`of 6/19/2013. The primary reference Parks was discussed, as well as proposed amendments to
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`the claims which have been made in the present amendment. Also discussed was the rejection
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`under Section 112, second paragraph and reasons why the language “substantially flexible”
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`as used in the claims a11d described iii the specif1catio11 is believed to be definite a11d in com-
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`pliance with Section 112.
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`All of the claims as originally presented recited in part a semiconductor layer. No
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`such layer is present in Parks. Rather, Parks describes a flat panel display containing an
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`ionizable gaseous display medium that is activated at an intersection of X—Y electrodes by
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`applying appropriate signals to those electrodes. N0 semiconductor layer is present. Hence
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`Parks cannot anticipate the present claims.
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`The electrodes of Parks are deposited 011 glass substrates a11d a dielectric layer is then
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`deposited over the electrodes. Note that the dielectric layer is quite specialized to the applica-
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`tion of a gas tube display in that the dielectric is required to be electron emissive (Parks col.
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`3, line 64). Moreover, the dielectric is a low compressive stress dielectric layer (col. 5, line
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`45). The claims have been amended herewith to recite a low tensile stress dielectric layer. As
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`discussed during the interview, support for low tensile stress (as opposed to compressive
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`stress) is found at col. 6 line 62 to col. 6, line 5 and elsewhere of U.S. Patent 5,354,695, in-
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`SAMSUNG ET AL. EXHIBIT 1019
`Page 8 of 9
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`corporated by reference at page 17 lines 5-15 of the present specification. The unsuitability of
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`compressive stress for achieving a substantially flexible circuit membrane is described also at
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`col. 6 line 62 to col. 6, line 5 of 5,354,695. Incorporation by reference is the same as if the
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`document incorporated were set forth verbatim in the specification. Hence, the word “tensile”
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`does in effect appear in the present specification by virtue of the incorporation by reference.
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`The present claims as amended are therefore believed to further distinguish over Parks.
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`With respect to the language “substantially flexible,” the meaning of this phrase as
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`used in the claims is clearly explained in the specification including, for example, at page 18,
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`li11es 1-3. As described i11 this passage, a semiconductor substrate is caused to be substantially
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`flexible by thinning it to 50 microns or less and polishing or smoothing the thinned semicon-
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`ductor substrate to relieve stress. The phrase “substantially flexible” is used in the claims
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`consistent with this description, which is unambiguous.
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`Accordingly, claims 1, 14, 26 and 30 are believed to patentably define over the cited
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`reference. Dependent claims 2-5, 7-13, 15-17, 29-25, 31 and 32 are also believed to add novel
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`and patentable subject matter to their respective independent claims. Withdrawal of the rejec-
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`tions and allowance of the claims is respectfully requested.
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`Dated: 6/20/2013
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`Respectfully submitted,
`/MichaelIUre/
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`Michael J. Ure, Reg. 33,089
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`SAMSUNG ET AL. EXHIBIT 1019
`Page 9 of 9