IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`
`Application
`Number:
`Filing or 371 (c)
`Date:
`
`12/414,749
`
`_
`31
`
`_
`2009
`
`03
`
`Customer
`Number:
`
`Status:
`
`Non Final Action
`Mailed
`
`Utility
`
`Status Date:
`
`01-13-2012
`
`Examiner
`Name:
`
`CHEN, XIAOLIANG
`
`Location:
`
`ELECTRONIC
`
`Group Art Unit: 2835
`
`Confirmation
`Number:
`
`1511
`
`Attorney
`Docket
`Number:
`Class I
`Subclass:
`First Named
`Inventor:
`
`090331.3DSVIII224.US
`
`361/760
`
`Glenn J. Leedy, Parkland,
`FL (US)
`
`Location
`Date:
`Earliest
`Publication
`No:
`Earliest
`Publication
`Date:
`Patent
`Number:
`Issue Date of
`Patent:
`
`US 2009-0230501 AI
`
`09-17-2009
`
`Title of Invention:
`
`Three dimensional structure memory
`
`Commissioner for Patents
`
`P.O. Box 1450
`
`Alexandria, VA 22313-14 50
`
`Sir:
`
`RESPONSE
`
`Responsive to the prior Office Action, please amend this application as follows.
`
`1
`
`Elm Exhibit 2136
`Samsung, Micron, SK hynix v. Elm
`IPR2016-00387
`
`

`
`REMARKS
`
`The prior Office Action has been carefully considered. Reconsideration in view of
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`the foregoing amendments and the present remarks is respectfully requested.
`
`The undersigned thanks Examiner Chen for courtesies extended during the
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`telephone interview of May 31,2012. The claims have been amended to recite in part a
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`substrate that "extends throughout at least a substantial portion of the area of an
`
`integrated circuit die." As discussed in greater detail below, no such feature, in
`
`combination with the other claimed features, is believed to be taught or suggested by the
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`cited references. Support for the amendment is also set forth.
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`New claims 53-58 have been added. Of these, independent claims 56, 57 and 58
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`correspond generally to claims 1, 8 and 21, respectively. The newly added claims recite
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`first and second circuit layers bonded to one another. In other respects, many of the
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`recited features are the same as features recited in claims 1, 8 and 21.
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`Compliance With 35 USC Sections 102 and 103
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`Claims 1-52 were rejected as being anticipated by or unpatentable over Leedy.
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`The claims have been amended to more clearly distinguish over the cited reference.
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`Reconsideration is respectfully requested.
`
`During the telephone interview, contrast was drawn between the present invention
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`as shown in Figure 1 d of the present specification, for example, and the primary reference
`
`(Leedy).
`
`In particular, in the Figure 8 stacking embodiment of Leedy (described in the
`
`paragraph bridging columns 15 and 16), the semiconductor substrate is removed. What
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`remains is a dielectric membrane (160a, 160b, 160c) having islands of semiconductor
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`material embedded therein. Semiconductor devices 162, 164, 166 are formed in the
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`islands of semiconductor material, and interconnections are made between the devices of
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`14
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`Elm Exhibit 2136, Page 2
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`

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`a given layer and between devices of different layers. The "islands of semiconductor"
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`having only one or a kw circuit devices, which goes to the intent of the invention which
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`is to isolate the electrical coupling between circuit devices. Note, for example, column
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`10, lines 9-18 ofLeedy:
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`The low stress dielectric membrane formed on the semiconductor
`substrate (along with interconnect metallization) becomes the only
`structural circuit membrane component after the semiconductor substrate
`portion of the membrane is etched or trenched into independent
`semiconductor devices. An additional layer (not shown) oflow stress
`dielectric over the interconnect metallization may be applied for
`passivation and to increase the thickness of the resulting membrane 20 to
`achieve a specific desired level of durability. (Emphasis added)
`
`In Figure 1d of the present specification, by contrast, circuit layers are formed
`
`from substrates 1 03a, 1 03b including a substrate made from a semiconductor wafer. As
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`now recited in independent claims 1 and 8, at least one of the substrates is "extends
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`throughout at least a substantial portion of the area of the integrated circuit die." That is,
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`throughout at least a substantial portion of the area of the integrated circuit die, there are
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`no "islands of semiconductor" whereby individual circuit devices or small groups of same
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`are isolated.
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`In the Leedy reference, by action of the etching or trenching described, what was
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`the semiconductor substrate ceases to be a substrate, i.e., a continuous stratum. Hence,
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`the feature of a substrate that is "extends throughout at least a substantial portion of the
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`area of the integrated circuit die" is absent from, and not taught or suggested by, Leedy.
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`The foregoing feature has not been recited in claim 21. However, claim 21 has
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`been amended to recite in part "at least one vertical conductive path that passes vertically
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`through at least one of the first substrate and the second substrate and is insulated from
`the substrate by a non-conductive material having a stress of 5 x 108 dynes/cm2 or less."
`
`No such feature is believed to be taught or suggested by Leedy. In particular, in Leedy,
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`vertical interconnects pass through a dielectric matrix that surrounds the multitude of
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`device islands. The vertical interconnects do not pass through a semiconductor substrate
`
`nor are they insulated from that substrate.
`
`15
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`Elm Exhibit 2136, Page 3
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`

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`Accordingly, claims 1-52 are believed to patentably define over Leedy.
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`Compliance With 35 USC Sections 112 Second Paragraph
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`The Office Action took the position that the addition of the word
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`"monocrystalline" to the claims introduced new matter. Applicant respectfully disagrees.
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`Nevertheless, "mono crystalline" has been deleted.
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`In the present amendment, the claims have been amended to recite in part a
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`substrate that extends throughout a substantial portion of the area of an integrated circuit
`
`die. Such addition is believed to be clearly supported by the specification. The
`
`specification makes clear that in one embodiment, a thick, processed semiconductor
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`wafer of a standard, well-known type (for example 500 microns thick) is thinned to 50
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`microns or less in thickness (Method A, 3DS Memory Device Fabrication Sequence,
`
`specification pages 14-17; specification, page 12, first full paragraph). The thick
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`semiconductor wafer clearly extends throughout the area of an integrated circuit die-it is
`
`a single piece of material. When it is thinned to 50 microns, it remains a single piece of
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`material. This nature of the thinned semiconductor substrates may be observed, for
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`example, in Figure 1d with respect to substrates 103a, 103b and 103c.
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`Compliance With 35 USC Section 1 OJ and Section 112 Second Paragraph
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`Claims 38, 40 and 42 were object to as being duplicates. Claims 41, 43, and 45
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`were likewise objected to as being duplicates. The present amendments eliminate
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`duplication by changing dependencies and canceling selected claims.
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`Although not mentioned in the Office Action, in the interview, the Examiner
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`raised a question as to whether limitations in an apparatus claim directed to process steps
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`previously performed on elements of the apparatus claim (for example "polished,"
`
`"thinned") were proper. Incidentally, the word "polished" occurs in the claims of
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`upwards of8,000 patents, and the word "thinned" occurs in the claims ofupwards of
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`3,000 patents.
`
`The present claims are very different than the kind of impermissible "hybrid"
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`claims that case law disallows. That type of disallowed hybrid claim sets forth both an
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`16
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`Elm Exhibit 2136, Page 4
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`

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`apparatus and a method of using the apparatus. The present claims, on the other hand,
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`merely specify particulars of the claim elements of the apparatus. Applicant is not aware
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`of any case that forbids an apparatus claim from specifying elements partly in terms of
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`preparatory steps carried out on those elements.
`
`To take a hypothetical example, the element "a sintered brake pad" requires that
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`the brake pad have been sintered. (Not surprisingly, the word "sintered" occurs in the
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`claims of numerous issued patents over the period of 1976 to 2012--16,647 patents, to be
`
`exact. It may be expected to occur in the claims of equally numerous patents prior to
`
`1976.) Sintering is a process in which a powdered material is made to coalesce into a
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`solid or porous mass by heating it (and usually also compressing it) without liquefaction.
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`This type of claiming has long been allowed and is clearly distinguishable from recent
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`cases addressing hybrid claims, which have never been allowed.
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`Accordingly, withdrawal of the rejections and allowance of the claims is
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`respectfully requested.
`
`Respectfully submitted,
`
`/Michaelrure/
`
`Michael J. Ure, Reg. 33,089
`
`Dated: 7/2/2012
`
`17
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`Elm Exhibit 2136, Page 5