`gate and field oxide edges in As-implanted S/D regions can
`be responsible for electrical leakage. 16 These dislocations
`have been identified as vacancy-type half loops originating
`during the recrystallization of amorphized S/D regions. 6 It
`is well known that metal precipitates in dislocations exac-
`
`film also affect the extent of crystalline damage, 2'~'1~'1~ and
`a low temperature (450~
`preanneal has been proposed to
`reduce residual damage in B-implanted areas.I6 The condi-
`tion of the implanted surface (bare silicon or oxide capped)
`during anneal was investigated here to test the possibility
`of forming silicon lattice vacancies that reduce defect for-
`mation. PECVD and LPCVD oxides were also investigated
`as implant screening films. St-deficient screening films
`such as PECVD S i Q may mitigate dislocation formation if
`high temperature interracial reactions lead to the creation
`of Si lattice vacancies.
`
`Factor
`
`Name
`
`Source/Drain Dislocations and Electrical Leakage in Titanium-Salicided CMOS Integrated Circuits R. L. Guldi* Texas Instruments Incorporated, Logic Operations, Dallas, Texas 75265 ABSTRACT This investigation explored the dependencies of source/drain (S/D) dislocation density, test circuit quiescent current, and junction leakage on processing variables in a titanium-salicided submicron CMOS process using Taguchi methodology. The primary factor affecting both gate and field edge dislocation densities was the type of polysilicon-to-metal dielectric (PMD) film. PECVD oxide PMD leads to lower defect densities than LPCVD oxides. Primary factor affecting quiescent current (lecQ) include PMD film type and S/D implant conditions. The observation of both lower dislocation density and lower IccQ leakage for similar PMD film type is taken as strong evidence linking dislocations with device electrical performance.
`The process variables in the current investigation (Table I) were expected to affect dislocation formation and propagation as well as junction leakage current. For exam- ple, the use of plasma-enhanced chemical vapor deposition (PECVD) oxide as a PMD layer has been shown to result in reduced S/D dislocation density. 9 Therefore, a gate sidewall spacer oxide deposited by PECVD may be advantageous in regard to dislocation formation when compared to a low- pressure chemical vapor deposition (LPCVD) oxide. Simi- larly, optimized titanium salicide thickness is important for reducing junction leakage and eliminating residual crys- talline damage from implant and annealJ ~ Implant parameters such as species, dose, energy, and screening
`erbate junction leakage] ,8 A recent study indicates that leakage may also result from the propagation of localized dislocations into extended defectsJ This investigation explored the dependencies of S/D dis- location density, test circuit quiescent current, and junc- tion leakage on processing variables in a titanium-sali- cided submicron complementary metal oxide semicon- ductor (CMOS) process using Taguchi methodology. The relationship between physical defects and electrical leak- age is explored by identifying the factors that control dislo- cation density and correlating them with those that control Ice e. This approach is taken because we observe disloca- tions in device active regions that do not fail electrically. Hence, we use lecQ as a measurement of leakage over a large area involving hundreds of thousands of cells. This proce- dure provides a good statistical technique for sampling electrical leakage over a large area and numerically allo- cating the leakage to different physical phenomena. We supplement that technique by measuring junction leakage on isolated individual test structures fabricated adj aeent to test circuits. * Electrochemical Society Active Member. Table I. List of Taguchi variables investigated.
`J. Electrochem. Soc., Vol. 141, No. 7, July 1994 (cid:14)9 The Electrochemical Society, Inc. Split identification A B C D E F G H Sidewall oxide PECVD X X X X LPCVD Screen oxide PECVD X X LPCVD X X S/D dose/energy Low X X
`
`Taguchi variables
`
`Reason
`
`1 PECVD vs. LPCVD TEOS a sidewall oxide Differential stress
`adjacent to gate
`conductor
`Silicon to SiO2
`interfacial
`reactions
`
`LPCVD TEOS screen oxide
`
`2 PECVD vs.
`
`3 n + and p+ S/D dose and energy Implant damage As + (i (cid:141) I0 Is, 120 keY vs. 3 x I0 Is, 150 keV) B + (2 x 101% 15 keVvs. 3 (cid:141) I0 Is 20 keV) 4 S/D surface at anneal (bare vs. SiO2) Silicon vacancies 5 S/D preanneal temperature (450 vs. 600~ Solid-phase epitaxy
`
`6 Titanium thickness (85 vs.
`
`100 mn)
`
`7 PECVD vs.
`
`LPCVD TEOS PMD
`
`Stress from TiSi2
`Damage consump-
`tion by TiSi2
`Differential stress
`at steps
`
`n + S/D implant consisted of a 4 x 1014, 100 keV phosphorus im-
`plant in addition to the arsenic implant described as a Taguchi
`variable. Phosphorus implant conditions were identical for all
`splits.
`a Tetraethylorthosilicate.
`
`2
`
`3
`
`4
`
`5
`
`7
`
`As= i X I0 ~ , 1 2 0 k e v
`P = 4 x 1014 , 100keV
`B = 2 X 10 l~,15keV
`High
`As=3 x l 0 ts , 150keV
`1014
`P = 4 • 1015, ' 100 keV
`B = 3 x
`20 keV
`S/D anneal surface
`Bare silicon
`Oxide present
`S/D anneal
`450~ preanneal
`600~ preanneal
`TiSi
`85 nm Ti
`100 nm Ti
`PMD
`PECVD
`LPCVD
`
`X X
`
`X
`
`X
`
`X
`
`X
`
`X
`
`X
`
`X
`
`X
`
`X X
`
`X X
`
`X
`
`X
`
`X
`
`X
`
`x x x X x x x x x x x x x x x x x x x x x x x x x x x x 1957
`
`
`
`130.203.136.75Downloaded on 2016-09-17 to IP
`
` address. Redistribution subject to ECS terms of use (see
`
`ecsdl.org/site/terms_use
`
`) unless CC License in place (see abstract).(cid:160)
`
`SAMSUNG ET AL. EXHIBIT 1090
`Samsung et al. v. Elm 3DS Innovations, LLC
`IPR2016-00387
`
`Page 1 of 7
`
`Table II. Taguchi matrix summary.
`6
`
`
`1958 J. Electrochem. Soc., Vol. 141, No. 7, July 1994 (cid:14)9 The Electrochemical Society, ~nc. Fig. 1. (a) Top-angled SEM view and {b and c) cross-sectional views of gate edge dislocations near fieldboundary after Schlm- mel etching. Fig. 2. Top view SEMs of field edge dislocations after Schimmel etching. Experimental
`I I i I i n-Well p-Well n-Well p-Well Field Edge Gate Edge Fig. 3. Histogram of dislocation density vs. dislocation type show- ing distributions at n-well and p-well field edges and n-well and p-well gate edges, respectively. dure corresponded to those found using cross-sectional transmission electron microscopy (XTEM), always occur- ring at gate or field edges. Test circuit quiescent leakage current at room tempera- ture was determined by setting register files, input latches, and output buffers to known high and low states, measur- ing ICCQ, inverting these known states, and then remeasur- ing. Checkerboard (0-1-0-1) loading of the register file pro- vided greatest electrical stress between elements. Meas- urements were taken on a Polaris very large scale inte- grated (VLSI) tester made by Megatest Corp. We measured diode leakage currents on a Keithley Yield- max 450 automatic test station. Arrays of area devices, fin- ger devices, and gate diodes were analyzed. Results Dislocation density.--Schimmel
`
`E= 1.o
`
`~ 0.5
`
`~ 0 [] "i"1 [] 5 Lots A and B (Aggregated) p []
`
`-~
`
`This investigation analyzed test devices using a Taguchi
`L8 matrix (Table II) to identify the factors responsible for
`controlling gate and field edge dislocation density, overall
`test circuit quiescent leakage current, and diode leakage
`
`currents in n-well and p-well. The fabrication process em- ployed localized oxidation of silicon (LOCOS) isolation and Ti-salicided polysi]icon and active areas. Two full Taguchi lots were processed with four wafers per split. Fol- lowing electrical testing, wafers for defect study were deprocessed to bare silicon before Schimmel etching ~7 to bring out dislocations. Defect-etching methods have been described previously. 9 Defect densities were counted using scanning electron microscopic (SEM) photomicro- graphs. Various active area patterns were studied exten- sively using SEM to select a particular set of structures most prone to exhibit dislocations. These structures were then taken as a standard area for counting defects so we may compare different wafers and different process condi- tions. We observed that the defects revealed by this proce-
`
`1.5
`
`,
`
`,
`
`etching revealed two
`types of dislocations: (i) gate edge defects protruding from
`field
`S/D regions beneath sidewall oxide (Fig. 1) and (it)
`edge defects protruding into field oxide from edges of S/D
`regions (Fig. 2). Field edge dislocations are layout de-
`pendent, typically occurring at points where the boundary
`between active area and field is curved? Both types of dis-
`locations originate when the amorphous implanted region
`
`recrystallizes during anneal, leaving incipient crystalline damage that is propagated into extended dislocations by stress.5,6,~8,19 Figure 3 shows a histogram of the distribution of defects for different dislocation types. The distributions of field edge dislocations in both wells are remarkably similar, but gate edge dislocations are significantly more numerous in n-well than in p-well. The factor effects plot and Anova summary for n-well gate edge dislocation density are shown in Fig. 4a. These represent analysis of aggregated data from both lots. Nu- merical entries under each factor along the x-axis of Fig. 4a specify the factor effect, which is the difference between the mean values with that particular factor set
`
`
`
`130.203.136.75Downloaded on 2016-09-17 to IP
`
`
`
`ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see
`
`) unless CC License in place (see abstract).(cid:160)
`
`Page 2 of 7
`
`
`
`0.6
`
`55
`
`0.2
`
`<~
`~- 0.2
`
`'~ 0.2
`
`- - - - " ~ -
`
`.
`
`.
`
`.
`
`.
`
`
`
`- ~ .
`
`.
`
`.
`
`.
`
`.
`
`.
`
`
`
`0.0
`
`I
`
`I
`
`I
`
`!
`
`0,2
`
`J. Electrochem. Soc., Vol. 141, No. 7, July 1994 (cid:14)9 The Electrochemical Society, Inc. 1959 1.0 ~" 0.8 ~
`0.0 I i SWOX ScrnOx 0.19 -0.19 Lot A and B (Aggregated) -t I I I I I Dose S/DOx PrAnTmp Ti PMD 0.03 0.07 0.19 -0.27 -0.74 Factor Name/Effect Value (a) 0.6 D 0.4
`0.0 r SWOX 0.09 Lots A and B (Aggregated)
`, . / \
`...... \ \
`I I I I I I ScrnOx Dose S/DOx PrAnTmp Ti PMD 0.03 0.10 -0.20 -0.01 -0.18 -0,23 Factor NametEffect Value Fig. 6. Factor effects plot for p-well field edge dislocations. Mini- mum hurdle is 0.09. 0.4 / I
`I SWOX ScrnOx Dose S/DOx PrAnTmp Ti PMD 0.08 -0.03 0.13 0.03 -0.08 -0,19 -0.24 Factor Name/Effect Value (b) Fig. 4. Factor effectsplot for (a) n-well gate edge dislocations and (b) n-well field edge dislocations. Lots A and B are aggregated. Minimum hurdles, or 2 - cr confidence level, are 0.20 and 0.08, respectively. 1.2 ~" 1.0 ~0.8 i o.6 0.4 0
`Lot A 0.0 I SWOX 0.32 I I I ! 1 I ScrnOx Dose S/DOx PrAnTmp Ti PMD -0.24 0.05 0.06 0.24 - -0.38 -0,94 Factor Name/Effect Vaiue 1.o ~
`
`temperature PECVD oxide results in a reduced density of
`extended dislocations compared to the case of LPCVD
`oxide. One reaches the same conclusion if the data from
`each lot are analyzed separately, as shown in Fig. 5. The
`influence of the PMD film on the control of dislocation
`density is remarkable. For example, the percentage of n-
`
`0.8
`
`i - - / \
`
`0.6 0.4 0.2 Lot B
`0"0SW / O ' I I I I , X ScmOx Dose S/DOx PrAnTmp Ti PMD 0.07 -0.15 0.01 0.09 0.15 -0.17 -0.55 Factor Name/Effect Value Fig. 5. Factor effects plot for n-well gate edge dislocations (lots A and B separately). Minimum hurdles are 0.16 and 0.13 for lots A and B, respectively.
`
`high or low. The primary Taguehi factor affecting the gate
`edge dislocation density is the type of PMD film. A low
`130.203.136.75Downloaded on 2016-09-17 to IP
`
`ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see
`
`p Field edge
`
`>99
`71
`PMD film
`>95
`43
`PMD film
`>95
`25
`Titanium thickness
`>95
`34
`PMD film
`>95
`26
`S/D surface (anneal)
`>90
`19
`Titanium thickness
`
`) unless CC License in place (see abstract).(cid:160)
`
`Table IlL Summary of important control parameters for dislocation density.
`
`Well Dislocation
`type
`type
`
`Control
`factor
`
`PC variance Confidence
`factor (%)
`level (%)
`
`n Gate edge
`n Field edge
`
`Page 3 of 7
`
`0.4
`Fig. 7. Histograms of log (IccQ) for lots A and B.
`
`
`1960 J. Electrochem. Soc., Vol. 141, No. 7, July 1994 (cid:14)9 The Electrochemical Society, Inc. -4.'{ -4.3 -4.5 -4.7 -4.9 -5,1 Lot A
`- Entire ICC Q Range i I i i 1 I I SWOX ScrnOx Dose S/DOx PrAnTmp Ti PMD 0.12 -0.13 -0.52 -0.04 0.00 0.02 -0.39 Factor Name/Effect Value Fig. 8. Factor effects plot for/cce-mean (lot A). Minimum hurdle is 0.09. "-5
`0.0 1.0 0.8 0.6 0.4 0"2SW~X -0.04 Lot A - Entire ICC Q Range
`
`-/-- \
`
`%
`2
`g
`
`- o
`
`"~ --4.9
`_J
`-5.1
`
`~5~ 1 k
`
`-5.3 I I I I | i i I SWOX ScmOx Dose S/DOx PrAnTmp Ti PMD 0.19 -0.16 -0.58 0.03 -0.02 -0.08 -0.07 Factor Name/Effect Value -4.3 | Lot B (Low Ice O Regime Only; Ice Q < 400 ~A) I I -49 I"
`/, , , , , , -5.3 SWOX ScrnOx Dose S/DOx PrAnTmp Ti PMD 0.29 -0.21 -0.38 -0.12 0.08 0.03 -0.03 Factor Name/Effect Value Fig. 11. Factor effects plot far IcQa-mean (lower Icca range, IccQ < 400 A). Minimum hurdles are 0.08 and 0.10 for lots A and B, re- spectively. thinner salicide is consistent with the high stress level of titanium salieide, which is an order of magnitude greater than stresses associated with grown or deposited oxides. 2~ Analysis of p-well field dislocation density (Fig. 6) again reveals that PMD film type is the primary control variable, with PECVD films showing lower defect density than LPCVD films. For p-well field edge dislocations, however, a secondary control factor is the condition of the S/D sur- Table IV. Effects summary for quiescent circuit (IcQQ).
`
`I I I I I I ScrnOx Dose StDOx PrAnTmp Ti PMD 0.04 0.10 -0.12 0.01 0.18 -0.45 Factor Name/Effect Value Fig. 10. Factor effects plot for IccQ-Cr (lot A). Minimum hurdle is 0.08. (3 Ji Low S/D Dose and Energy High S/D Dose and Energy AS + 1 x 1015, 120 keV 3 (cid:141) 1015, 150 keV P+ 4 x 10 TM, 100 keV 4 (cid:141) 10 TM, 100 keV B + 2 x 10 is, 15 keV 3 (cid:141) 10 ~5, 20 keY (a) "-5 O O o _J F I I I ] PECVD PMD LPCVD TEOS PMD (b) Fig. 9. Histograms of log (IccQ) comparing distributions for different process conditions: (a) S/D implant dose and energy conditions and (b) different types of PMD.
`control factors are observed, PMD film type and titanium thickness, accounting for 43 and 25% of the variation, re- spectively. The conditions that promote lower dislocation density in n-wells are PECVD oxide PMD and thin tita- nium. The observation of reduced dislocation density for I -4.7 _ _ -
`
`Lot
`
`Parameter
`
`Factor
`
`Percent
`Low XccQ Effect variation
`(log 1~
`condition
`(log 1~
`
`Low
`PECVD
`PECVD
`
`Entire IccQ distribution
`A Average fCCQ S/D dose and
`energy
`A Average Icq Q Poly-to-metal
`dielectric
`~CQQ sigma
`A
`Poly-to-metal
`dielectric
`Low ~CQQ distribution-Log (/CQQ) < --3.5
`A Average ICQ Q S/D dose and
`Low
`energy
`B Average ~CQQ S/D dose and
`Low
`energy
`
`-0.52
`-0.39
`-0.45
`
`-0.58
`-0.38
`
`58
`33
`76
`
`82
`47
`
`Structure
`type
`
`Number of
`units
`
`Size
`(~m)
`
`Area
`(~m ~)
`
`t~erimeter
`(~m)
`
`well gate edge dislocation density attributable to the PMD
`film type is 68 and 75% for the two lots, respectively. The
`beneficial effects of PECVD oxide PMD on dislocations
`have been attributed to reduced differential stress in re-
`gions where the PMD crosses topological steps. 9
`In n-well field edge dislocations (Fig. 4b), two primary
`
`
`
`130.203.136.75Downloaded on 2016-09-17 to IP
`
`760
`28,023
`100 • 280
`1 cell
`Area diode
`10,140
`6,338
`2.5 x 2.5
`1,014 islands
`Island diode
`5,600
`28,174
`10 • 280
`10 fingers
`Finger diode
`ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see
`
`) unless CC License in place (see abstract).(cid:160)
`
`Page 4 of 7
`
`Table V. Test circuit diode leakage structures.
`
`
`J. Electrochem. Soc., Vol. 141, No. 7, July 1994 (cid:14)9 The Electrochemical Society, Inc. Table VI. Effects summary for n § diode leakage. 1961
`
`Diode
`type
`
`Finger
`
`Island
`Area
`Gated ~
`
`Lot
`
`Factor
`
`Low leakage
`condition
`
`Effect
`(log ~~
`
`Percent variation
`(log ~~
`
`A
`B
`B
`A
`B
`A
`B
`A
`B
`
`PMD
`PMD
`Sidewall oxide
`Poly-metal dielectric
`S/D preanneal temperature
`PMD
`Titanium thickness
`Titanium thickness
`Screen oxide
`
`PECVD
`PECVD
`PECVD
`PECVD
`450~
`PECVD
`85 nm
`85 nm
`PECVD
`
`- 0.1
`-0.1
`- 0.1
`- 0.2
`-0.1
`- 0.2
`-0.1
`- 0.2
`-0.1
`
`45
`19
`19
`34
`24
`59
`33
`20
`55
`
`Gated diode leakage is measured under accumulation.
`
`Diode
`type
`
`Finger
`
`Lot
`
`A
`A
`B
`B
`
`Factor
`
`Sidewall oxide
`S/D dose and energy
`S/D dose and energy
`Sidewall oxide
`
`Low leakage
`condition
`
`LPCVD TEOS
`Low
`Low
`LPCVD TEOS
`
`Effect
`(log TM)
`
`0.9
`-0.8
`-0.7
`0.7
`
`Percent variation
`(log 1~
`
`56
`36
`47
`40
`
`I
`(log ~~
`
`- 10.9
`
`- 11.1
`- 11.0
`- 11.1
`
`I
`(log 1~
`
`- 8.9
`
`Island A Titanium thickness 85 nm - 0.7 40 - I 0.6 B S/D dose and energy High 2.2 27 B S/D preanneal temperature 450~ -2.2 25 B Titanium thickness 85 nm -2.0 20 Area A S/D dose and energy Low - 0.2 46 - 1 I.I
`
`Gated ~
`
`B
`B
`A
`B
`B
`
`Titanium thickness
`Screen oxide
`S/D dose and energy
`Titanium thickness
`Screen oxide
`
`85 nm
`PECVD
`Low
`85 nm
`PECVD
`
`-0.6
`- 0.5
`- 0.1
`- 0.2
`- 0.1
`
`45
`26
`47
`35
`23
`
`- 11.3
`
`Gated diode leakage is measured under accumulation.
`
`face during anneal, with a bare surface giving fewer dislo-
`cations than an oxide-capped surface. It appears that a
`silicon surface with native oxide may provide a source of
`silicon lattice vacancies that mitigate implant damage. The
`
`volatilization of SiO gas from a thin native oxide on silicon in an oxygen-deficient atmosphere has been reported for temperatures as low as 900~ 2~ the loss of SiO from native oxide leading to silicon-deficient SiO= may lead to an inter- action at the oxide-to-silicon interface that produces sili- con vacancies. Another secondary factor for controlling p-well field edge dislocations is the titanium thickness. Again, thinner titanium results in fewer dislocations, in agreement with results reported previously. I~ Table III summarizes the major control factors for each dislocation type. PMD film type is important for con- trolling all three types of dislocations, while the titanium thickness plays a smaller role at field oxide edges and the condition of the S/D surface during anneal is influential at p-well field edges. At first glance, it is somewhat surprising that As-implant conditions (dose/energy) do not play a ma- jor role in controlling dislocation density, since previous studies have observed dose-related effectsJ TM This appar- ent discrepancy arises because, for the case of dual As and P S/D implants used in the current investigation, the P implant alone is sufficient to amorphize silicon, leading to incipient recrystallization damage. 9 Quiescent leakage current--Histograms
`
`current mechanism in lot B is not correlated to dislocations, which are present at the same levels in both lots. On the basis of the above observations, a two-pronged approach was taken to circumvent the difficulties encoun- tered from the bimodal distribution. First, the data from lot A were used to represent typical IccQ behavior over the complete IeeQ range. Then, to understand the lower IccQ regime, data from both lots were analyzed separately, and the important Taguehi factors for this regime are common to both lots. Analysis of entire IcQ Q distribution-mean IccQ value.--Fig-
`
`ure 8 shows the factor effects plot and Anova summary for
`the IccQ-mean of lot A. Primary control factors are S/D
`implant dose/energy and PMD film type, which account for
`58 and 33 %, respectively, of the observed variation. Lowest
`leakage occurs for reduced S/D dose and energy as well as
`for PECVD oxide as the PMD layer. The impact of S/D dose
`and energy, as well as PMD oxide film type, is illustrated by
`Fig. 9, which shows that the main part of the Iccq distribu-
`tion is shifted to lower values by using low dose and energy,
`while the higher current events are virtually eliminated by
`using PECVD oxide PMD. The observation of both lower
`dislocation density and lower Iccq leakage with similar
`PMD film type is taken as strong evidence linking disloca-
`tions with device electrical performance.
`Several possibilities exist for the role of the S/D implant
`in affecting leakage, including (ill electrical charging ef- fects, (if)
`junction profile effects, and (iii)
`physical damage
`related to dislocations. Analysis of gate oxide integrity
`(GOI) data provides no evidence of unusual gate oxide
`weakening normally associated with electrical charging.
`
`Junction profile effects, however, may be important be- cause S/D dose and energy are primary Taguchi factors controlling p+ diode leakage (see section on Diode leakage). The transistor characteristics, however, are not apprecia- bly affected by the choice of implant dose and energy within the range investigated. There also may be an inter- action between junction depth and dislocation electrical activity. More specifically, although the density of disloca- tions is not impacted by implant conditions, the electrical
`
`of IccQ distribu-
`tions in lots A and B show distinctively different character
`(Fig. 7). The majority of IccQ values in lot A fall into the low
`leakage regime, while lot B exhibits a bimodal/CCQ distri-
`bution with an anomalous secondary peak at values of IecQ
`above 400 ~A. Not surprisingly, separate Taguchi analyses
`on a by-lot basis indicate inconsistency between the impor-
`tant Taguchi factors found for each lot. For this reason, we
`believe that the two leakage current peaks in lot B are af-
`fected by different physical mechanisms. For example,
`physical particles may be responsible for high leakage
`events in lot B. We further surmised that the higher leakage
`130.203.136.75Downloaded on 2016-09-17 to IP
`
`ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see
`
`
`
`) unless CC License in place (see abstract).(cid:160)
`
`Page 5 of 7
`
`Table VII. Effects summary for p§ diode leakage.
`
`
`1962 J. Electrochem. Soc., Vol. 141, No. 7, July 1994 (cid:14)9 The Electrochemical Society, Inc. activity of the dislocations may be. For example, it is widely accepted that lower implant dose and energy reduce the extent of physical damage in the silicon and lead to efficient defect annealing. Dislocations arising from these conditions may be electrically weaker than those originat- ing from more heavily damaged conditions. Analysis of entire IcQQ distribution-standard deviation of IcvQ.--The
`
`standard deviation of Iccq in lot A was analyzed
`to identify factors responsible for the range of leakage cur-
`rents. The factor effects plot for IccQ-~ (Fig. 10) indicates
`that PMD film type is the primary factor responsible for
`IccQ variation, contributing 76 % of the variation. The coin-
`cidence of PMD film type as the primary factor controlling
`both dislocation density and IccQ leakage is strong evidence
`linking dislocations and electrical leakage.
`excluding high
`current leakage events (IccQ > 400 p~A) from the analysis, we
`may discern the physical factors responsible for low level
`leakage. In this analysis, data were included from both lots
`A and B because the IccQ range of interest excluded the high
`Iccq leakage mode of lot B. Such a methodology is impor-
`tant because it points to procedures for further reducing
`Iccq once the cause of high leakage events is eliminated.
`Anova summaries for Iccq in the lower Iccq range
`(<400 ~A) are shown in Fig. 11. The most important control
`factor for ICCQ in this range is S/D implant condition, which
`accounts for 82 and 47%, respectively, of the variation in
`the two lots. Again, reduced dose and energy lead to lower
`IccQ. Quiescent current in the IccQ regime appears to be
`
`884 18 LoA O -J -9.0 -9.2 9.4 -9.6 SWOX ScrnOx Dose S/DOx PrAnTmp Ti PMD 0.94 0.07 -0.76 -0.09 0.18 0.03 -0.21 Factor Name/Effect Value -8.4 -8.6 -8.8 2 -9.0 -9,2 -9.3 i SWOX 0.65 Lot B I I I I I i ScrnOx Dose S/DOx PrAnTmp Ti PMD 0.02 -0.70 -0.28 -0.12 0.11 -0.12 Factor Name/Effect VaJue Fig. 12. Factor effects plot for p+ finger diode leaka~le. Minimum hurdles are 0.15 and 0.14 for lots A and B, respectively. dominated by p* finger diode leakage, which is also con- trolled primarily by S/D dose and energy (see section on Diode leakage). Dislocations, per se, appear to have no more than a minor effect on IccQ in this range. Summary ofIcQQ leakage.--As shown in Table IV, PMD film type and S/D dose and energy are impotant factors for con- trolling IccQ leakage. Low leakage conditions result from using PECVD oxides as PMD and from low S/D dose/en- ergy. PMD film effects are observed when analyzing either the mean or the standard deviation of ~CCQ over the entire IccQ range, while S/D implant effects are found when ana- lyzing either the average ICCQ for the entire ICCQ range or the average IccQ for the lower IccQ range by itself. The coinci- dence of PMD film type as the primary factor controlling both dislocation density and IccQ is strong evidence linking dislocations and electrical leakage. Diode leakage.--Investigation of four types of diode structures allowed the exploration of various types of leak- age effects (Table V). Area diodes are large area rectangular diodes that emphasize leakage unrelated to peripheral ef- fects. Island diodes comprise a parallel collection of small square-shaped diodes that emphasize leakage either at the perimeter of active area or as a result of contacts. Finger diodes are polysilicon gated structures that are strongly affected by electrical leakage along gate edges. Peripheral leakage may be modulated by biasing the polysilicon elec- trode in a gated diode configuration. Leakage currents for n § diodes , in general, are lower than for p+ diodes and are relatively independent of any Taguchi factor (see the Effect column of Table VI). Therefore, it is prudent to focus diode leakage studies on p+ junctions. As shown in Table VII, the p+ finger diode structure ex- hibits the highest leakage current. Taguchi analysis indi- cates that this structure is affected primarily by sidewall spacer oxide type and by S/D dose and energy (Fig. 12). The observation that PECVD sidewall spacers cause increased leakage compared to LPCVD spacers is not surprising con- sidering the nonstoichiometry and atomic bonding in these low temperature deposited oxides. Lower S/D implant dose and energy also result in reduced leakage. The lack of a strong dependence of p+ diode current on PMD film type in these tests may result from the low level of metallic con- tamination in these wafers ?.8 If a moderate level of metallic contamination causes only a small fraction of the most sus- ceptible diodes to have high leakage, then it is not surpris- ing that a relatively low level sampling of diode leakages fails to reveal the same dependence on processing factors as found for dislocation density. This correlation may become more apparent if the level of metallic contamination during manufacturing increases. Additional studies employing statistically significant diode structures in different layout configurations are the subject of a future investigation. Ob- viously, low dislocation conditions are desirable to protect device yield and integrity in such an event. Summary PMD film type is the primary Taguehi factor affecting both gate and field edge dislocation densities in n- and p-wells of titanium-salicided CN[OS devices. A low tem- perature PECVD oxide results in a reduced density of ex- tended dislocations compared to LPCVD oxide. A sec- ondary Taguchi factor affecting gate edge dislocations is the as-deposited titanium thickness. However, this factor is significantly more important at field edges than at gate edges. The condition of the S/D surface during anneal also affects field edge dislocation density, with a bare surface giving fewer defects than an oxide-capped surface. This phenomenon may arise from a tendency for a surface with native oxide to be a better source of lattice vacancies than an oxide-capped surface. Factors responsible for controlling the average value of quiescent leakage current in the high leakage regime in- cluded S/D dose and energy and the type of PMD film. PMD film type was also the primary factor responsible for IccQ variation (Iccq standard deviation), contributing 76%
`
`
`
`130.203.136.75Downloaded on 2016-09-17 to IP
`
`
`
`ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see
`
`) unless CC License in place (see abstract).(cid:160)
`
`Page 6 of 7
`
`Analysis of lower IccQ distribution.--By
`
`
`J. Etectrochem. Soc., Vol. 141, No. 7, July 1994 (cid:14)9 The Electrochemical Society, Inc. 1963
`
`of the variation. The coincidence of PMD film type as being
`the primary factor controlling both dislocation density and
`IccQ leakage is taken as strong evidence linking dislocations
`and electrical leakage.
`The most prominent type of diode leakage occurs for p*
`finger structures. These are affected principally by sidewall
`spacer film type and S/D dose and energy, factors unrelated
`to dislocation control. This is taken to mean that for the low
`level metallic contamination levels here, any effect of elec-
`trically active dislocations in producing high diode leakage
`is a rare event that requires observation of large statistical
`samples.
`
`The author thanks Bob Eklund and Victor Hegemann for
`stimulating discussions during the course of this work; Joel
`Graber and Andrew Chen for IccQ measurements; and
`David Spratt, Bob Eklund, and Bill Bruncke for manu-
`script critique. The author also appreciates the technical
`assistance of Barbara Johnson and Jim Brewton in sample
`preparation, as we]] as the assistance in preparing the
`manuscript provided by Carolyn Banks, Mary Reagan,
`Larry Norton, and Sara Kay Powers.
`
`Manuscript submitted July 19, 1993; revised manuscript
`received Feb. 23, 1994. This paper was presented at the
`European Symposium of the Society, Grenoble, France,
`Sept. 17, 1993.
`
`REFERENCES i. S. Onishi, A. Ayukawa, K. Tanaka, and K. Sakiyama, Tech. Dig. of IEEE/IRPS '90,
`265 (1990).
`2. S. Onishi, A. Ayukawa, and K. Sakiyama, Tech. Dig. of IEEE/IRPS '91,
`255 (1991).
`3. S. Onishi, A. Ayukawa, K. Tanaka, and K. Sakiyama,
`138, 1439 (1991).
`4. J. Sweeney, N. Herr, P. Schani, R. Mauntel, H. Mendez,
`P. Fejes, and L. C. Parrillo, IEDM Tech. Dig.,
`230
`(1988).
`5. H. Cerva and K. H. Kusters, J. Appl. Phys.,
`66, 4723
`(1989).
`
`140, 780
`
`6. H. Cerva and W. Bergholz, This Journal,
`(1993).
`7. B. O. Kolbesen, W. Bergholz, H. Cerva, B. Fiegl, E Gels-
`doff, and G. Zoth, Nucl. Instrum. Methods,
`B55, 124
`8. B. O. Kolbesen, W. Bergholz, H. Cerva, B. Fiegl, F. Gels-
`dorf, H. Wendt, and G. Zoth, Inst. Phys. Conf. Set,
`104, 421 (1989).
`9. R. L. Guldi, This Journal,
`140, 3650 (1993).
`10. D. S. Wen, P. L. Smith, C. M. Osburn, and G. A.
`Rozgonyi, Appl. Phys. Lett.,
`51, 1182 (1987).
`11. K. Maex, R. DeKeersmaecker, C. Claeys, J. Vanhelle-
`mont, and P. F. A. Alkemade, Semiconductor Silicon 1986,
`H. R. Huff, T. Abe, and B. Kolbesen, Editors,
`PV 86-4, p. 346, The Electrochemical Society Pro-
`ceedings Series, Pennington, NJ (1986).
`12. W. Lur, J. Y. Cheng, and L. J. Chen, Mat. Res. Soc. Symp. Proc.,
`147, 33 (1989).
`13. J. Amano, K. Nauka, M. P Scott, and J. E. Turner, AppI. Phys. Lett.,
`49, 737 (1986).
`14. M. Tamura, Mater. Sci. Rep.,
`6, 141 (1991).
`15. D. K. Sadana, N. R. Wu, J. Washburn, M. Current, A.
`Morgan, D. Reed, and M. Maenpaa, Nucl. Instrum. Methods,
`209/210, 743 (1983).
`16. G. A. Rozgonyi, E. Myers, and D. K. Sadana, in Pro- ceedings of the Fifth International Symposium on Silicon Materials Science and Technology, Semicon- ductor Silicon 1986,
`
`H. R. Huff, T. Abe, and B.
`Kolbesen, Editors, PV 86-4, p. 696, The Electrochem-
`ical Society Proceedings Series, Pennington, NJ
`(1986).
`17. M. Horiuchi, M. Tamura, and S. Aoki, J. Appl. Phys.,
`65, 2238 (1989).
`126, 479 (1979).
`18. D. G. Schimmel, This Journal,
`19. M. Tamura, M. Horiuchi, and Y. Kawamoto, Nucl. In- strum. Methods,
`B37/38, 329 (1989).
`20. S. Hu, J. Appl. Phys.,
`70, R53 (1991).
`21. A. Reisman, S. T. Edwards, and P. L. Smith, This Jour- nal,
`135, 2848 (1988).
`22. M. Tamura, M. Horiuchi, T. Ito, and T. Abe, Appl. Phys. Lett.,
`52, 1210 (1988).
`23. N. R. Wu, D. K. Sadana, and J. Washburn, ibid.,
`44, 782
`(1984).
`24. M. Tamura and M. Horiuchi, J. Crystal Growth,
`99,245
`(1990).
`
`
`
`130.203.136.75Downloaded on 2016-09-17 to IP
`
`
`
`ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see
`
`) unless CC License in place (see abstract).(cid