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`Paper No. ________
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`_______________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_____________
`
`SONY CORPORATION
`Petitioner
`v.
`
`RAYTHEON COMPANY
`Patent Owner
`_____________
`
`
`
`Case IPR2016-00209
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`Patent No. 5,591,678
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`PETITIONER’S REPLY TO PATENT OWNER RESPONSE
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`TABLE OF CONTENTS
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`I. LIU ANTICIPATES CLAIMS 1-4, 6-7, AND 10-11 ....................................... 1
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`A. LIU MEETS THE “FURNISHING” STEP .................................................................. 2
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`B. LIU TEACHES A WAFER ...................................................................................... 6
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`C. LIU’S WAFER OVERLIES THE ETCH-STOP LAYER ..............................................10
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`D. LIU TEACHES THE FORMING STEP ....................................................................11
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`E. LIU ANTICIPATES CLAIMS 2-4 ..........................................................................11
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`II. GROUNDS 2-8 SHOULD BE ADOPTED .....................................................14
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`A. GROUND 2: CLAIMS 2-4 AND 11 ARE ALSO OBVIOUS IN VIEW OF BLACK. .......14
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`(1) Liu and Black are analogous art ..............................................................14
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`(2) It was obvious to use Black’s patterning with Liu ..................................16
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`(3) Black teaches patterning and forming an electrical connection ..............16
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`B. GROUND 3: CLAIMS 5 AND 12-16 ARE OBVIOUS OVER LIU IN VIEW OF
`RISEMAN. ........................................................................................................17
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`C. GROUNDS 4 AND 8: OLDHAM RENDERS THE “DEGASSING AND CURING”
`LIMITATIONS OBVIOUS. ...................................................................................18
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`D. GROUND 5: CLAIM 10 IS OBVIOUS OVER THE COMBINATION OF LIU AND WEN
` .......................................................................................................................19
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`E. GROUND 6: CLAIM 9 IS OBVIOUS OVER THE COMBINATION OF LIU, WEN AND
`YING. ..............................................................................................................19
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`F. GROUND 7: CLAIM 17 IS OBVIOUS OVER LIU, RISEMAN AND KUSUNOKI ........19
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`III. SECONDARY CONSIDERATIONS .............................................................20
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`i
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`A. RAYTHEON HAS NOT DEMONSTRATED A NEXUS TO PRAISE AND FAILURE OF
`OTHERS ...........................................................................................................20
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`B. THE ALLEGED PRAISE WAS NOT DIRECTED AT THE ’678 PATENT .....................21
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`C. RAYTHEON’S “FAILURE OF OTHERS” ARGUMENT IS NOT PERSUASIVE .............23
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`D. RAYTHEON’S COMMERCIAL SUCCESS ARGUMENT IS NOT PERSUASIVE ............25
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`CERTIFICATE OF SERVICE ...........................................................................28
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`CERTIFICATE OF WORD COUNT .................................................................29
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`ii
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`Petitioner Reply of August 19, 2016
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`TABLE OF AUTHORITIES
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`
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`Cases
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`Constant v. Advanced Micro-Devices, Inc.,
` 848 F.2d 1560 (Fed. Cir. 1988) ............................................................................12
`
`Graham v. John Deere Co.,
`383 U.S. 1 (1966) .................................................................................................25
`
`In re Mouttet,
`686 F.3d 1322 (Fed. Cir. 2012) ...........................................................................16
`
`In re Woodruff,
`919 F.2d 1575 (Fed. Cir. 1990) ...........................................................................20
`
`Iron Grip Barbell Co. v. USA Sports, Inc.,
` 392 F.3d 1317 (Fed. Cir. 2004) ............................................................................20
`
`MRC Innovations, Inc. v. Hunter Mfg., LLP,
` 747 F.3d 1326 (Fed. Cir. 2014) ............................................................................20
`
`Vivid Techs., Inc. v. American Science & Eng'g, Inc.,
`200 F.3d 795 (Fed. Cir. 1999)................................................................................ 5
`
`VSR Indus., Inc. v. Cole Kepro Int'l, LLC,
`
`IPR2015-00182, Final Written Decision, Paper No.33 (PTAB Apr. 28, 2016) ..26
`
`Wyers v. Master Lock Co.,
`616 F.3d 1231 (Fed. Cir. 2010) .................................................................... 14, 16
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`iii
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`UPDATED TABLE OF PETITIONER EXHIBITS
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`
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`Description
`U.S. Patent No. 5,591,678 (“the ’678 patent”).
`Declaration of Dr. Blanchard.
`U.S. Pat. No. 4,422,091 (“Liu”).
`U.S. Pat. No. 3,846,198 (“Wen”)
`U.S. Pat. No. 4,681,718 (“Oldham”).
`U.S. Pat. No. 3,864,819 (“Ying”).
`U.S. Pat. No. 4,426,768 (“Black”).
`Certified translation of Japanese Unexamined Patent Application
`Publication No. 03-108776 (“Kusunoki”).
`U.S. Patent No. 4,106,050 (“Riseman”).
`Excerpt from Dictionary of Electronics, Harper-Collins, 2004 (p.
`152).
`U.S. Pat. App. Ser. No. 08/006,120, Amendment of June 16,
`1994.
`U.S. Pat. App. Ser. No. 08/006,120 (application with claims).
`Independent claim comparison for the ’678 patent.
`
`Japanese Unexamined Patent Application Publication No. 03-
`108776, published May 8, 1991.
`Declaration of Jennifer Seraphine in support of motion for
`admission pro hac vice.
`Declaration of Jacob Zweig in support of motion for admission
`pro hac vice.
`Not submitted.
`
`Not submitted.
`
`Transcript of Deposition of Eugene Fitzgerald, IPR2016-00209,
`August 12, 2016.
`Transcript of Deposition of Eugene Fitzgerald, IPR2015-01201,
`June 6, 2016.
`Transcript of Deposition of John Drab, August 10, 2016
`PROTECTIVE ORDER MATERIAL – ITAR –FILED UNDER
`SEAL.
`String of email correspondence between counsel for Sony and
`counsel for Raytheon between July 11, 2016 and August 9, 2016.
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`iv
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`Petitioner Reply of August 19, 2016
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`Exhibit No.
`1001
`1002
`1003
`1004
`1005
`1006
`1007
`1008
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`1009
`1010
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`1011
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`1012
`1013
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`1014
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`1015
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`1016
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`1017
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`1018
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`1019
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`1020
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`1021
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`1022
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`Raytheon’s Patent Owner Response (“POR”) relies on improper claim
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`REPLY
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`constructions and fails to address the case in the Petition. Claims 1-18 should be
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`canceled.
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`I. LIU ANTICIPATES CLAIMS 1-4, 6-7, AND 10-11
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`Liu’s process is identical to the basic process of the ’678 patent, as shown in the
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`following diagram:
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`Raytheon raises five arguments with respect to Ground 1. First, Raytheon
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`argues that Liu does not “furnish” the multi-layer substrate of the claims, because
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`the multi-layer substrate is not provided at the start of Liu’s process. Second,
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`Raytheon argues that layers 6 and 8 of Liu cannot be a “wafer”, because they are
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`“device layers” made in the “forming” step. Third, Raytheon attempts to leverage
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`its “furnishing” argument, asserting that the substrate at the start of Liu’s process
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`1
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`Petitioner Reply of August 19, 2016
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`Furnishing
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`Forming
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`Attaching
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`Etching Away
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`’678 Patent
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`Liu
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`has only one layer, and thus no “wafer layer overlying an etch-stop layer.” Fourth,
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`Raytheon argues that, because the substrate allegedly has only one layer, there is
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`no “wafer”, and thus no circuit elements formed in or on a wafer. Lastly,
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`Raytheon argues that Liu does not meet claims 2-4.
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`Raytheon’s arguments are incorrect. Raytheon proposes constructions of the
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`terms “furnish” and “wafer”, but then applies more limited constructions. The
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`more limited constructions (although not express) are contrary to the record
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`evidence and prevailing law.
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`A. Liu meets the “furnishing” step
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`Raytheon argues that Liu does not meet the “furnishing” step of the claims.
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`(POR:16-17).1 To this end, Raytheon argues that “furnishing” means “to supply or
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`provide something that already exists.” (POR:13).
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`1 This section addresses arguments on pages 16-17 of Raytheon’s Response. The
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`arguments in the same section on pages 18-19, are addressed in §B, infra.
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`2
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`Liu meets Raytheon’s proposed construction.
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`Liu’s process is shown in Fig. 2. Figure 2 shows a
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`series of steps, A-G, that are carried out in order.
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`(Ex. 1003, 3:65-4:66). Three of those steps (A
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`through C) are shown at right. The “furnishing”
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`step of the claims of ’678 patent happens using the
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`structure of step B, which includes the wafer
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`(yellow), the etch-stop layer (green) and the etchable
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`layer (blue). (Petition:10,21-22)(Ex. 1002, ¶¶73-
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`74).
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`In step B, the layers 4, 6 and 8 are deposited. (Ex. 1003, 3:66-68). This meets
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`the construction proposed on page 13 of the Response (“supply or provide
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`something that already exists”), because once the layers are deposited in step B,
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`they exist. The structure is thereafter provided to step C. (Ex. 1019, Fitzgerald
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`Dep., 37:13-38:12).
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`Raytheon suggests that the “furnishing” step of the claims can only read on step
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`A of Liu’s process. (POR:16-18). There is, however, no sound reason why the
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`“furnishing” step cannot happen at any point in Liu’s process, including step B.
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`The term “furnishing” itself does imply Raytheon’s restrictive meaning, as Dr.
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`Fitzgerald testified:
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`“Q. Is there some sort of timing requirement in the word furnishing
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`that means that it has to happen at the start of a process?
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`MR. FILARSKI: Objection; scope,
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`THE WITNESS: That what has to start?
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`Q. The furnishing step has to happen at the start of the a process.
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`MR. FILARSKI: Same objection.
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`THE WITNESS: Well, I can have processes where I may furnish
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`something at the beginning and then I may furnish something at the
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`end.
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`Q. Or in the middle?
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`A. Or in the middle.”
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`(Ex. 1019, Fitzgerald Dep., 41:16-42:5).
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`Raytheon might argue that the language “already exists” in its proposed
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`construction would exclude any process that manufactures the multi-layer
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`substrate. Where the multi-layer substrate needs to be manufactured, according to
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`this line of thinking, the substrate would not “already exist”. Neither the claim
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`language nor the specification would support this argument. The claims require
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`only furnishing, without specifying how or when it is performed. Furthermore, the
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`multi-layer substrates of the claims of the’678 always need to be manufactured.
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`(Ex. 1019, Fitzgerald Dep. 43:16-44:4). The ’678 patent, for example, states that
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`the “[t]he wafer layer 46 is either deposited directly upon the etch-stop layer 44 or
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`fabricated separately and bonded to the etch-stop layer 46”. (Ex. 1001, 4:28-30).
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`Even if the multi-layer substrate is purchased, the ’678 patent notes that some
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`additional processing of the substrate (i.e. manufacturing), such as thinning the
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`wafer, or forming via 48, takes place before the forming step. (Ex. 1001, 4:6-8;
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`Fig. 1, RN 20 and 4:27-32). Raytheon neglects the manufacturing steps in the ’678
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`patent, but considers them controlling in the prior art.
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`Raytheon’s legal argument that “the use of two different terms, ‘furnishing’ and
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`‘forming’ in the challenged claims necessitates different meanings” (POR:18) is a
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`red herring. The recitation of the “forming” step in an open claim does not
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`preclude “forming” steps from also taking place at other times. See Vivid Techs.,
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`Inc. v. American Science & Eng'g, Inc., 200 F.3d 795, 811 (Fed. Cir. 1999). And
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`the Petition gives the terms different meanings. The furnishing step reads on step
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`B in Liu’s process, while the “forming” step reads on Step C (and thereafter), as
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`Dr. Fitzgerald agreed at his deposition. (Ex. 1019, Fitzgerald Dep., 47:1-11).2
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`Furthermore, if the “furnishing” step reads on providing the step B structure of Liu,
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`then it is irrelevant that step B could also meet the forming step of the claims.
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`In sum, Raytheon’s proposed construction reads on the Liu reference. The term
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`2 “Q. Wouldn't you agree that microelectronic elements are formed after Step B as
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`well in Lui [sic:Liu]? A. I ‐‐ so microelectronic elements are being formed in B C
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`D E as far as I can tell. Well, maybe not E, no. Definitely B and C.”
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`“furnishing” cannot be read to exclude any process that manufactures a wafer,
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`because the claims are not so restrictive, and the specification makes clear that the
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`furnished wafer is manufactured.
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`B. Liu teaches a wafer
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` Raytheon argues that layers 6 and 8 of Liu do not meet its proposed
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`construction of “wafer”, because the layers are “device layers” created in the
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`“forming” step. (POR:18-23). Raytheon also argues that layers 6 and 8 cannot be
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`“grouped” to form a wafer. (POR:20-21).
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`Raytheon’s proposed construction of “wafer” is somewhat unclear. Raytheon
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`first proposes that “wafer” means “a portion of the first substrate in or on which the
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`microelectronic circuit element is formed.” (POR:11). Elsewhere, however,
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`Raytheon argues that “[t]he wafer layer of the furnished substrate itself does not
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`initially contain microelectronic circuit elements.” (POR:11,22). In other places,
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`Raytheon emphasizes that “the ’678 Patent’s wafer layer does not “exclusively
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`consist of microelectronic elements as do Liu’s layers 6 and 8.” (POR:21).
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`Raytheon’s proposed limitations on the term “wafer” are incorrect. The ’678
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`patent states that the furnished “wafer” of the ’678 patent can include—or even
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`exclusively consist of—microelectronic circuit elements. For example, the ’678
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`patent states that:
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`“The wafer layer 45 [sic:46] may also be or include an interconnect
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`6
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`material such as a metal or other structure as may be appropriate for a
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`particular application. In the present case, an optional via opening 48
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`is provided through the wafer layer 46.”
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`(Ex. 1001, 4:16-21)(Emphasis added). The “interconnect material such as metal”
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`is a microelectronic circuit element, because the ’678 patent states expressly that a
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`“microelectronic circuit element….may be simply a patterned electrical conductor
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`layer that is used as an interconnect”. (Ex. 1001, 4:37-52). Furthermore, the fact
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`that the wafer may “be or include” any “other structure as appropriate”, suggests
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`that the wafer can be or include any “microelectronic circuit element”, given that
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`term’s broad definition. (Ex. 1001, 4:37-52). An additional “forming” step (e.g.
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`step C of Liu) must be carried out to meet the claim language, but nothing in the
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`claims or the specification prevents a “wafer” as furnished from including
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`microelectronic circuit elements.
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`Raytheon incorrectly argues that claim 7 shows that the wafer and circuit
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`element are “distinct and apart”. (POR:22). On the contrary: by reciting “the
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`microelectronic circuit element on the wafer”, claim 7 uses the term “wafer” to
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`describe structures after the formation of microelectronic circuits.
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` The ’678 patent’s teaching that a wafer can be or include microelectronic
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`circuit elements reflects the technical reality of semiconductor processing. The
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`semiconductor wafer material of the Fig. 1 embodiment of the ’678 patent is not
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`7
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`some mere support structure—it is the very material out of which the active
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`elements of microelectronic circuits are formed. (Ex. 2016, p. 0002)(Ex. 2014,
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`1:51-2:17, Figs. 1-2)(Ex. 1004, 2:69-71). For example, Raytheon’s expert, Dr.
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`Fitzgerald, acknowledged that the wafer of the claims can be doped. (Ex. 1019,
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`Fitzgerald Dep. 24:20-26:3). A wafer made of a doped semiconductor can become
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`part of a microelectronic circuit element without further modification. As Dr.
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`Fitzgerald testified:
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`“Q. And it is possible, is it not, that the wafer of 46, without any
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`further modification to it, could provide that transistor channel
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`although one would need to modify it to provide a source and a drain,
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`for example?
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`MR. FILARSKI: Objection; form.
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`THE WITNESS: Let me restate that and you can tell me. So you
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`mean 46 wafer portion could be the correct material itself for the
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`transistor channel that I would like to have.
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`Q. I think you stated that accurately, yes.
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`A. It could be.”
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`(Ex. 1019, Fitzgerald Dep., 35:11-24).
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`Raytheon in some places emphasizes that the entirety of Liu’s layers 6 and 8
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`become microelectronic circuit elements. This, however, does not distinguish Liu
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`from the claims of the ’678 patent. First, Raytheon’s premise is incorrect: the
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`peripheries of layers 6 and 8 are removed by etching in Liu’s process. (Ex. 1003,
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`8
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`4:59-66)(Ex. 2001, Fitzgerald Decl. ¶99). The peripheries thus do not become part
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`of a microelectronic circuit element. Furthermore, the circuit elements in layers 6
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`and 8 are not complete: they are modified by further processing. (Ex. 1003, Fig.
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`2, step C, 4:21-27). The situation for Liu’s layers is indistinguishable from the
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`wafer of the’678 patent. The wafer of the ’678 patent may “be or include”
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`microelectronic circuit elements before the forming step (Ex. 1001, 4:16-18), and
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`can become microelectronic circuit elements after processing. (Ex. 1019,
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`Fitzgerald Dep. 35:2-24). The amount of a wafer that will be used as portions of a
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`microelectronic circuit element depends only on the application. (Ex. 1019,
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`Fitzgerald Dep. 26:4-27:13).
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`Moreover, the ’678 patent makes clear that conventional semiconductor
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`fabrication techniques can be used in both the “furnishing” and “forming” steps.
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`(Ex. 1001, 2:23-24). For example, the “wafer layer 46” can be “deposited directly
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`upon the etch-stop layer 44” (Ex. 1001, 4:27-30), much as Liu’s “three LPE layers
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`are deposited (step B) using conventional slider boat techniques.” (Ex. 1003, 3:65-
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`67). And although Dr. Fitzgerald implied in his declaration that one cannot make a
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`“wafer” using Liu’s process of epitaxy (Ex. 2001, ¶53), he retreated from that
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`position in his deposition. (Fitzgerald Dep., Ex. 1019, 22:12-15).
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`Also incorrect is Raytheon’s argument that layers 6 and 8 of Liu cannot
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`together form a wafer. (POR:21). First, the claims themselves do not describe the
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`“wafer” as monolithic. Indeed, the ’678 patent expressly contemplates that the
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`wafer can have any “structure as may be appropriate for a particular application”
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`(Ex. 1001, 4:16-18). Liu’s layers 6 and 8 are “structures appropriate for [Liu’s]
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`application.” Furthermore, the ’678 patent contemplates that the wafer will have
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`microelectronic circuit elements in it. (See above and Petition:20). In such circuit
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`elements, as the ’678 patent acknowledges, “[t]here are usually multiple layers of
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`deposited conductors and insulators.” (Ex. 1001, 1:22-23)(Emphasis added).
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`Even if Raytheon were correct that layers 6 and 8 of Liu could not together
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`form a wafer, layer 6 would qualify as a wafer on its own (for the same reasons
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`stated above), while channel layer 8 and its constituent elements (Ex. 1003, 3:7-
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`3:32) would qualify as the microelectronic circuit elements of the ’678 patent. (Ex.
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`1001, 4:44-42).
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`In sum, Liu teaches a “wafer” even under Raytheon’s proposed construction. It
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`is irrelevant if the wafer has microelectronic circuit elements in it, because that is
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`expressly contemplated in the ’678 patent, and was understood in the art to be a
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`natural consequence of semiconductor processing.
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`C. Liu’s wafer overlies the etch-stop layer
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`Raytheon argues (POR:23-24) that neither Liu’s step A substrate nor layer 8
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`(standing alone) would “overlie” the etch-stop layer. First, “overlying” simply
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`means “lying over”—it does not require direct contact. Even if “overlying” were
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`construed to mean “overlying and directly contacting”, the wafer in Liu comprises
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`layers 6 and 8, as shown at right, highlighted
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`yellow. (Petition:10,21-22)(Ex. 1002, ¶¶73-
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`74). This wafer overlies and is in direct
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`contact with the etch-stop layer 4 (green).
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`(Petition:22)(Ex. 1002, ¶73).
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`D. Liu teaches the forming step
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`Raytheon’s argument (POR:25) that Liu does not teach “forming a
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`microelectronic circuit element in the
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`exposed side of the wafer” is incorrect. Liu
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`teaches, in step C, forming microelectronic
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`circuit elements both in and on the exposed
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`surface of layer 8. (Ex. 1003, 4:20-
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`27)(Petition:11,22-24)(Ex. 1002, ¶¶90-94). Raytheon’s argument depends entirely
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`on limiting Liu’s “wafer” to substrate 18, which is incorrect as shown above in §A.
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`E. Liu anticipates claims 2-4
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`Raytheon argues that Liu does not pattern the etch-stop layer (claim 2) or meet
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`the electrical connection limitations of claims 3 and 4.
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`Raytheon’s arguments are meritless. First, Raytheon argues that the purpose of
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`the ’678 patent is to allow backside processing, and that Liu fails to allow backside
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`processing. Without a claim limitation, however, Liu’s “purpose” as compared to
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`the ’678 patent’s purpose is irrelevant to anticipation. See Constant v. Advanced
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`Micro-Devices, Inc., 848 F.2d 1560, 1571 (Fed. Cir. 1988).
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`With respect to claim 2, Liu does disclose patterning the etch-stop layer.
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`Specifically, Liu discloses selectively etching only a
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`portion of a surface in a concentric square pattern, as
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`shown at right in perspective (red). (Ex. 1003, Fig. 1
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`and 4:59-66). In the relevant timeframe, the etching
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`would have been accomplished by covering the
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`center square (which should not be etched) with a temporary etch-resistant coating,
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`and then exposing the entire surface to an etchant. (Ex. 1019, Fitzgerald Dep.,
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`59:12-60:25). This process of blocking one area with a protective coating, and
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`exposing the surface to a process step like etching, is exactly the process of
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`“patterning”. For example, Raytheon exhibits 2003 and 2015 both describe a
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`patterning step as the application of a protective layer (photoresist) to a portion of a
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`surface, and then exposing the rest of the surface to etching. (Ex. 2003, 5:35-
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`43)(Ex. 2015, p. 0014, 1st ¶).
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`Raytheon’s argument that the “patterning” cannot result in etching the
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`periphery is incorrect. Nothing in the ’678 patent restricts the location or shape of
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`the pattern, and even Dr. Fitzgerald testified that “patterning” in claim 2 can
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`include “any kind of pattern.” (Ex. 1020, Fitzgerald Dep. in IPR2015-01201, 22:5-
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`23:2).
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`Regarding claims 3 and 4, Liu teaches that the interconnect pads 16 (shown in
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`red at right) form an electrical contact
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`to the CCD circuit to read its output.
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`(Ex. 1003, 3:59-62, 4:59-61)(Ex. 1002,
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`¶110)(Ex. 1019, Fitzgerald Dep.,
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`61:19-62:10). Thus, the language of
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`claim 3 requiring “forming an
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`electrical connection to the
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`microelectronic circuit element” is met.
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`Liu further meets the requirement of claims 3 and 4 to form the electrical
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`connection “through the patterned etch-stop layer”, as well as the requirement of
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`claim 3 alone to form the electrical connection “through the wafer”. This is
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`because layer 4 (the etch-stop) and layers 6 and 8 (the wafer) are extremely thin (4
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`microns total, Ex. 1003, 4:1-19), and their peripheries must be removed before the
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`electrical connection can be formed. (Ex. 1002, ¶¶111-113). The word “through”
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`does not require traversing an opening surrounded on four sides (e.g. a boat can
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`travel “through the water”, although the water is hopefully not above the boat).
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`Liu also meets the requirement of claim 4 to form “an electrical connection to
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`the wafer”. Specifically, the contacts 16 are electrically connected to the CCD
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`circuit, and part of the CCD circuit is in layer 8, including ohmic contact 20 and
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`the channel isolation structure 22 (Ex. 1003, 4:21-25). Thus, the pads 16 are also
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`electrically connected “to the wafer” as required by claim 4. (Ex. 1002, ¶117).
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`Contrary to Raytheon’s argument (POR:31), the claims do not require access
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`“from the back side”. Moreover, layer 4 is the layer on the back side (Ex. 1019,
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`Fitzgerald Dep., 12:11-14, 54:14-56:14), and layer 4 must be removed to access
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`contact 16 (and thus ultimately ohmic contact 20 in wafer 8). Therefore, the
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`connection path is from the back side.
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`II. GROUNDS 2-8 SHOULD BE ADOPTED
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`A. Ground 2: Claims 2-4 and 11 are also obvious in view of Black.
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`Raytheon argues that Liu and Black represent non-analogous art, that a
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`combination of these two references results in an inoperable device, and that Black
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`does not disclose patterning. Each of these arguments fails.
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`(1) Liu and Black are analogous art
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`The Federal Circuit has held that “[t]he Supreme Court's decision in
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`KSR…directs us to construe the scope of analogous art broadly….” Wyers v.
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`Master Lock Co., 616 F.3d 1231, 1238 (Fed. Cir. 2010). Prior art is analogous if it
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`falls within the same field of endeavor as the patent-at-issue, or is reasonably
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`related to the problem to be solved by the inventors. See id. at 1238. The field of
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`endeavor is defined by the patent-at-issue, not the prior art. See id. at 1237-38.
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`The field of endeavor of the ’678 patent is “microelectronic devices”. (Ex.
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`1001, 1:11)(“This invention relates to microelectronic devices.”). Raytheon’s
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`expert, Dr. Fitzgerald, confirmed the scope of the field at his deposition:
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`“Q. Can you turn to paragraph 17 of your declaration.
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`A. Yes.
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`Q. There you are discussing a person of ordinary skill in the art; right?
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`A. Yes.
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`Q. What is ‘the art’?
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`A. The art with respect to '678 patent?
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`Q. Of course.
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`A. Yeah, it's microelectronic processing.”
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`(Ex. 1019, Fitzgerald Dep., 49:9-19). Although Raytheon implies that the ’678
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`patent is directed to an image sensor (POR:34, 1st ¶), the ’678 patent only mentions
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`“sensors” in general, and then only as an example within the broader concept of
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`microelectronic devices. (Ex. 1001, 1:48-51).
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`Like the ’678 patent, both Liu and Black relate to microelectronic devices. (Ex.
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`1003, 1:11-22)(Ex. 1007, 1:7-10, 2:39-42). Furthermore, both Liu and Black relate
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`to the field of sensors, as disclosed in the ’678 patent. (Ex. 1003, 1:11-14)(Ex.
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`1007, Abstract)(Ex. 1001, 1:48-51). Both Liu and Black also relate to accessing
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`the back side of wafers having microelectronic circuit elements. (Ex. 1003, 2:50-
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`54)(Ex. 1007, 1:54-65). The references are thus in the same field and reasonably
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`related. See Wyers, 616 F.3d at 1237-38.
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`(2)
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`It was obvious to use Black’s patterning with Liu
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`Raytheon again argues a straw-man position by assuming that Black’s entire
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`structure must be bodily incorporated into Liu. This is not the test. See In re
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`Mouttet, 686 F.3d 1322, 1333 (Fed. Cir. 2012).
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`In the Petition, Black was cited to show the known use of patterning to form
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`contacts through an etch-stop layer, inward from the edge of the layer, and directly
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`to a relevant microelectronic circuit element. (Petition:33-34). Patterning is a
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`basic technique in the field of semiconductor fabrication. (Ex. 1001, 1:14-
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`15)("Microelectronic devices are normally prepared by a series of steps such as
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`patterning …."). The use of patterning does not require that Black’s flexible layer
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`be incorporated into Liu.
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`(3) Black teaches patterning and forming an electrical connection
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`Raytheon next argues that, “Black fails to contemplate patterning epitaxial layer
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`22 to allow for access to the circuitry beneath the layer”. (POR:35). Black,
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`however, explains that the patterning of the
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`etch-stop, discussed in claim 2, “exposes the
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`aluminum bonding pads 32 to permit
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`ultrasound or stitch bonding of conductors
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`(not shown) to the aluminum bonding pads 32” through windows 51. (Ex. 1007,
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`6:25-28)(Ex. 1002, ¶160). The conductors form an electrical connection through
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`the patterned etch-stop layer and through the wafer, as seen in Fig. 9 at right,
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`which highlighted as on page 35 of the Petition. The contacts are to the
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`microelectronic circuit element, as the diffused and aluminum bonding pads (29
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`and 32) provide ohmic contact. (Ex. 1007, 3:37-42)(Ex. 1002, ¶161). Fig. 9 also
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`shows the electrical connection passing to the wafer, through the diffused bonding
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`pads 29. (Ex. 1002, ¶165).
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`B. Ground 3: Claims 5 and 12-16 are obvious over Liu in view of Riseman.
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`Raytheon argues that Ground 3 is repackaged from prosecution, that there is no
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`motivation to combine Riseman with Liu, that Liu teaches away from Riseman,
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`and that Riseman does not teach a wafer layer that “overlies” an etch-stop layer.
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`These arguments fail. First, the Petition does not “repackage” a prosecution
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`rejection, because Liu was not of record during prosecution. In Ground 3,
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`Riseman is used only as a secondary reference for a limited purpose.
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`Second, there was ample motivation to combine Riseman and Liu. Liu already
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`teaches that its CCD can be implemented in “other semiconductors”. (Ex. 1003,
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`5:9-10). Liu further explains that CCD devices are typically implemented in
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`silicon. (Ex. 1003, 1:16-17). As discussed in the Petition (p. 40), Liu notes that
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`silicon can hamper performance, but only for “some specific applications”. (Ex.
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`1003, 1:18-19). Outside of those specific applications, silicon was the dominant
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`semiconductor used for CCDs. Dr. Fitzgerald himself testifies that “silicon
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`technology dominates CCD array devices”. (Ex. 2001, ¶48)(see also Ex. 1002,
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`¶187)(Ex. 2016, p. 0002, middle left). When the vast majority of devices were
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`made with silicon, Liu’s reference to silicon would not have convinced anyone to
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`avoid it except for certain specific applications.
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`Thus, Liu already provides motivation to implement its CCD device using the
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`dominant materials of the time: silicon and SiO2. (Ex, 1002, ¶187). Riseman
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`simply shows that it was known to use a silicon etchable layer, an SiO2 etch-stop
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`layer and a single-crystal silicon wafer. (Petition:37-39). Within this context,
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`Raytheon’s argument that Riseman’s wafer does not overlie the etch-stop layer is
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`irrelevant. Even if it were relevant, however, Riseman states that the SiN layer
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`between the etch-stop and wafer layers is optional. (Ex. 1009, 5:59-6:5)(Ex. 1002,
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`¶175).
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`Lastly, Raytheon’s argument that “creating an entire single-crystal silicon layer
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`on SiO2 was not a common practice until after the ’678 patent’s invention”
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`(POR:37), is not credible. The ’678 patent admits there was a commercial
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`marketplace for such substrates (Ex. 1001, 4:2), and Dr. Fitzgerald testified that
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`there were many methods for making such substrates in the relevant timeframe.
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`(Ex. 1019, Fitzgerald Dep., 23:22-24:19)(Ex. 2001, ¶41).
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`C. Grounds 4 and 8: Oldham renders the “degassing and curing”
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`limitations obvious.
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`Raytheon argues that Oldham is a “generally applicable” epoxy reference that is
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`cumulative of the Raschke an