Petitioner Hynix - HYNIX-1007
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`1
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`_.
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`:: TOP
`': Conductor
`CVDW
`Adhesion Layer
`
`t>F'0|yimide
`
`Si3N,,
`Device
`Substrate
`
`Fig. 1 \ fiross section diagram of combined CVD tungsten and
`liftoff rpetal structure.
`
`polymide“ was spin coated on the wafer. The film
`was cured using oven cycles recommended by Du-
`pont to obtain a nominal 1.2 micrometer thick film.
`Good surface smoothing was observed with 80% or
`better planarization. While thicker films may be
`desired for some applications, this thickness was
`adequate for our tests.
`An etch stop layer of silicon dioxide deposited in
`a PECVD system was applied. This film was used
`to insure a good etch step was obtained during SF6
`etching, however, subsequent tungsten RIE process
`development reduced the need for this la er. A
`film of titanium (600A) and then silicon (400 ) were
`sequentially evaporated to provide an anti-reflec-
`tive coating and etch stop for via photolithography
`and via etch respectively as well as an adhesion layer
`for the yet to be deposited CVD tungsten.
`Vias were patterned using routine photolithog-
`raphy. 1.5 mm Shipley 1400-31 positive photoresist
`was exposed on a GCA-6300 h line step and repeat
`system. Thinner resist films have been used suc-
`cessfully as a result of the effectiveness of the sil-
`icon/titanium etch step, however the samples being
`reported on were processed using the thicker 1.5 um
`resist. The resist was developed on GCA-1000 track
`equipment using a Shipley MF 312 puddle process.
`Via etching was performed in Applied Materials
`8120 and 8110 hexode RIE systems. The silicon and
`titanium films were first etched using a BCI3, HCl,
`and oxygen gas mixture in an AME 8120. This first
`etch is not very selective to photoresist and there-
`fore acts as a one step descum and etch of the Vias.
`The second step of the etch was done in an AME
`8110. Oxygen was used to etch through the polyi-
`mide, a 50% overetch was provided to insure com-
`plete etching of various depth Vias, no pinholing of
`the upper etch step was observed. The resist was
`completely removed during this etch step. The final
`etch step was performed insitu in the AME 8110 re-
`actor. This etch used a CHF3 and oxygen mixture
`to penetrate the silicon nitride encapsulant layer and
`remove oxidized silicon and silicon from the adhe-
`sion layer surface (complete removal of the silicon
`was not required).
`Tungsten was deposited by Chemical Vapor De-
`position to a thickness of 4500A from a tungsten
`hexafluoride and hydrogen mixture onto the adhe-
`sion layer and into the Vias. The deposition condi-
`tions Were: 385° C, 0.5 Torr 50 sccm WF6, 200 sccm
`Ar, 2 slpm H2. A deposition rate of 1100 A/min.
`
`Jones and Tandon
`
`was obtained with these conditions. A loadlocked,
`vertical flow LPCVD system designed at the Mi-
`croelectronics Center of North Carolina and retro-
`fitted into a conventional Bruce horizontal hotwall
`furnace was used for the depositions. The system
`holds 100 wafers per load, is self cleaning, and ex-
`hibits better than 5% thickness uniformity across a
`wafer and :5% between wafers or runs when used
`
`for nonselective depositions of tungsten. A drawing
`of the MCNC designed deposition chamber is shown
`in Fig. 2.
`Liftoff photolithography was performed next us-
`ing the MCNC-Genesis process previously described
`and then the surface was plasma cleaned. The up-
`per layer conductors were evaporated with either Cr-
`Cu-Cr or Al + Cu layers and the metal on top of
`the resist is lifted off as was done at the first metal
`level. Figure 3 demonstrates the excellent profiles
`obtained using image reversal processing, the m1-
`crograph is taken after evaporation of metal.
`Etching of the tungsten layer using the evapo-
`rated patterns as etch masks was performed in a
`non commercial parallel plate RIE reactor of IBM
`design.15’16 Sulphur hexafluoride was used as the etch
`gas, Table I gives the observed etch rates of various
`films in the reactor with 40 sccm SF6 flow, 3.5 mil-
`litorr pressure, a bias voltage of 350 volts and 0.08
`Watts per sq cm input power which was the selected
`etch condition for these samples. The etch was ob-
`served to be anisotropic for the conditions used and
`with a 50% timed overetch. The titanium adhesion
`
`layer between the conductor lines was removed dur-
`ing the overetch.
`Table II gives a more detailed description of tung-
`sten etch conditions and their effect on etch rate and
`effect on how anisotropic the etch was.
`
`Quartz Tube
`
`|"|J9C?[IJI‘ Ormce Arrays
`
`Gus Preheating Coils
`
`- Cantilever
`
`Supporl Ring Two 50 ‘Wafer Carriers \'e=rl|c:a]
`
`Fl-OW Haffle
`
`Tube Baffle
`
`Fig. 2 — Batch LPCVD Tungsten Apparatus—Vertica] Flow
`System.
`
`Fig. 3 — SEM micrograph of metallized image reversal liftoff
`stencil.
`
`2
`
`2
`
`

`
`Multilevel Metal Interconnection Utilizing CVD Tungsten and Liftoff Processing
`
`Table I. Tungsten Etch Rates
`
`_
`Film type
`
`Flexible Diode SF6
`
`(40sccm & 3.5 millitorr)
`angstrom/min
`
`CVD tungsten
`Photoresist
`Silicon
`Plasma Oxide
`Plasma Nitride
`Polyimide
`Bias: 350 Volts
`Power Density: 0.08 watt/sq. cm
`
`1510
`300
`250
`140
`420
`490
`
`Table IIA. Degree Undercut of 1 Micrometer
`Tungsten Pattern Etched in Carbon
`Coated Cathode.
`
`100 Watt
`Carbon
`50 mm"
`5 mtorr
`Coated
`Cathode Metal Resist Metal Resist Metal Resist
`
`10 mtorr
`
`N/N
`N/N
`U/N
`
`N/N
`N/N
`S/N
`
`S/N
`U/S
`U/S
`
`N/N
`U/S
`U/U
`
`N/N
`N/N
`N/N
`
`N/N
`20 sccm
`N/N
`40 sccm
`U/N
`60 sccm
`U = Undercut.
`S = Slight Undercut.
`N = No Undercut.
`SF6/CF4.
`
`Table IIB. Degree Undercut of 1 Micrometer
`Tungsten Pattern Etched in Anodized
`Aluminum Cathode.
`
`100 Watt
`
`5
`Anodized
`50 mtorr
`10 mtorr
`mtorr
`Aluminum
`Cathode Metal
`Resist Metal Resist Metal Resist
`
`S/N
`N/N
`N/N U/N
`N/N U/S
`
`N/N U/U
`S/N
`U/U
`S/N
`U/U
`
`U/S
`U/U
`U/U
`
`N/N
`20 sccm
`S/N
`40 sccm
`S/S
`60 sccm
`U = Undercut.
`S = Slight Undercut.
`N = No Undercut.
`SF6/CF4.
`
`Passivation of the structure is then performed with
`PECVD silicon nitride prior to subsequent levels or
`patterns. A cross section of a via chain segment is
`shown in Figure 4. As expected, the tungsten pro-
`vides conformal step coverage into the vias while
`the liftoff metallurgy on the via walls. Thicker
`tungsten films may be used to completely fill smaller
`vias if desired.
`
`EXPERIMENTAL RESULTS
`
`Sheet resistances following a 400° C 30 min 6%
`hydrogen in argon forming gas anneal were 44 m.(2/
`sq for the Cr-Cu-Cr on tungsten films and 26 m.Q/
`sq for the Al + 4% Cu on tungsten films. Both films
`exhibited 15 to 20% drops in sheet resistance re-
`
`Fig. 4 — Cr-Cu-Cr via chain with CVDW underlayer (titanium
`adhesion layer —800A).
`
`sulting from the anneal. Figure 5 shows measured
`sheet resistance of Cr-Cu-Cr metal films on silicon
`dioxide after 30 min anneals at various tempera-
`tures.
`'
`Chains of various size nested vias were measured
`to obtain contact resistance data, the result of these
`measurements is shown in Fig. 6 for Cr-Cu-Cr on
`W, and Fig. 7 for A1 + 4% Cu on W. The drop in
`specific via resistance with via area is primarily at-
`tributed to greater relative percentage via filling
`with the 4500A tungsten film. Limited measure-
`ments of via chains of 0.8 pm in diameter exhibited
`slightly increased specific via resistance over the one
`micron vias. Kelvin structures correlated with the
`via chain measurements, however, they exhibited
`approximately 5—8% lower specific via resistances
`than the calculated specific via resistances mea-
`sured in the via chains.
`The specific via resistance distributions for the
`various nested via sizes of the chromium-copper-
`chromium on tungsten via resistance is shown in
`Fig. 8. Good yield and tight distribution of specific
`contact resistance was measured on the aluminum
`+4% copper samples while a higher broader distri-
`bution of resistances was measured on the chro-
`mium-copper-chrornium samples. Unnested vias were
`
`-I-Cr-Cu-Cr mon.2
`
`0'10')
`
`U1J3-
`
`.b.
`
`
`
`
`
`SheetResistance[ohm!sq.)
`
`:_
`100
`
`1
`200
`
`1
`300
`
`1
`400
`
`500
`
`600
`
`Anneal Tempe-rature°C
`
`Fig. 5 — Cr-Cu-Cr layer sheet resistance change resulting from
`30 minute H2 anneals at various temperatures.
`
`3
`
`

`
`Jones and Tandon
`
`also measured, these exhibited 30% to 50% lower
`via chain resistances than the nested vias along with
`approximately twice the width distribution of con-
`tact resistances. As this process allows for excellent
`electrical to the walls of metal lines as well as sur-
`faces, this observed efiect can be attributed to larger
`effective electrical contact area in the unnested vias.
`The design of our unnested via structures did not
`completely overlap the ends of the first level metal
`lines so minor alignment changes resulted in large
`via resistance changes when unnested vias were
`used, although it did tend to improve via resistance
`with minor misalignment rather than degrade the
`via resistance as conventional unnested via pro-
`cessing would have done.
`
`CONCLUSIONS
`
`Successful initial results have been obtained for
`a new VLSI/ULSI interconnection metallurgy which
`combines the benefits of metal
`liftoff and CVD
`tungsten processing. Two examples of this tech-
`nique have been fabricated with reasonable via chain
`resistances and yields. The specific contact resis-
`tances for Cr-Cu-Cr on tungsten one micrometer di-
`ameter vias were measured to be 17 X 10-8 (2 —cm2
`nominal for one micrometer diameter vias using
`liftoff aluminum plus 4% copper on 4500A tung-
`sten. It is expected that the higher sheet resistance
`of the Cr-Cu-Cr film with only 4500A copper and
`the Cr-Cu-Cr on tungsten interface contact resis-
`tance contributed to the marginally acceptable via
`chain resistance results. High aspect ratio conduc-
`tors with reasonable smoothed surfaces were ob-
`tained, the ability of this type process to support
`high aspect ratio interconnects potentially permits
`low resistance interconnects at small dimensions.
`While further Work is still required to determine how
`to further reduce the contact resistances of these
`structures as well as their reliability, this tech-
`nique presents a potentially useful technique to si-
`multaneously solve the micron and submicron ULSI
`interconnection issues of step coverage, via contact
`resistance,
`low effective bulk resistivity, electro-
`migration resistance, and general reliability.
`
`REFERENCES
`
`1. R. M. Halverson, M. W. Maclntyre, and W. T. Motsiff, IBM
`J. Res. Develop. 26, 590 (1982).
`. H. Moritz, IEEE Trans. ED-32 (3), 672 (1985).
`. S. K. Jones, R. C. Chapman, E. K. Pavelchek, ULSI Sci. Tech.,
`ECS Proc. 1987, Vol. 87-11, p. 190.
`. S. K. Jones, R. C. Chapman, SPIE Proc. Adv. in Resist Tech.
`and Process. IV, Vol. 771, 1987, p. 231.
`. R. Blumenthal and G. C. Smith, Tungsten and Other Re-
`fraction Metals for VLSI Applications 111, ed. V. Wells, (MRS,
`1988), p. 47.
`. S. Sachdev, J. A. Fair, C. Fuhs, and W. Cong, Tungsten and
`Other Refractory Metals for VLSI Applications 1, ed. R. S.
`Blewer, (MRS, 1986), P 475-
`. R. Solanki, H. Zarnani, G. A. Kovall, and J. M. Marrs, ibid.,
`p. 399.
`
`Cr-Cu~Cr on CVD Tungsten
`
`—— 3.0 micron Via
`- —- 1.25 micron Via
`---- -- 1.0 micron Via
`
`§
`
`
`
`%ReportedOccurrence
`
`0.1
`
`1.0
`
`10.0
`
`1000
`
`1 0000
`
`Specific Contact Resistance (10e-08 ohm-cm2)
`
`Fig. 6 —_« Measured distribution of specific contact resistance of
`via chains fabricated from 700A Cr on 4500A Cu on 600A Cr,
`all on 4500A CVD tungsten with similar Cr-Cu-Cr metal 1 layer.
`
`Aluminum on CVD Tungsten
`
`: 3.0 micron Via
`--- 1.25 micron Via
`----- -- 1.0 micron Via
`
`.
`
`cvU
`n..
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`ca
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`3QUQ'
`
`0 9i0D
`
`co
`U:
`
`o\°
`
`O
`0.1
`
`.
`
`.
`
`1 .0
`
`10.0
`
`100.0
`
`1000.0
`
`Specific Contact Resistance (10e-O8 ohmcmz)
`
`Fig. 7 —— Measured distribution of specific contact resistance of
`via chains fabricated from 8500A Al + 4% Cu or 4500A CVD
`tungsten with Al + 4% Cu metal layer.
`
`—Cr-Cu-Cr on CVD Tungsten
`-—-AI on CVD Tungsten
`
`
`
`(‘10e-08ohm-cm2) 6G‘.B
`
`
`
`
`
`SpecificContactResistance
`
`Via Area ('10e08 cmz)
`
`Fig. 8 — Specific contact resistance of vias for layers of Cr-Cu-
`Cr and Al+4% or 4500A CVD tungsten film. Metal layer 1 was
`Al—4% Cu in both cases.
`
`100
`
`4
`
`

`
`Multilevel Metal Interconnection Utilizing CVD Tungsten and Liftoff Processing
`
`93
`
`8.
`
`9.
`
`S. Tandon and G. W. Jones, Tungsten and Other Refractory
`Metals for VLSI Applications IV, (MRS 1988), ed. R. Blewer.
`E. K. Broadbert, J. M. Flanner, W. G. M. Can Den Hoeh,
`and I. W. H. Connicle, Tungsten and Other Refractory Met-
`als for VLSI Applications III, ed. V. Wells (MRS, 1988) p.
`191.
`. J. M. Mikkelson, L. A. Hall, A. K. Malholtra, S. D. Sec-
`combe, and M. S. Wilson, IEEE J. Solid State Circuits SC-
`16, 542 (1981).
`. Genesis (Staufer Marketing) 2984 Scott Blvd., Santa Clara,
`CA 95054.
`
`.
`
`. Shipley Company, Inc., 2300 Washington Street, Newton MA,
`01810.
`. GCA Co.-General Signal Corp., 7 Shattuck Road, Andover,
`MA 01810.
`I. E. Dupont, Pyralin Division, Barley Mill Plaza, Wilming-
`ton, DE 19898.
`. L. M. Ephraph, E. J. Petrillo, J . Electron. 129, 2282 (1982).
`. R. S. Bennet and L. M. Ephrath, IBM Tech. Disclosure Bul-
`Ietin 25, June 1982.
`. Applied Materials Inc., 3050 Bowers Avenue, Santa Clara,
`CA 95054.
`
`5