`__________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`__________
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`
`
`LAM RESEARCH CORP.,
`
`Petitioner
`
`v.
`
`DANIEL L. FLAMM,
`
`Patent Owner
`___________
`
`U.S. Patent No. RE40,264 E
`
`Issued: April 29, 2008
`
`Named Inventor: Daniel L. Flamm
`
`Title: MULTI-TEMPERATURE PROCESSING
`___________
`
`Case IPR2015-1764
`Patent RE40,264 E
`
`DECLARATION OF JOSEPH L. CECCHI IN SUPPORT OF REPLY TO
`PETITION FOR INTER PARTES REVIEW OF
`U.S. PATENT NO. RE40,264 E UNDER 37 C.F.R. § 1.68
`
`
`
`Mail Stop: PATENT BOARD
`Patent Trial and Appeal Board
`U.S. Patent & Trademark Office
`P.O. Box 1450
`Alexandria, VA 22313-1450
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`Declaration for Reply
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`TABLE OF CONTENTS
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`Case IPR2015-01764
`Patent RE40,264
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`Page
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`I.
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`II.
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`INTRODUCTION ........................................................................................ 1
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`QUALIFICATIONS AND PROFESSIONAL EXPERIENCE ................... 1
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`III.
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`PERSON HAVING ORDINARY SKILL IN THE ART ............................ 9
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`IV. RELEVANT LEGAL STANDARDS ........................................................ 11
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`V.
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`THE ‘264 PATENT .................................................................................... 14
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`A.
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`Representative Claim 37 .................................................................. 15
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`VI. OPINIONS RELATING TO PETITIONER’S REPLY ............................. 16
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`VII. CONCLUSION ........................................................................................... 19
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`Declaration for Reply
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`I, Joseph L. Cecchi, declare as follows:
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`Case IPR2015-01764
`Patent RE40,264
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`I.
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`INTRODUCTION
`1.
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`I am over 18 years of age and otherwise competent to make this
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`Declaration.
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`2.
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`I have been asked to provide my views regarding technical issues in
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`connection with the above-captioned inter partes review of U.S. Patent No.
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`RE40,264 E (“the ‘264 patent”). I opine only with respect to certain issues that are
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`discussed in this declaration.
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`3.
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`I previously submitted a declaration in support of the petition for IPR
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`2015-01764, which the Patent Trial and Appeal Board instituted. Ex. 1006. I now
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`submit this declaration in support of the Petitioner’s Reply.
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`II. QUALIFICATIONS AND PROFESSIONAL EXPERIENCE
`4.
`I am currently Dean of the School of Engineering and Professor of
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`Chemical and Biological Engineering at the University of New Mexico (“UNM”).
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`This is my second term as Dean, and the term began in February 2014. I have held
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`my appointment as Professor since joining UNM in 1994.
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`5.
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`From 2011 to 2012, while on leave from UNM, I served as Provost
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`and Professor of Engineering at the Masdar Institute of Science and Technology in
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`Abu Dhabi, United Arab Emirates.
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`6. My first appointment as Dean of the School of Engineering extended
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`from 2000 to 2009. From 2004 to 2011, I was Chair of the Board of Directors of
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`the Science and Technology Corp. at UNM, the university’s technology transfer
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`organization responsible for patenting and licensing UNM’s intellectual property.
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`7.
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`From 1994 until 2000, I was Chair of the Department of Chemical and
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`Nuclear Engineering at UNM. Previously, I was a Lecturer with the rank of
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`Professor in the Department of Chemical Engineering at Princeton University,
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`where I also directed the Graduate Program in Plasma Science and Technology. I
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`was associated with the Plasma Physics Laboratory at Princeton University for
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`twenty-one years, as leader of the Plasma Processing Group (1987-1994); Principal
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`Research Physicist (1984-1994); leader of the Materials Physics Group (1979-
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`1987); Research Physicist (1978-1984); and Staff Physicist (1972-1978).
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`8.
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`From 1991 to 1994, I was Director of the New Jersey SEMATECH
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`Center of Excellence for Plasma Etching. This organization, which involved four
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`universities and one industrial laboratory, was engaged in state-of-the-art research
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`in plasma processing for semiconductor manufacturing.
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`9.
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`From 1992 to 2001, I worked on three committees established by the
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`Semiconductor Industry Association (“SIA”) to generate technology “roadmaps”
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`for semiconductor manufacturing. Most recently, from 1998 to 2000, I was a
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`member of the Interconnect Technical Working Group (“TWG”) for the SIA
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`International Technology Roadmap for Semiconductors (“ITRS”).
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`10.
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`I obtained my Ph.D. in physics from Harvard University in 1972. I
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`also received a Master’s degree in physics from Harvard University in 1969, a
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`Bachelor’s degree in physics from Knox College in 1968, and a Master’s of
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`Business Administration (MBA) degree from the University of New Mexico in
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`2011.
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`11.
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`I have had significant research experience in a number of areas
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`pertaining to semiconductor devices and their manufacturing, including plasma
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`physics, plasma chemistry, plasma etching, plasma enhanced chemical vapor
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`deposition (PECVD), atomic layer deposition (ALD), which is a form of chemical
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`vapor deposition, plasma-assisted ALD, and chemical-mechanical-polishing
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`(CMP), sometimes called “chemical-mechanical-planarization”.
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`12.
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`I have published over ninety papers in my fields of expertise. Among
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`the eight United States patents on which I am an inventor, the following five
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`patents are in the area of plasma technology for manufacturing semiconductors and
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`other materials:
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` “Method and Apparatus for Coupling a Microwave Source in
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`an Electron Cyclotron Resonance System,” U.S. Patent
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`No. 5,111,111, issued May 5, 1992;
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` “Apparatus and Method for Uniform Microwave Plasma
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`Processing Using TE11 and TM01 Modes,” U.S. Patent
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`No. 5,302,803, issued April 12, 1994;
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` “Apparatus and Process for Producing High Density Axially
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`Extended Plasmas,” U.S. Patent No. 5,587,038, issued
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`December 24, 1996;
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` “Method of Making Dense, Conformal, Ultra-Thin Cap layers
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`for Nanoporous Low-k ILD by Plasma Assisted Atomic Layer
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`Deposition,” U.S. Patent No. 7,947,579, issued May 24, 2011; and
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` “Ultra-Thin Microporous/Hybrid Materials,” U.S. Patent No.
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`8,187,678, issued May 29, 2012.
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`13.
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`I have been elected as a fellow in AVS, The Society for the Science
`
`and Technology of Materials, Interfaces, and Processing.
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`14.
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`I am aware of research and development activities ongoing in
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`semiconductor manufacturing and devices since the 1980s time frame. As a result
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`of my research experience in the plasma etching, deposition, and CMP areas, I am
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`also familiar with other silicon semiconductor process technologies that directly
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`impact these areas, including such things as lithography and cleaning techniques.
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`15. As a professor, I have taught courses in silicon semiconductor devices
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`and process technology at undergraduate and graduate levels. Many of the
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`students I have taught have gone on to work for companies engaged in
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`semiconductor manufacturing. I have supervised the research of a number of
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`students in semiconductor manufacturing as part of their work for their M.S. and
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`Ph.D. degrees.
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`16. My curriculum vitae (CV) (Ex. 1009) includes additional details about
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`my experience and professional background.
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`17. The ‘264 patent generally relates to “plasma processing” (Ex. 1001,
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`1:18), with specific applications to plasma etching, plasma assisted chemical vapor
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`deposition, and materials that include silicon, silicon dioxide, silicon nitride,
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`polysilicon, and others. Id. at 1:23-31. The specification of the ‘264 patent also
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`discloses that “[p]referably, the plasma discharge is derived from the inductively
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`couple plasma source that is a de-coupled plasma source (‘DPS’) or a helical
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`resonator, though other sources can be employed.” Id. at 4:4-7.
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`18.
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`In my research, I have designed, constructed, and used de-coupled
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`plasma sources, including inductively coupled plasma sources, helicon plasma
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`sources, and electron cyclotron plasma (ECR) sources. These sources are also
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`high-density plasma sources. I have used these plasma sources for plasma etching
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`and plasma assisted chemical vapor deposition. For example, publication 74 in my
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`CV (Ex. 1009 at 15), describes a plasma processing apparatus, including an
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`electron cyclotron resonance (ECR) plasma source used for plasma etching of
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`polysilicon, silicon dioxide and silicon. The plasma processing apparatus, shown
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`in Figure 1 of this publication, includes an ECR source chamber and a downstream
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`processing chamber. The latter includes a water cooled wafer chuck (or substrate
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`holder) that incorporated Helium at 1-2 Torr pressure between the wafer and the
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`chuck to provide enhanced heat transfer.
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`19. Publications 75 and 77 in my CV (Ex. 1009 at 15) describe improved
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`operational characteristics of an ECR plasma etch reactor based on optimizing the
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`coupling of the microwave power to the plasma. The optimized coupling reduces
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`the reflected power to less than 5% of the incident power without external tuning,
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`simplifying control of the plasma operation. This work underpins U.S. Patent,
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`5,111,111, on which I am co-inventor.
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`20. Publication 78 and 79 in my CV (Ex. 1009 at 15) describe a method
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`for producing more uniform plasmas in ECR plasma etch reactors. This work
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`includes results of etching a photoresist patterned, n-doped polysilicon layer
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`deposited over an oxide layer on a silicon wafer, using an SF6/Ar gas mixture. An
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`important result is that the polysilicon etch rate uniformity across the wafer was
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`correlated with the plasma uniformity. When the plasma uniformity was
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`maximized, the polysilicon etch rate across the wafer was uniform to within about
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`2%.
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`21. Publication 81 in my CV (Ex. 1009 at 16) describes a method for
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`providing independent radio frequency (rf) wafer biasing on the wafer chuck in a
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`manner that produces more uniform ion bombardment across substrates being
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`processed. This work shows that using a lower rf frequency for wafer biasing
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`results in a more uniform distribution of ion bombardment across the wafer.
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`22. Publication 88 in my CV (Ex. 1009 at 16) addresses a critical issue of
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`using an inductively couple plasma (ICP) source to etch silicon dioxide with high
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`selectivity to silicon. Selectivity is achieved by introducing gas mixtures
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`containing C, F, and H into the plasma source, which dissociates the feedstock
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`gases to produce fluorocarbon radicals that deposit a polymer on the wafer surface.
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`The polymer suppresses etch rates of silicon compared to the etch rates of silicon
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`dioxide, thus promoting selectivity of oxide etching. The wafer chuck in this
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`plasma apparatus was water cooled. Helium at 10 Torr was introduced between
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`the water cooled chuck and wafer to promote heat transfer. The wafer temperature
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`was measured using a Luxtron fluoroptic thermometer. Concentrations of the
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`fluorocarbon radicals were measured by diode laser absorption spectroscopy and
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`correlated to measurements of the thickness of the deposited polymer.
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`23. As further examples, publications 92, 93, and 94 in my CV (Ex. 1009
`
`at 17) relate to a process of plasma-assisted atomic layer deposition, which is a
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`form of plasma-assisted chemical vapor deposition that provides layer-by-layer
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`control of thin film deposition. An inductively coupled plasma source was used in
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`this work. Publications 92 and 93 describe how plasma-assisted atomic layer
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`deposition of silicon dioxide can be applied to producing a material that can be
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`used for interlevel dielectrics between conductors in integrated circuits. These
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`plasma processes are also the subject matter in U.S. Patent Nos. 7,947,579 and
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`8,187,678, on which I am an inventor.
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`24.
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`I am being compensated for my time at my standard hourly rate of
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`$450 in connection with this proceeding. My compensation is in no way
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`contingent upon my performance or the outcome of this case.
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`25.
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`I have been asked for my technical opinions regarding the
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`understanding of a person of ordinary skill in the art (discussed below) as it relates
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`to the ‘264 patent and other reference documents.
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`26.
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`I have also been asked to provide my technical opinions on concepts
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`discussed in the ‘264 patent and other reference documents, as well as my
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`technical opinions on how these concepts relate to several claim limitations of the
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`‘264 patent in the context of the specification.
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`27.
`
`In reaching the opinions stated herein, I have considered the ‘264
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`patent, its prosecution history, the references listed in the table below, the papers
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`filed in IPR 2015-01764, including the patent owner’s responses dated Nov. 25,
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`2015 and May 16, 2016 and related exhibits 2001 through 2006, the Board’s
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`decision granting institution for this IPR, and I have also drawn as appropriate
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`upon my own education, training, research, knowledge, and personal and
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`professional experience.
`
`Exhibit
`1001
`
`Description
`U.S. Patent No. RE40,264 (the ‘264 patent)
`
`1002
`
`1003
`
`1004
`
`1005
`
`1006
`
`1007
`
`1008
`
`1010
`
`1011
`
`European Patent Application Number 90304724.9 (Tegal)
`
`U.S. Patent No. 5,151,871 (Matsumura)
`
`U.S. Patent No. 4,913,790 (Narita)
`
`U.S. Patent No. 4,645,218 (Ooshio)
`
`Declaration of Joseph L. Cecchi, Ph.D.
`
`American Heritage Dictionary, Third Edition, 1993
`
`Merriam-Webster’s Collegiate Dictionary, Tenth Edition, 1993
`
`‘264 Patent Prosecution History, 7/25/2005 Applicant’s
`Response
`
`Daniel L. Flamm and G. Kenneth Herb, “Plasma Etching
`Technology – An Overview” in Plasma Etching, An
`Introduction, Dennis M. Manos and Daniel L. Flamm, eds.
`(Academic Press, San Diego, 1988)
`
`1012
`
`J.W. Coburn and Harold F. Winters, Journal of Vacuum Science
`and Technology, 16, (1979)
`
`III. PERSON HAVING ORDINARY SKILL IN THE ART
`28.
`I have approached my analysis of the ‘264 patent from the perspective
`
`of a person having ordinary skill in the art (a PHOSITA) at the time of the
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`purported invention of the ‘264 patent, which I have been informed is December 4,
`
`1995, the earliest priority date recited by the ‘264 patent.
`
`29.
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`I have been informed by counsel that a person having ordinary skill in
`
`the art is a hypothetical person who is presumed to have known all of the relevant
`
`art at the time of the invention. Factors that may be considered in determining the
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`level of ordinary skill in the art may include: (1) type of problems encountered in
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`the art; (2) prior art solutions to those problems; (3) rapidity with which
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`innovations are made; (4) sophistication of the technology; and (5) educational
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`level of active workers in the field. I have been informed by counsel that it is from
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`the viewpoint of a person of ordinary skill in the art that determined patentability.
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`30. Based on these factors, in my opinion, a person having ordinary skill
`
`in the art of the ‘264 patent would generally have had either (i) a Bachelor’s degree
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`in engineering, physics, chemistry, materials science, or a similar field, and three
`
`or four years of work experience in semiconductor manufacturing or related fields,
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`or (ii) a Master’s degree in engineering, physics, chemistry, materials science, or a
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`similar field and two or three years of work experience in semiconductor
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`manufacturing or related fields.
`
`31. Based on this understanding of a PHOSITA for the ‘264 patent, I
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`believe that I am at least a person having ordinary skill in the art for purposes of
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`the ‘264 patent. For example, my qualifications and experiences discussed in
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`Section II above, and in my CV (Ex. 1009), demonstrate my familiarity with and
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`knowledge of the art of the ‘264 patent. I therefore believe that I am qualified to
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`offer this declaration as to how such a person would have interpreted the ‘264
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`patent and the prior art on or about December 4, 1995. Unless otherwise stated,
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`my statements below refer to the knowledge, beliefs and abilities of a person
`
`having ordinary skill in the art of the ‘264 patent at the time of the purported
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`invention of the ‘264 patent.
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`IV. RELEVANT LEGAL STANDARDS
`32. My opinions are informed by my understanding of the relevant law. I
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`understand that the patentability analysis is conducted on a claim-by-claim basis.
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`33.
`
`I understand that in proceedings before the USPTO, the claims of an
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`unexpired patent are to be given their broadest reasonable interpretation in view of
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`the specification from the perspective of a person having ordinary skill in the art. I
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`understand that the ‘264 patent has not expired.
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`34.
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`I understand that a single piece of prior art “anticipates” a claim if
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`each and every element of the claim is disclosed in that prior art. I further
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`understand that, where a claim element is not explicitly disclosed in a prior art
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`reference, the reference may nonetheless anticipate a claim if the missing claim
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`element is necessarily present in the apparatus or a natural result of the method
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`disclosed—i.e., if the missing element is “inherent.”
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`35.
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`I understand that the prior art may render a patent claim “obvious.” I
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`understand that two or more pieces of prior art that each disclose fewer than all
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`elements of a patent claim may nevertheless be combined to render a patent claim
`
`obvious if the combination of the prior art collectively discloses all elements of the
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`claim and a person having ordinary skill in the art at the time would have had
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`reason to combine the prior art. I understand that this reason to combine need not
`
`be explicit in any of the prior art, but may be inferred from the knowledge of a
`
`person having ordinary skill in the art at the time the patent application was filed. I
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`also understand that a person having ordinary skill in the art is not an automaton,
`
`but is a person having ordinary creativity. I further understand that one or more
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`pieces of prior art that disclose fewer than all of the elements of a patent claim may
`
`render a patent claim obvious if including the missing element would have been
`
`obvious to a person having ordinary skill in the art (e.g., the missing element
`
`represents only an insubstantial difference over the prior art or a reconfiguration of
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`a known system).
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`36.
`
`I understand that a patent claim is obvious if the differences between
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`the subject matter claimed and the prior art are such that the subject matter as a
`
`whole would have been obvious at the time the alleged invention was made. I
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`understand that the obviousness analysis must focus on the knowledge available to
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`one of skill in the art at the time of the alleged invention in order to avoid
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`impermissible hindsight. I further understand that the obviousness inquiry assumes
`
`that the person having ordinary skill in the art would have knowledge of all
`
`relevant references available at the time of the alleged invention.
`
`37.
`
`I also understand that the USPTO has identified exemplary rationales
`
`that may support a conclusion of obviousness, and I have considered those
`
`rationales in my analysis. The rationales include:
`
` Combining prior art elements according to known methods to
`
`yield predictable results;
`
` Simple substitution of one known element for another to obtain
`
`predictable results;
`
` Use of known technique to improve similar devices (methods or
`
`products) in the same way;
`
` Applying a known technique to a known device (methods or
`
`products) ready for improvement to yield predictable results;
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` Choosing from a finite number of identified, predictable solutions,
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`with a reasonable expectation of success, such that the effort was
`
`“obvious to try”;
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` Known work in one field of endeavor that may prompt variations
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`on the work for use in either the same field or a different one
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`based on design incentives or other market forces if the variations
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`are predictable to a person having ordinary skill in the art;
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` Some teaching, suggestion, or motivation in the prior art that
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`would have led a person having ordinary skill in the art to modify
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`the prior art reference or to combine prior art reference teachings
`
`to arrive at the claimed invention.
`
`38.
`
`I appreciate that secondary considerations may be considered, if
`
`present, as part of the overall obviousness analysis. Such considerations do not
`
`appear to be present here:
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`
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`I have never heard anyone offer praise for the ‘264 patent, nor am
`
`I aware of any commercial success attributable to the ‘264 patent.
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`
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`I am also unaware of any copying of the alleged invention of the
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`‘264 patent.
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`
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`I am unaware of any use to which the owner of the ‘264 patent has
`
`put the patent except to assert it in litigation.
`
`V. THE ‘264 PATENT
`39.
`I understand Lam is challenging claims 27-30, 33, 35-39, 42, 43, 45,
`
`46, 49, 51-54, 66, 67, and 69 (“challenged claims”) of the ‘264 patent.
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`40.
`
`In my opinion, the challenged claims are all directed to a method for
`
`processing a substrate in the manufacture of a semiconductor device. In the
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`method, a substrate is placed on a substrate holder in a chamber. The substrate
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`holder has a temperature sensor. Some claims also recite a substrate temperature
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`sensor, a substrate holder temperature control circuit, and a substrate temperature
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`control circuit. The substrate is processed at a first temperature and then at a
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`second temperature.
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`41.
`
`I understand that the ‘264 patent is a reissue of U.S. Patent No.
`
`6,231,776 (“the ‘776 patent”), which issued from an application filed on Sept. 10,
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`1998, which itself is a continuation-in-part of another application filed on Dec. 4,
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`1995 and claims priority to a provisional application filed Sept. 11, 1997. Ex.
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`1001-1. I understand that no matter which of these dates Flamm may rely on as the
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`priority date of the ‘264 patent, the references relied upon in this Petition are prior
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`art to the ‘264 patent because they all predate Dec. 4, 1995, the earliest possible
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`priority date recited by the ‘264 patent.
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`A. Representative Claim 27
`42. The crux of the alleged invention of the ‘264 patent is the
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`straightforward and well-known method of placing a substrate on a substrate
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`holder in a chamber and processing the substrate at different temperatures. For
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`example, claim 27 recites a method comprising the steps of (a) “placing a substrate
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`having a film thereon on the substrate holder in a chamber;” (b) “etching a first
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`portion of the film at a selected first substrate temperature;” and (c) “etching a
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`IPR2015-01764
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`Declaration for Reply
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`Case IPR2015-01764
`Patent RE40,264
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`second portion of the film at a selected second substrate temperature, the selected
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`second substrate temperature being different from the selected first substrate
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`temperature.” Ex. 1001, 22:8-28.
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`43. Claim 27 further recites “the substrate temperature control circuit” of
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`step (c). The claim recites “wherein substrate temperature is changed from the
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`selected first substrate temperature to the selected second substrate temperature,
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`using a measured substrate temperature, within a preselected time interval for
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`processing, and at least the first substrate temperature or the second substrate
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`temperature, in single or in combination, is above room temperature.” Id.
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`VI. OPINIONS RELATING TO PETITIONER’S REPLY
`44. As I explain in detail below, it is my opinion that claims 27-30, 33,
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`35-39, 42, 43, 45, 46, 49, 51-54, 66, 67, and 69 of the ‘264 patent are unpatentable
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`on the following grounds.
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`45.
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` Matsumura teaches a process of determining the recipe using the
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`thermal history curve in two examples. Ex. 1003, 8:6-12, Fig. 8, 8:56-68, Fig. 9.
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`Matsumura further teaches a process that involves “storing, as a predetermined
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`recipe, information showing a time-temperature relationship and applicable for
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`either heating the object to a predetermined temperature for a predetermined period
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`of time or cooling the object from a predetermined temperature over a
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`predetermined period of time, or for both.” Ex. 1003, 3:1-7. In one embodiment,
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`Matsumura discloses that the “object” can be a semiconductor wafer that is
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`mounted on a wafer stage. “The semiconductor wafer W which has a size of 8
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`inches is mounted on stage 12.” Ex. 1003, 5:32-33, Fig. 5A.
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`46. Matsumura further discloses that “[t]he stage 12 on which the
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`semiconductor wafer W is to be mounted is arranged in a chamber of the adhesion
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`unit 42.” Ex. 1003, 5:18-20, Fig. 5A. A POSA would recognize that the chamber
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`is a vacuum chamber. “A discharge pipe 35 extends from the bottom of the
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`chamber 11 to a vacuum pump (not shown).” Ex. 1003, 5:30-31, Fig. 5A.
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`47. Matsumura also discloses that process gases, HMDS and nitrogen, are
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`introduced into the vacuum chamber through a diffusion plate “opposing to the
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`wafer.” Ex. 1003, 5:20-23. A POSA would recognize that the elements and their
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`arrangement disclosed by Matsumura, including exposing a semiconductor wafer
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`to process gases in a vacuum chamber, are common to a number of semiconductor
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`processes, such as chemical vapor deposition and etching.
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`48.
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`In my opinion, based on this recognition and the explicit teaching of
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`Matsumura, see, e.g., Ex. 1003, 10:5-7, a POSA would understand that
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`Matsumura’s invention of a method and apparatus for controlling the temperature
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`of the wafer stage and the wafer when the semiconductor wafer is heated or cooled
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`would not be limited to an HMDS process, but could also be applied to an etching
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`process in an etching reactor. In particular, it is well within the skill of a POSA
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`Declaration for Reply
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`Case IPR2015-01764
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`using Matsumura’s teachings to determine the recipe using the thermal history
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`curve for a substrate in an etching process.
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`49. Although Matsumura’s two examples relate to an HDMS process,
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`Matsumura’s invention is not specific to an HDMS process.
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`50. Matsumura’s invention relates to the method and apparatus for
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`controlling temperatures of a semiconductor substrate when the semiconductor
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`substrate is heated up and cooled down. Ex. 1003, 1:7-13.
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`51. Matsumura teaches a POSA that a key to controlling change of
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`temperatures for the substrate is the thermal history curve of the substrate. Ex.
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`1003, 2:9-21, Fig. 2, 3:22-33, Fig. 3.
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`52.
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`In my opinion, a POSA would understand that Matsumura teaches an
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`accurate and flexible method of controlling the temperature of a substrate while
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`heating and cooling a substrate that could be implemented for etching in a plasma
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`etching reactor, using the time-temperature relationship taught by Matsumura. See,
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`e.g., Ex. 1003, 8:56-69, Fig. 9.
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`53. Matsumura teaches that the method is dependent on the information
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`showing the time-temperature relationship of the substrate, not the particular
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`semiconductor manufacturing process. Ex. 1003, 3:1-2.
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`54.
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`In particular, Matsumura teaches that the method may be used for
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`controlling the temperature of a substrate for not only adhesion and baking
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`Declaration for Reply
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`Case IPR2015-01764
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`processes, but for many other processes such as ion implantation, CVD, etching
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`and ashing processes. Ex. 1003, 10:3-7.
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`55.
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`In my opinion, in view of above and my previous opinion, Ex. 1006,
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`¶¶ 75-77 and 133-136, it is well within the skill of a POSA using Matsumura’s
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`teachings to determine a time-temperature recipe for Tegal’s substrate and then to
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`advantageously use this recipe with Matsumura’s control system, and heating and
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`cooling systems in the Tegal apparatus to control the temperature change in the
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`Tegal process.
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`VII. CONCLUSION
`56.
`In signing this declaration I realize that this declaration will be filed as
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`evidence in a contested case before the Patent Trial and Appeal Board of the
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`USPTO.
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`57.
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`I hereby declare that all statements made herein of my own
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`knowledge are true and that all statements made on information and belief are
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`believed to be true.
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`Executed on the 28th day of July, 2016.
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`_____________________________
`Joseph L. Cecchi
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