VALEO EXHIBIT 1042
`Valeo v. Magna
`IPR2015-____
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`2. ELECTRONIC APERTURE
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`Algorithm The architecture of the MOS image sensor is shown in Figure 1. The light sensing
`area consists of a photodiode array. The photodiodes are pre-charged to a fixed‘ bias voltage
`during a reset cycle and then isolated for a suitable exposure time. During this time incident
`light partially discharges the junction capacitances, through the generation of photo-current in
`the diodes. For each pixel, the exposure is determined by the pixel integration time i.e. the
`time between resetting and sampling. When using the normal scheme of scan registers this
`integration time has to be a fixed number of clock cycles (usually a field time).
`
`The novel scheme is to define the sample and reset signals in such a way that the time between
`them can be varied. The integration time t,,,,
`is then defined to be the sum of a variable
`
`number m of line intervals plus a variable number n of clock intervals:
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`’im=m Xtline+nXtclk
`
`is the line period.
`is the pixel clock period and t,,.,,,
`where t,,,,
`refer m X t,,.,,, as coarse settlement, and n X t,,, as fine settlement.
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`(n ><t,,,, St,,,,, ,m ><t,,-,,, stfidd). We
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`is being sampled and then reset, rows
`—coarse settlement: At a particular line time, row i
`i +1 through i+m are integrating and all other rows are being reset during the line period, as
`shown in Figure 2.
`
`—fine settlement: Fine settlement is achieved by varying -the reset period. The reset time can
`range between a few clock intervals and nearly one line time, resulting in extra integration time
`n ><t,,,, added to the coarse settlement. The fine settlement becomes more important when
`m X t,,-,,, is smaller. In fact, the exposure is dominated by the fine settlement when m equals 0.
`
`Circuitry The problem is then to generate and decode suitable signals in such a way as to
`enable the correct rows and columns of the array in sequence. The vertical scan register has
`been replaced by a scan register with decoding, as shown in Figure 3 and Figure 4. The
`single-bit data-stream has been augmented with other signals, such as scan, sample, and reset.
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`3. ELECTRONIC EXPOSURE CONTROLLER
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`Algorithm The image pixel stream is compared with two DC references to pick up "very white
`pixels" and "very black pixels". A "very black pixel" means its value is below a black reference
`and a "very white pixel" is above a white reference. These occurrences are counted, and a
`threshold number is set to judge the present exposure. If "very black pixel" number is greater
`than the threshold number and "very white pixel" number is less, the picture is thought to be
`too dark, and the exposure should be increased. On the other hand, if the "very white pixel"
`number is greater than the threshold number and the "very black pixel" number is less, the pic-
`ture is thought too bright, and the exposure should be decreased. When the numbers are both
`greater or both less than the threshold, the exposure is thought to be acceptable. No action will
`needed in this case.
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`The new integration time is calculated according to the following formula:
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`T,,,,, = T,,,,(1‘_"step)
`
`, if exposure is increased/decreased;
`
`= T,,,,
`
`, if no action.
`
`where, Tm,
`
`is new integration time for the next frame, T,,,,
`
`is the present integration time.
`
`Figure 5 shows the block diagram of a simple exposure controller, which costs
`Circuitry
`approximately 1,000 gates.
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`-comparator: The video stream is fed into this block. Two DC voltage references are set to
`identify "very white pixels" and "very black pixels".
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`VALEO EX. 1042_002
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`-judge: This block judges the present exposure by counting numbers of "very black" and "very
`white" pixels according to the above algorithm.
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`-calculator: The new integration time is calculated here according to the above formula.
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`-driving block: This block produces the driving signals, according to T,,,,,, needed by elec-
`tronic aperture, such as scan, reset and sample.
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`4. APPLICATIONS
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`We report here two working cameras, as examples of on-chip automatic exposure control tech-
`niques.
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`The first example is a single-chip CMOS video camera[4]. It has a 312x 287 pixel sensor array,
`together with the necessary sensing, addressing, and amplifying circuitry. The chip has a 2,000
`
`gate logic processor. Half of these gates generate synchronization timing to format a standard
`composite video output. The other half of the gates are the exposure controller. The chip
`measures 7.S8X7.56mm, using 1.5 pun, 2 level metal CMOS technology. The exposure con-
`troller and decode circuitry occupies 10% of the area.
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`Our second example is a low-resolution camera for use in security applications. The chip has a
`smaller sensor array (156><100) but more control functions, measures 5.57X4.00mm in the
`same technology as the first example. The exposure controller and decode circuitry in this case
`occupies 20% of the area.
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`Both camera modules include the camera chip with an attached miniature lens, a clock source,
`a 5 volt power supply, plus one bipolar transistor and a small number of resistors and capacitors
`required to match the line impedance to the monitor and decouple the power supply. Satisfac-
`tory exposure control performance has been achieved for both. The exposure range is 40,000:1
`and quality of the pictures are good across the entire range. The automatic adjustment is fairly
`smooth and fast.
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`5. CONCLUSIONS
`
`We have developed a novel electronic aperture and a simple exposure controller, which can be
`integrated with image sensor to form single-chip vision systems. Comparing with today’s solid-
`state cameras, the control range is much wider, and the cost, power consumption and size are
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`dramatically reduced.
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`6. ACKNOWLEDGEMENTS
`
`We acknowledge support received from the Science and Engineering Research Council (Grant
`GR/F 36538 IED2/1/1159).
`’
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`7. REFERENCES
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`[1] D. Renshaw, et. al., "ASIC Vision", Proc. IEEE Custom Integrated Circuits Conference,
`1990, pp 3038-3041.
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`[2] D. Renshaw, et. al., "ASIC Image Sensors", Proc. IEEE International Symposium on Cir-
`cuits and Systems, 1990, pp 7.3.1-7.3.4.
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`"Solid Sensors Continue to Improve Their Image", Journal of Electronic
`[3] A. Asano,
`Engineering, 25 (1988) Nov., Tokyo, pp 64-67.
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`[4] G. Wang, et. al., "CMOS Video Cameras", Euro ASIC 91, Paris.
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`VALEO EX. 1042_003
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`sample
`and reset
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`integrate
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`reset
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`$3
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`$5
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`H
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`i+1
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`
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`horizontal addressing
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`amP& —
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`buflel
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`column sense amps
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`........................................ E
`§ i+
`13
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`E 1+m+
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`light
`sensing
`area
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`E
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`N —.—.—__.jj
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`Figure 2. Function at each row
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`
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`Figure 1. Architecture of the image sensor
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`decoder cell
`34
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`Va)
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`V(i)
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`V(N
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`sample reset
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`_
`_
`vertical shift
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`scan register cell
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`
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`Vi
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`V(i)
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`sample
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`xi-1
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`reset
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`Figure 4 . Decode circuitry
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`Figure 3 . Vertical shift register with docoding
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`references
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`VWP
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`comparator _ judge _ Calculatm
`VBP
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`analogue
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`output
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`
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`word
`lines
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`I
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`integration
`time
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`“ F
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`driving block
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`electronic
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`aperture
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`igure 5. Block diagram of electronic exposure controller
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`VALEO EX. 1042_004