`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`__________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`__________________________________________________________________
`
`SONY CORPORATION, SAMSUNG ELECTRONICS CO., LTD.,
`SAMSUNG DISPLAY CO., LTD
`
`Petitioners
`
`
`
`Patent No. 7,202,843
`Issue Date: April 10, 2007
`Title: DRIVING CIRCUIT OF A LIQUID CRYSTAL DISPLAY
`PANEL AND RELATED DRIVING METHOD
`__________________________________________________________________
`
`CORRECTED PETITION FOR INTER PARTES REVIEW
`
`OF U.S. PATENT NO. 7,202,843
`
`No. IPR2015-00862
`__________________________________________________________________
`
`
`
`
`
`
`
`
`
`

`

`Table of Contents
`
`
`Page
`
`I. Mandatory Notices (37 C.F.R. § 42.8) ............................................................................ 1
`II. Grounds for Standing (37 C.F.R. § 42.104(a)) .............................................................. 1
`III. Identification of Challenge (37 C.F.R. § 42.104(b)(1)-(3)) and
` Relief Requested (37 C.F.R. § 42.22(a)(1)) ..................................................................... 2
`A. Background of the ’843 Patent .................................................................................... 2
`B. Printed Publications Relied On ................................................................................... 3
`1. Sony-1003: U.S. Patent Application Publication No. 2003/0156092
` (August 21, 2003) (“Suzuki”) .................................................................................... 3
`2. Sony-1004, Sony-1005: Japanese Laid Open Patent Application
` No. 2002-132224 (May 9, 2002) and
` Certified English Translation Thereof (“Nitta”) ................................................... 4
`3. Sony-1006: U.S. Patent Application Publication
` No. 2003/0214473 (Nov. 20, 2003) (“Lee”) ......................................................... 7
`4. Sony-1007: U.S. Patent Application Publication
` No. 2002/0044115 (April 18, 2002) (“Jinda”) ....................................................... 7
`C. Statutory Grounds for Challenge ................................................................................ 9
`D. Claim Construction ...................................................................................................... 9
`1. “blur clear converter” ............................................................................................... 9
`IV. How the Challenged Claims Are Unpatentable (37 C.F.R. §42.104(b)(4)-(5)) ....... 11
`A. Claims 1-2 Would Have Been Obvious Over Suzuki in
` View of Nitta and Lee ................................................................................................. 12
`1. Claim 1 ...................................................................................................................... 13
`i. A driving circuit for driving an LCD panel, ..................................................... 13
`ii. the LCD panel comprising: ............................................................................... 13
`a. a plurality of scan lines; .................................................................................. 15
`b. a plurality of data lines; .................................................................................. 15
`c. and a plurality of pixels . . . ............................................................................ 16
`iii. the driving circuit comprising: .......................................................................... 18
`a. a blur clear converter for . . . ; ........................................................................ 18
`1. for receiving frame data . . . ...................................................................... 19
`2. delaying current frame data to generate delayed frame data ................ 20
`3. generating a plurality of overdriven pixel data . . . ................................. 21
`b. a source driver for generating a plurality of data impulses . . . ................. 24
`c. a gate driver for applying a scan line voltage . . . . ..................................... 28
`2. Claim 2 ...................................................................................................................... 30
`i. Analysis I: .............................................................................................................. 31
`
`
`ii
`
`

`

`a. The driving circuit of claim 1 wherein the blur clear
` converter further comprises: ........................................................................ 31
`b. a multiplier for multiplying a frequency of a control signal . . .; ............. 32
`c. a first image memory for delaying the pixel data for a frame period; ...... 33
`d. a processing circuit for generating the plurality of
` overdriven pixel data . . .; .............................................................................. 34
`e. a second image memory for storing the overdriven pixel data; ................ 34
`f. a memory controller for controlling the second image memory . . . . ..... 36
`ii. Analysis II ............................................................................................................ 38
`a. The driving circuit of claim 1 wherein the blur clear
` converter further comprises: ........................................................................ 38
`b. a multiplier for multiplying a frequency of a control signal . . .; .............. 38
`c. a first image memory for delaying the pixel data for a frame period; ...... 40
`d. a processing circuit for generating the plurality of
` overdriven pixel data . . .; ............................................................................. 40
`e. a second image memory . . .; a memory controller for . . .
` the second image memory . . . . ..................................................................... 40
`B. Claims 1 and 3 Would Have Been Obvious Over Jinda
` in View of Nitta and Lee ............................................................................................ 43
`1. Claim 1 ...................................................................................................................... 44
`i. A driving circuit for driving an LCD panel, ..................................................... 44
`ii. the LCD panel comprising: ............................................................................... 44
`a. a plurality of scan lines; .................................................................................. 45
`b. a plurality of data lines; .................................................................................. 45
`c. and a plurality of pixels . . . ............................................................................ 46
`iii. the driving circuit comprising: .......................................................................... 47
`a. a blur clear converter for . . .; ........................................................................ 47
`1. for receiving frame data every frame period . . . .................................... 47
`2. delaying current frame data to generate delayed frame data . . . .......... 48
`3. generating a plurality of overdriven pixel data . . . ................................. 49
`b. a source driver for generating a plurality of data impulses . . . ...................... 51
`c. a gate driver for applying a scan line . . . . ........................................................ 53
`2. Claim 3 ...................................................................................................................... 54
`i. The driving circuit of claim 1 wherein the
` blur clear converter further comprises: ............................................................. 54
`ii. a multiplier for multiplying a frequency of a control signal . . .; .................. 54
`iii. a first image . . .; a second image memory . . .;
` a third image memory . . .; ................................................................................. 55
`iv. a memory controller . . .; ................................................................................... 58
`v. a processing circuit . . .; and a comparing circuit . . . . .................................... 59
`VI. Conclusion ...................................................................................................................... 60
`
`iii
`
`

`

`Ex. Sony-1001
`Ex. Sony-1002
`Ex. Sony-1003
`
`Ex. Sony-1004
`
`Ex. Sony-1005
`
`Ex. Sony-1006
`
`Ex. Sony-1007
`
`Ex. Sony-1008
`Ex. Sony-1009
`
`Ex. Sony-1010
`Ex. Sony-1011
`
`Ex. Sony-1012
`
`Ex. Sony-1013
`
`Ex. Sony-1014
`Ex. Sony-1015
`Ex. Sony-1016
`Ex. Sony-1017
`
`
`
`Exhibit List
`
`U.S. Patent No. 7,202,843
`Publicly Available File History of U.S. Patent No. 7,202,843
`U.S. Patent Application Publication No. 2003/0156092 (August
`21, 2003)
`Japanese Laid Open Patent Application No. 2002-132224 (May 9,
`2002)
`Certified Translation of Japanese Laid Open Patent Application
`No. 2002-13224
`U.S. Patent Application Publication No. US 2003/0214473 (Nov.
`20, 2003)
`U.S. Patent Application Publication No. US 2002/0044115 (April
`18, 2002)
`Ernst Lueder, LIQUID CRYSTAL DISPLAYS (2001)
`William C. O’Mara, LIQUID CRYSTAL FLAT PANEL DISPLAYS
`(1993)
`Betty Prince, HIGH PERFORMANCE MEMORIES (1996)
`Baek-woon Lee, et al., Reducing Gray-Level Response to One Frame:
`Dynamic Capacitance Compensation (2001)
`IEEE 100: The Authoritative Dictionary of IEEE Standards Terms (7th
`ed., 2000)
`MCGRAW-HILL DICTIONARY OF SCIENTIFIC AND TECHNICAL
`TERMS (6th ed., 2003)
`MICROSOFT COMPUTER DICTIONARY (5th ed., 2002)
`Declaration of Thomas Credelle
`Curriculum Vitae of Thomas Credelle
`U.S. Patent Application Publication No. 2003/0048247 (March
`13, 2003)
`
`
`
`iv
`
`

`

`I. Mandatory Notices (37 C.F.R. § 42.8)
`
`Real Party-in-Interest: Sony Corporation, Samsung Electronics Co., Ltd., and
`
`Samsung Display Co., Ltd. (“Petitioners”); Sony Electronics Inc., Sony Corporation
`
`of America, and Samsung Electronics America, Inc..
`
`Related Matters: The following matters would affect or be affected by the decision in
`
`this proceeding: Surpass Tech Innovation LLC ("Surpass") v. Sharp Corp., et al., No. 14-cv-
`
`00338-LPS (D. Del.); Surpass v. Samsung Display Co., Ltd., et al., No. 14-cv-00337-LPS
`
`(D. Del.); Surpass v. LG Display Co. Ltd., et al., No. 14-cv-00336-LPS (D. Del.); Sharp
`
`Corp. v. Surpass, IPR2015-00021 (P.T.A.B.); Petitioners’ IPR2015-00863 (P.T.A.B.).
`
`Counsel: Lead Counsel: Michelle Carniaux (Reg. No. 36,098), Backup Counsels:
`
`Lewis Popovski (Reg. No. 37,423), and Aaron Zakem (Reg. No. 72,521), all of
`
`Kenyon & Kenyon LLP; and Backup Counsel: Jay I. Alexander (Reg. No. 32,678), of
`
`Covington & Burling LLP.
`
`Electronic Service: Sony-SurpassTech@kenyon.com
`
`Post and Delivery: Kenyon & Kenyon LLP, One Broadway, New York, NY 10004.
`
`Telephone: 212-425-7200
`
`
`
`
`
`Facsimile: 212-425-5288
`
`II. Grounds for Standing (37 C.F.R. § 42.104(a))
`
` Petitioners certify that the patent for which review is sought, U.S. Patent No.
`
`7,202,843 (“the ’843 Patent,” Sony-1001), is available for inter partes review and that
`
`Petitioners are not barred or estopped from requesting an inter partes review
`
`challenging the patent claims on the grounds identified in this petition.
`
`1
`
`

`

`
`III. Identification of Challenge (37 C.F.R. § 42.104(b)(1)-(3)) and Relief
`Requested (37 C.F.R. § 42.22(a)(1))
`
`
` Petitioners challenge claims 1-3 of the ’843 Patent under 35 U.S.C. § 103.
`
`Cancellation of those claims is requested. In support of the following grounds,
`
`Petitioners submit the declaration of technical expert Thomas Credelle (Sony-1015).
`
`A. Background of the ’843 Patent
`
` The ’843 Patent describes the invention as a driving circuit of a liquid crystal
`
`display (LCD) panel, and more particularly a driving circuit and method for decreasing
`
`the reaction time of a liquid crystal element by applying two data impulses to a pixel
`
`electrode within one frame period. ’843 Patent at 1:8-12.
`
`According to the ’843 Patent, LCD devices have a disadvantage compared to
`
`traditional Cathode Ray Tube (CRT) displays due to the characteristics of liquid
`
`crystal molecules. Id. at 1:20-24. To drive a pixel in an LCD device, a driving circuit
`
`applies a charge which corresponds to the desired gray level for the pixel. Id. at 1:39-
`
`52. The charge causes the pixel’s liquid crystal molecules to “twist” to a desired
`
`transmission rate (i.e., brightness level). Id. at 1:19-24, 1:53-65. The driving circuit
`
`outputs the appropriate charge based on input frame data, which defines the gray level
`
`that each pixel must reach within a frame period. Id. at 1:27-35. However, “[t]here is a
`
`time delay when charging liquid crystal molecules. . . . Such a delay causes blurring.”
`
`Id. at 1:62-2:2. The ’843 Patent describes that in order to address the blurring issue,
`
`“some conventional LCD are overdriven, which means applying a higher or a lower
`
`2
`
`

`

`data impulse to the pixel electrode to accelerate the reaction speed of the liquid crystal
`
`molecules, so that the pixel can reach the predetermined gray level in a predetermined
`
`frame period.” Id. at 2:2-7. While the overdrive technique improves the reaction speed
`
`of liquid crystal molecules, the ’843 Patent alleges that the desired transmission rate
`
`still cannot be reached within one frame period, thus the blurring issue persists. Id. at
`
`2:7-12. The ’843 Patent purports to address the blurring issue by providing a driving
`
`circuit that generates and applies a plurality of overdriven data impulses (i.e., charges)
`
`to each pixel of an LCD device within a single frame period. Id. at 2:33-48. In the
`
`driving circuit, a source driver “generate[s] corresponding data line voltages . . .
`
`according to the plurality of overdriven data included in the frame signals G in order
`
`to drive the LCD panel.” Id. at 3:28-36. Thus, the data impulses are voltages applied
`
`to the pixels of the LCD panel. Credelle Decl. at ¶ 29. The overdriven data impulses
`
`are generated by comparing the input frame data for the current frame period with
`
`delayed frame data for the preceding frame period; the delayed frame data is stored in
`
`a memory device. Id. at 2:33-40, 4:49-55; 5:11-13.
`
`B. Printed Publications Relied On
`
` Petitioners rely on the following patents and publications:
`
`1. Sony-1003: U.S. Patent Application Publication No. 2003/0156092
`
`(August 21, 2003) (“Suzuki”)
`
`
`
`Suzuki was filed on September 30, 2002 and published on August 21, 2003, and is
`
`prior art to the ’843 Patent under at least 35 U.S.C. § 102(e). Suzuki was not cited
`
`3
`
`

`

`during the prosecution of the ’843 Patent.
`
`
`
`Suzuki discloses a driving circuit for an LCD that seeks to improve the display of -
`
`moving images on LCD devices. Suzuki at ¶¶ 8, 14, 18, 51. Like the ’843 Patent,
`
`Suzuki recognizes that there is a time delay when applying a charge to a pixel of an
`
`LCD to alter its brightness level, which can result in blurring of displayed images. Id.
`
`at ¶ 4. Suzuki likewise describes the conventional overdrive technique, and posits that
`
`deficiencies in the conventional overdrive method render it insufficient to prevent
`
`blurring or “trails.” Id. at ¶¶ 5-7. To address the blurring issue, Suzuki describes a
`
`driving circuit that divides a frame period into a plurality of temporal subfields, and
`
`supplies data signal voltages (i.e., data impulses) to each of the liquid crystal cells of an
`
`LCD panel in each subfield of the frame period; the data signal voltages correspond
`
`to “overshoot” and “overdrive” values, both of which are overdriven pixel values. Id.
`
`at ¶¶ 11, 39, 42, 44, 46 & Fig. 2; Credelle Decl. at ¶¶ 64-67. Accordingly, multiple
`
`overdriven data impulses are applied to each pixel of the LCD panel within every
`
`frame period. Id.
`
`2. Sony-1004, Sony-1005: Japanese Laid Open Patent Application No. 2002-
`
`132224 (May 9, 2002) and Certified English Translation Thereof (“Nitta”)
`
` Nitta was published on May 9, 2002, and is prior art to the ’843 Patent under at
`
`least 35 U.S.C. § 102(b). All citations to Nitta herein refer to the certified English
`
`translation of the Japanese Patent Office publication, provided herewith as Exhibit
`
`Sony-1005. Nitta was not cited during the prosecution of the ’843 Patent.
`
`4
`
`

`

` Nitta teaches an LCD device and driving method that “can display moving
`
`pictures with high picture quality in an active matrix liquid crystal display device.”
`
`Nitta at ¶ 1. Like the ’843 Patent, Nitta acknowledges the “blurriness” issue when
`
`displaying moving pictures on LCD devices because “the response speed of the liquid
`
`crystal material is equal to or slower than the frame period of the display signal.” Id. at
`
`¶¶ 2-3. Likewise, Nitta recognizes that prior attempts to address this issue have
`
`included “superimposing on the display signal a signal that emphasizes changes in the
`
`display signal,” but asserts that such methods are inadequate to accelerate the
`
`response speed of the liquid crystal material to one frame period or less. Id. at ¶¶ 4-5.
`
`To solve this problem, Nitta discloses a liquid crystal control circuit that divides a
`
`frame period into a plurality of temporal subdivisions, referred to as “fields,” and
`
`applies a data voltage to every pixel of an LCD panel in each field. Id. at ¶ 9.
`
`Specifically, in the first embodiment disclosed in Nitta, “one conventionally driven
`
`frame is divided into two fields, and driving is done at twice the speed.” Id. at ¶ 27.
`
`In order to apply two data voltages within one frame period, the driving circuit of
`
`Nitta uses a liquid crystal timing controller to double the speed of the vertical and
`
`horizontal synchronization signals. Id. at ¶ 47 (“[T]he liquid crystal timing controller
`
`104 supplies, to data driver 102 and scan driver 103, the liquid crystal synchronization
`
`signals FLM and CL1, CL3 in which VSYNC and HSYNC have accelerated two
`
`fold.”). Nitta’s driver circuit then applies the data voltages to the pixels of the LCD
`
`panel according to the doubled synchronization signals. Id. at ¶¶ 32 (“The liquid
`
`5
`
`

`

`crystal display device 100 of this embodiment . . . has . . . a data (signal) driver 102
`
`that conveys to the signal lines of the TFT liquid crystal panel 101 voltages that
`
`correspond to the display data . . . .”), 49 (“according to CL1, gradation voltages
`
`corresponding to the OUTdata are supplied to the signal lines”). In Nitta’s first
`
`embodiment, the data signal applied in the first field of the frame period corresponds
`
`to “corrected” or “conversion processed” data, and the data signal applied in the
`
`second field corresponds to the unchanged data for the frame period. Id. at ¶¶ 28, 37.
`
`As taught by Nitta, the “corrected” or “conversion processed” data is an example of
`
`overdriven data in the parlance of the ’843 Patent. Id. at ¶¶ 51-53 & Fig. 12; Credelle
`
`Decl. at ¶ 74. While the first embodiment of Nitta applies only one “conversion
`
`processed” data signal within a frame period, Nitta teaches that a frame period can be
`
`divided into three or more fields and “conversion processed” data signals applied in
`
`all but one of the fields, suggesting that multiple overdriven data voltages can be
`
`applied to each pixel of an LCD panel within one frame period. Nitta at ¶ 18 & claim
`
`5. Nitta further teaches that the driving circuit of its first embodiment includes a data
`
`driver 102 that comprises a latch circuit (1) 83 and a latch circuit (2) 85. Id. at ¶ 43.
`
`The latch circuits serve to convert image data received in a serial stream of data into
`
`multiple parallel streams of data, so that corresponding data voltages can be applied to
`
`the pixels of the LCD panel line by line by a liquid crystal drive circuit 87 in
`
`synchronization with the multiplied horizontal synchronization signal CL1. Id. at ¶¶
`
`43-44; Credelle Decl. at ¶¶ 88-90.
`
`6
`
`

`

`3. Sony-1006: U.S. Patent Application Publication No. 2003/0214473 (Nov.
`
`20, 2003) (“Lee”)
`
` Lee was filed on November 19, 2002, and published on November 20, 2003, and
`
`is prior art to the ’843 Patent under at least 35 U.S.C. § 102(e). Lee was not cited
`
`during the prosecution of the ’843 Patent.
`
` Lee describes an LCD device in which dynamic capacitance compensation
`
`(“DCC”) is performed. Lee at ¶ 2. Like the ’843 Patent, Lee explains that because it
`
`takes time for a liquid crystal material to respond to an applied voltage, there is a delay
`
`in reaching a desired brightness level. Id. at ¶ 8. According to Lee, DCC addresses this
`
`issue by “process[ing] RGB data by comparing gray value for a pixel in a previous
`
`frame with gray value for a pixel in a current frame and adding a predetermined value
`
`larger than the difference between the gray values to the gray value of the previous
`
`frame,” thus “minizi[ing] the time delay by applying a voltage larger than the
`
`predetermined voltage for a given gray to the pixel.” Id. In other words, DCC is an
`
`example of an overdrive operation as described in the ’843 Patent. See Credelle Decl.
`
`at ¶ 46. Lee illustrates several embodiments of circuits for performing DCC that
`
`include memory controllers for directing the operation of frame memories used for
`
`storing and outputting current and delayed frame data. Lee at Figs. 1, 2, 6, 8, 12.
`
`4. Sony-1007: U.S. Patent Application Publication No. 2002/0044115 (April
`
`18, 2002) (“Jinda”)
`
`
`
`Jinda was filed on August 2, 2001 and published on April 18, 2002, and is prior art
`
`to the ’843 Patent under at least 35 U.S.C. § 102(b). Jinda was cited, but not discussed,
`
`7
`
`

`

`during the prosecution of the ’843 Patent. Jinda discloses a driving circuit and method
`
`for an LCD device for improving the display quality of moving images. Jinda at ¶ 1.
`
`Like the ’843 Patent, Jinda states that LCD devices have a disadvantage in displaying
`
`moving images compared to CRT devices due to the slow response speed of liquid
`
`crystals with respect to changes in transmittance. Id. at ¶ 2. Jinda also recognizes that
`
`prior attempts to address this problem included “superimposing a difference
`
`component by comparison with the previous image signal” (i.e., the overdrive
`
`method), but states that such methods were insufficient to allow a liquid crystal
`
`element to reach a desired transmittance level within one frame period. Id. at ¶¶ 4, 6.
`
`To solve this issue, Jinda discloses an LCD device and driving method wherein a
`
`plurality of overdriven data signal voltages (i.e., data impulses) are applied to the pixels
`
`of an LCD panel within one vertical synchronization interval (i.e., a frame period). Id.
`
`at ¶¶ 8-10, 37-38.1 Like the ’843 Patent, image data is stored in memory to create
`
`
`1 A “vertical synchronization interval” as used in Jinda is a frame period. Credelle
`
`Decl. at ¶¶ 95-97. As shown in Fig. 2 of Jinda, image data is read into a “frame
`
`memory” in one vertical synchronization interval. Jinda at ¶¶ 37-38. The image data
`
`read in during the period of one vertical synchronization interval includes image data
`
`for each pixel of an LCD device. Jinda at ¶¶ 8-9; Credelle Decl. at ¶¶ 95-96. A frame
`
`is a complete screen or picture; accordingly, a vertical synchronization interval as
`
`described in Jinda is a frame period. Credelle Decl. at ¶ 97.
`
`8
`
`

`

`delayed frame data, and the value of the overdriven data voltages to be applied to the
`
`LCD panel are determined based on comparing the delayed frame data and current
`
`frame data. Id. at ¶¶ 37-38.
`
`C. Statutory Grounds for Challenge
`
`Cancelation of claims 1-3 is requested on the following grounds:
`
`A. Claims 1 and 2 are invalid under 35 U.S.C. § 103 as being obvious over Suzuki
`
`in view of Nitta and Lee.
`
`B. Claims 1 and 3 are invalid under 35 U.S.C. § 103 as being obvious over Jinda in
`
`view of Nitta and Lee.
`
`D. Claim Construction
`
`Generally, the claim terms should be given their broadest reasonable construction
`
`in view of the specification, and should be construed in accordance with their
`
`ordinary meaning. One specific term is discussed below.
`
`
`
`
`1. “blur clear converter”
`
`Claim 1 of the ’843 patent recites “a blur clear converter for receiving frame data
`
`every frame period, each frame data comprising a plurality of pixel data and each pixel
`
`data corresponding to a pixel, the blur clear converter delaying current frame data to
`
`generate delayed frame data and generating a plurality of overdriven pixel data within
`
`every frame period for each pixel.” This language invokes 35 U.S.C. § 112(6), because
`
`“blur clear converter” is a coined term that is not recognized as a noun connoting
`
`structure, and does not connote sufficiently definite structure to a person of ordinary
`
`9
`
`

`

`skill in the art (“POSA”). See Credelle Decl. at ¶ 32; Mass. Inst. of Tech. v. Abacus
`
`Software, 462 F.3d 1344, 1353 (Fed. Cir. 2006); Lighting World, Inc. v. Birchwood Lighting,
`
`Inc., 382 F.3d 1354, 1360 (Fed. Cir. 2004) (“What is important is whether the term is
`
`one that is understood to describe structure, as opposed to a term that is simply a
`
`nonce word or a verbal construct that is not recognized as the name of structure and
`
`is simply a substitute for the term ‘means for.’”).
`
`A means-plus-function limitation is construed by identifying the claimed function,
`
`and then determining the corresponding structure that is clearly linked to the
`
`function. See Medtronic, Inc. v. Advanced Cardiovascular Sys., 248 F.3d 1303, 1311 (Fed.
`
`Cir. 2001) (“Structure disclosed in the specification is ‘corresponding’ structure only if
`
`the specification or prosecution history clearly links or associates that structure to the
`
`function recited in the claim.”) (quoting B. Braun Med., Inc. v. Abbott Labs., 124 F.3d
`
`1419, 1424 (Fed. Cir. 1997)). The claimed functions for the “blur clear converter,” as
`
`recited in claim 1 of the ‘843 patent, are (1) “receiving frame data every frame period,”
`
`(2) “delaying current frame data to generate delayed frame data,” and (3) “generating a
`
`plurality of overdriven pixel data within every frame period for each pixel.” Credelle
`
`Decl. at ¶ 33.
`
`The ’843 patent discloses two embodiments of the “blur clear converter.” In the
`
`first embodiment, shown in Fig. 7, the structure clearly linked to the functions of (1)
`
`“receiving frame data every frame period” and (2) “delaying current frame data to
`
`generate delayed frame data” is a first image memory 44 controlled by a first memory
`
`10
`
`

`

`controller 48. ’843 Patent at 4:44-55 & Fig. 7; Credelle Decl. at ¶ 34. The first image
`
`memory 44 receives frame data every frame period, and “[t]he first image memory 44
`
`is controlled by the first memory controller 48 to delay current pixel data Gm for a
`
`frame period to generate delayed pixel data Gm-1.” ’843 Patent at 4:49-53 & Fig. 7. In
`
`the first embodiment, the structure clearly linked to the function of (3) “generating a
`
`plurality of overdriven pixel data within every frame period for each pixel” is
`
`processing circuit 42,2 which “generates a plurality of overdriven pixel data GN
`
`according to the current pixel data Gm and the delayed pixel data Gm-1.” Id. at 4:53-
`
`55 & Fig. 7; Credelle Decl. at ¶ 34. Therefore, the corresponding structure associated
`
`with the “blur clear converter” of claim 1 may comprise a memory and memory
`
`controller, which receive frame data every frame period and generate delayed pixel
`
`data, and a processing circuit for generating a plurality of overdriven pixel data
`
`according to the current pixel data and the delayed pixel data, and equivalents thereof.
`
`A second embodiment of the “blur clear converter” is shown in Fig. 8, and is not
`
`further discussed herein. ’843 Patent at 4:64-5:22.
`
`IV. How the Challenged Claims Are Unpatentable (37 C.F.R. §42.104(b)(4)-(5))
`
`
`2 While the ’843 patent generally discloses a “processing circuit 42” for generating a
`
`plurality of overdriven pixel data, it does not sufficiently disclose any corresponding
`
`structure or algorithm for performing that function. See Aristocrat Techs. Australia Pty
`
`Ltd. v. Int’l Game Tech., 521 F.3d 1328, 1334-38 (Fed. Cir. 2008).
`
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` The challenged claims are invalid for the reasons discussed below.
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`A. Claims 1-2 Would Have Been Obvious Over Suzuki in View of Nitta and
`Lee
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`The crux of the alleged invention of independent claim 1 of the ’843 Patent is a
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`driving circuit that generates multiple overdriven pixel data for each pixel of an LCD
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`panel within every frame period according to received frame data, and that applies
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`multiple data impulses to each of the pixels of the LCD panel within one frame
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`period, with the data impulses corresponding to the overdriven pixel data. ’843 Patent
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`at 1:8-12, 5:45-55 & claim 1. The remaining elements recited in claim 1 are nothing
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`more than conventional LCD components. Id., claim 1; Credelle Decl. at ¶ 50.
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`As described in detail below, at least Suzuki expressly discloses the crux of claim 1.
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`Suzuki at ¶¶ 9, 38, 40, 52-54. Suzuki also discloses an LCD panel but does not
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`expressly describe its structure. Nitta describes the structural elements of a
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`conventional LCD panel. Nitta at ¶ 32 & Fig. 3. Suzuki further describes an LCD
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`driving circuit including a frame memory for generating and outputting delayed frame
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`data, but does not expressly describe the controller required to operate the frame
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`memory. Suzuki at ¶¶ 9, 38, 40. Lee describes a conventional LCD driving circuit for
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`performing overdrive operations, and illustrates the memory controller for directing
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`the operation of the frame memories. Lee at ¶¶ 2, 8, 11-12, 49, 52 & Figs. 1, 6. Thus,
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`Suzuki in view of Nitta and Lee disclose every element of claim 1, and thus renders
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`this claim obvious. And, as described below, Suzuki in view of Nitta and Lee also
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`renders dependent claim 2 obvious.
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`1. Claim 1
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`For the reasons set forth below, the combination of Suzuki, Nitta, and Lee renders
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`claim 1 obvious, and thus invalid under 35 U.S.C. § 103.
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`i. A driving circuit for driving an LCD panel,
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`Suzuki teaches a “display control device of a liquid crystal panel for controlling
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`display data to be displayed on the liquid crystal panel,” in which a timing control unit
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`“outputs driving signals according to the received display data.” Suzuki at ¶¶ 2, 10.
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`Thus, Suzuki discloses the preamble of claim 1. Likewise, Nitta teaches “a liquid
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`crystal display device drive method” for a LCD device that has “a signal driver
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`circuit.” Nitta at ¶¶ 1, 9. As such, Nitta also discloses the preamble of claim 1. Lee
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`similarly teaches a “liquid crystal display” including a “gate driver” and a “source
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`driver,” disclosing the preamble of claim 1. Lee at ¶¶ 2, 17.
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`ii. the LCD panel comprising:
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`Although claim 1 purports to recite a “driving circuit” for an LCD panel, the claim
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`also sets forth elements directed to the LCD panel itself. Specifically, according to
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`claim 1, the LCD panel to be driven by the “driving circuit” comprises scan lines, data
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`lines, and pixels, and is nothing more than a conventional LCD panel that was well
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`known to a POSA. See Credelle Decl. at ¶¶ 50-54; Sony-1009 at 34. Indeed, in its
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`preliminary response to a pending petition for inter partes review of the ’843 Patent
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`filed by a third party, the Patent Owner admitted that “[a] conventional LCD panel
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`includes a source driver connected to data lines arranged in a first direction, a gate
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`driver connected to scan lines arranged in a second direction, and a matrix of pixels
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`arranged at the intersection of each scan line and data line.” IPR2015-00021, Paper 9
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`at 3 (P.T.A.B. Jan. 20, 2015). Suzuki discloses a conventional LCD panel. See Suzuki at
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`¶¶ 38, 47, Fig. 1 (element 20).
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`Nitta discloses the details of a common TFT LCD panel. Nitta at ¶ 32 & Fig. 3. A
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`POSA of LCD driving circuitry would have combined the conventional LCD panel of
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`Nitta and the driving circuit of Suzuki, because both Suzuki and Nitta are directed to
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`the same recognized problem in the field of LCD devices, blurring in the display of
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`motion pictures caused by the slow response time of liquid crystal cells. See III.B.1,
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`supra; Suzuki at ¶ 4; III.B.2, supra; Nitta at ¶¶ 2-3. Further, a POSA would also
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`combine the teachings of Nitta and Suzuki because they both address the same
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`problem in a similar way: they both apply multiple data signals to