Patent No. 7,296,121
`IPR2015-00172
`
`
`
`
`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`
`
`APPLE INC., HTC CORPORATION, HTC AMERICA, INC., SAMSUNG
`ELECTRONICS CO. LTD, SAMSUNG ELECTRONICS AMERICA, INC.,
`SAMSUNG TELECOMMUNICATIONS AMERICA, LLC AND
`AMAZON.COM, INC.,
`Petitioners
`
`v.
`
`MEMORY INTEGRITY, LLC
`Patent Owner
`
`U.S. Patent No. 7,296,121
`
`
`
`Inter Partes Review Case No. 2015-00172
`
`
`
`MEMORY INTEGRITY, LLC’S PATENT OWNER
`PRELIMINARY RESPONSE PURSUANT TO 37 CFR § 42.107(a)
`
`
`
`
`
`
`
`
`IPR2015-00172
`
`
`
`
`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`
`
`APPLE INC., HTC CORPORATION, HTC AMERICA, INC., SAMSUNG
`ELECTRONICS CO. LTD, SAMSUNG ELECTRONICS AMERICA, INC.,
`SAMSUNG TELECOMMUNICATIONS AMERICA, LLC AND
`AMAZON.COM, INC.,
`Petitioners
`
`v.
`
`MEMORY INTEGRITY, LLC
`Patent Owner
`
`U.S. Patent No. 7,296,121
`
`
`
`Inter Partes Review Case No. 2015-00172
`
`
`
`MEMORY INTEGRITY, LLC’S PATENT OWNER
`PRELIMINARY RESPONSE PURSUANT TO 37 CFR § 42.107(a)
`
`
`
`
`
`
`
`
`
`Patent No. 7,296,121
`IPR2015-00172
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`
`TABLE OF CONTENTS
`
`INTRODUCTION ........................................................................................... 1
`
`TECHNOLOGY BACKGROUND ................................................................. 1
`
`
`
`
`I.
`
`II.
`
`III. SUMMARY OF PETITIONERS’ PROPOSED GROUND FOR
`REVIEW .......................................................................................................... 2
`
`IV. THE PENDING PETITIONS FOR INTER PARTES REVIEW OF THE
`’121 PATENT PRESENT REDUNDANT GROUNDS ................................. 3
`
`V. MEMORY INTEGRITY, LLC’S CLAIM CONSTRUCTIONS ................. 10
`
`A.
`
`B.
`
`“probe filtering unit” (claims 1, 16, 25) ................................................ 11
`
`“accumulate responses to each probe” and “accumulating probe
`responses” (claims 15 and 25) ............................................................... 13
`
`VI. THERE IS NO REASONABLE LIKELIHOOD OF PETITIONERS
`PREVAILING AS TO A CHALLENGED CLAIM OF THE ’121
`PATENT ........................................................................................................ 14
`
`A. Petitioners Failed to Demonstrate That Stanford-DASH Anticipates
`Claims 1-3, 8, 11, 12, 16, 19, 20 and 22 ............................................... 14
`
`1.
`
`2.
`
`Petitioners Fail to Demonstrate that Stanford-DASH
`Anticipates Any Independent Claim Because Stanford-DASH
`Does Not Disclose a “probe filtering unit” “operable to filter
`probes within a single cluster of processing nodes” ..................... 14
`
`Petitioners Fail to Demonstrate That the “directory board” of a
`“home cluster” in Stanford-DASH “transmit[s] the” received
`“probes” “only to selected ones of the processing nodes” “with
`reference to probe filtering information” ...................................... 21
`
`
`
`i
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`3.
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`4.
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`5.
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`Patent No. 7,296,121
`IPR2015-00172
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`Petitioners Also Fail to Demonstrate that Stanford-DASH
`Anticipates Claims 2 or 3 Because Stanford-DASH’s
`“directory board” is not “an additional node interconnected
`with the plurality of processing nodes via the first point-to-
`point architecture” ......................................................................... 25
`
`Petitioners Also Fail to Demonstrate that Stanford-DASH
`Anticipates Claim 8 Because the “directory board” for a “local
`cluster” in Stanford-DASH Always “transmits” a “request” to
`the “local cluster” Before It “transmits” the “request” to the
`“home cluster” ............................................................................... 27
`
`Petitioners Fail to Demonstrate that Stanford-DASH
`Anticipates Claims 11 or 12 Because Stanford-DASH
`Contains No Disclosure Regarding the Programming of its
`Processors ...................................................................................... 29
`
`B. Petitioners Failed To Demonstrate That Claims 4-6 Are Obvious
`Over Stanford DASH In View of Keller ............................................... 31
`
`C. Petitioners Failed To Demonstrate That Claim 7 Is Obvious Over
`Stanford-DASH In View of HyperTransport ........................................ 34
`
`D. Petitioners Failed To Demonstrate That Claim 9 Is Obvious Over
`Stanford DASH In View of Duato ........................................................ 36
`
`E. Petitioners Failed To Demonstrate That Claims 17-24 Are Obvious
`Over Stanford-DASH In View of Smith ............................................... 39
`
`VII. CONCLUSION .............................................................................................. 40
`
`
`
`ii
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`
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`Exhibit No.
`Memory Integrity-2001
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`Memory Integrity-2002
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`Memory Integrity-2003
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`Memory Integrity-2004
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`Memory Integrity-2005
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`Patent No. 7,296,121
`IPR2015-00172
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`EXHIBIT LIST
`
`Description
`Plaintiff Memory Integrity, LLC’s Initial Identification
`of Asserted Claims And Accused Products, served on
`Petitioners in Memory Integrity LLC v. Amazon.com
`Inc., et al., Nos. 1:13-cv-01795, -01796, -01802,
`-01808 (D. Del. served Oct. 13, 2014)
`Excerpts from D. E. Culler, J. P. Singh, and A. Gupta
`PARALLEL COMPUTER ARCHITECTURE, pp. 279-280
`(1999)
`Sorin et al. , “Specifying and Verifying a Broadcast and
`a Multicast Snooping Cache Coherence Protocol,”
`IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED
`SYSTEMS, Vol. 13, No. 6, pp. 1-23(June 2002)
`Excerpts from Merriam-Webster’s Collegiate
`Dictionary (10th ed. 1999)
`
`Excerpts from David A. Patterson, et al., COMPUTER
`ORGANIZATION AND DESIGN (3d ed. 2005)
`
`
`
`iii
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`
`
`
`
`
`
`TABLE OF AUTHORITIES
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`Patent No. 7,296,121
`IPR2015-00172
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`
` Page(s)
`
`Cases
`Canon Inc. v. Intellectual Ventures I LLC,
`Case No. IPR2014-00535 (PTAB Sep. 24, 2014) ................................................ 5
`
`Canon Inc. v. Intellectual Ventures I LLC,
`Case No. IPR2014-00536 (PTAB Nov. 5, 2014) ................................................. 5
`
`Cisco Systems, Inc. v. C-Cation Technologies, LLC,
`Case No. IPR2014-00454 ................................................................................... 28
`
`Crown Operations Int'l, LTD v. Solutia Inc.,
`289 F.3d 1367 (Fed. Cir. 2002) .......................................................................... 30
`
`In re Cuozzo Speed Technologies, LLC,
`No. 2014-1301 (Fed. Cir. Feb. 4, 2015) ......................................................... 5, 11
`
`Gracenote, Inc. v. Iceberg Industries LLC,
`Case No. IPR2013-00551 (PTAB Feb. 28, 2014) .............................................. 12
`
`Illumina, Inc. v. Trustees of Columbia Univ.,
`IPR2012-00006 (PTAB May 10, 2013)............................................................ 4, 8
`
`Leveen v. Edwards,
`57 U.S.P.Q.2d 1406 (B.P.A.I. 2000) .................................................................. 28
`
`Ex parte Levy,
`17 USPQ2d 1461 (Bd. Pat. App. & Inter. 1990) ................................................ 30
`
`Microsoft Corporation v. Surfcast, Inc.,
`Case No. IPR2013-00292 (PTAB Nov. 19, 2013) ............................................... 5
`
`In re Oelrich,
`666 F.2d 578 (C.C.P.A. 1981) ............................................................................ 30
`
`Oracle Corporation v. Clouding IP, LLC,
`IPR2013-0088 (PTAB June 13, 2013) .............................................................. 5, 8
`
`
`
`iv
`
`
`
`Philips v. AWH Corp.,
`415 F.3d 1303(Fed. Cir. 2005) ........................................................................... 11
`
`Patent No. 7,296,121
`IPR2015-00172
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`
`Statutes
`
`35 U.S.C. § 312(a)(3)(A) & (a)(5) ........................................................................... 37
`
`Rules
`
`Fed. R. Evid. 1002 ................................................................................................... 37
`
`Other Authorities
`
`32 C.F.R. § 42.107(a) ............................................................................................... 10
`
`37 C.F.R. § 42.1(b) .................................................................................................... 6
`
`37 C.F.R. § 42.22(a)(2) ............................................................................................ 12
`
`37 C.F.R. § 42.62 ..................................................................................................... 37
`
`37 C.F.R. § 42.104(b)(3) .................................................................................... 11, 12
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`v
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`I. INTRODUCTION
`The Board should deny the present request for inter partes review of U.S.
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`Patent No. 7,296,121
`IPR2015-00172
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`Patent No. 7,296,121 (“the ’121 patent”) because the Petition for inter partes
`
`review is based on an incorrect construction of several claim terms, the Petition
`
`fails to offer a construction of other claim terms, the Petition relies on inadequately
`
`explained inherency theories, the Petition fails to demonstrate that a single
`
`embodiment of Stanford-DASH renders any of the claims anticipated, and the
`
`Petition’s asserted obviousness grounds are incomplete and do not adequately
`
`justify the asserted combinations.
`
`For these reasons as expressed more fully below, the Petitioners have failed
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`to demonstrate that there is a reasonable likelihood that they will prevail with
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`respect to at least one of the claims challenged in the petition. Accordingly, the
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`Board should deny the Petition.
`
`II. TECHNOLOGY BACKGROUND
`The technology of the ’121 patent generally relates to maintaining the
`
`coherency, or consistency, between copies of information stored in caches of a
`
`multiple processor computer system. Ex. 1001 at 1:22-34. Processors often use
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`small cache memories that the processor is able to read and write to much faster
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`than main memory. Id. at 1:26-44. Because each processor has a cache memory,
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`multiple copies of the same data can reside in multiple cache memories. Id. at
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`
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`1
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`
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`1:35-45. A problem arises when a processor attempts to change the data in the
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`Patent No. 7,296,121
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`cache memory of the first processor while at the same time another processor also
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`attempts to change the value of the same data located in another cache memory
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`because different values for the same data may result. Id. Cache coherency
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`generally relates to techniques that maintain the consistency of the data stored in
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`the processors’ cache memories. Id.
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`In order to maintain consistency across the same data stored in more than
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`one cache memory, messages can be sent between the cache memories when
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`information in the cache changes. However, such messages can result in
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`significant traffic. The ’121 patent is directed at maintaining cache coherency
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`while reducing the number of messages that need to be sent. Id. at 2:46-52. A
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`probe filtering unit is connected to the various processing nodes and is configured
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`to receive probes from the nodes. Id. at 2:52-56. The probe filtering unit uses
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`information relating to the state of the cache memories in order to determine which
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`nodes should receive these messages. Id. at 2:52-3:5. The ‘121 Patent thereby
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`discloses a system that maintains coherency between the various cache memories
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`while also reducing the number of messages that need to be transmitted. Id.
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`III. SUMMARY OF PETITIONERS’ PROPOSED
`GROUND FOR REVIEW
`
`For the Board’s convenience below is a summary of the grounds for review
`
`
`
`2
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`
`
`proposed by Petitioners:
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`Patent No. 7,296,121
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`1.
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`Claims 1-3, 8, 11, 12, 16, 19, 20, and 22: Anticipation under Daniel
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`Lenoski et al., “The Directory-Based Cache Coherence Protocol for
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`the DASH Multiprocessor,” ISCA '90 Proceedings of the 17th annual
`
`international symposium on Computer Architecture, pp. 148-159
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`(May 1990) (“Stanford-DASH”);
`
`2.
`
`Claim 4-6: Obviousness over Stanford-DASH in view of U.S. Patent
`
`Number 6,490,661 to Keller et al (“Keller”)
`
`3.
`
`Claim 7: Obviousness over Stanford-DASH in view of
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`“HyperTransport™ Technology I/O Link - A High-Bandwidth I/O
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`Architecture” (Jul. 20, 2001) (“HyperTransport”)
`
`4.
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`Claim 9: Obviousness over Stanford-DASH in view of Jose Duato et
`
`al., INTERCONNECTION NETWORKS -AN ENGINEERING
`
`APPROACH (1997) (“Duato”) and
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`5.
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`Claims 17-24: Obviousness over Stanford-DASH in view of Michael
`
`John Sebastian Smith, APPLICATION-SPECIFIC INTEGRATED
`
`CIRCUITS (1997) (“Smith”).
`
`IV. THE PENDING PETITIONS FOR INTER PARTES REVIEW
`OF THE ’121 PATENT PRESENT REDUNDANT GROUNDS
`
`The Board has made clear that in order to ensure “the just, speedy, and
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`inexpensive resolution of every proceeding,” it will not institute inter partes review
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`proceedings on cumulative or redundant grounds. Illumina, Inc. v. Trustees of
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`Columbia Univ., IPR2012-00006, Paper 41, at 11-12 (PTAB May 10, 2013). Thus,
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`the Board has instructed parties that it will not “authorize inter partes review on
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`certain unpatentability challenges . . . [where] the challenges appeared to rely on
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`the same prior art facts as other challenges for which inter partes review had been
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`authorized.” Id. “In other words, considering multiple rejections for the same
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`unpatentability issue would unnecessarily consume the time and resources of all
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`parties involved.” Id. Thus, to avoid dismissal of a proposed ground of
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`unpatentability, a petitioner must “provide a meaningful distinction between the
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`different, redundant rejections.” Id. Where multiple references have been cited for
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`the same facts, it is not enough for a petitioner to argue that the cited references are
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`not identical, or to “speculate[] that in certain publications an element may be more
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`clearly set forth in one publication rather than another.” Id. Rather, a petitioner
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`must adequately explain the difference between the references and “how this
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`difference would impact the unpatentability challenge.” Id. This includes
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`“articulat[ing] a meaningful distinction in terms of relative strengths and
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`weaknesses with respect to application of the prior art disclosures to one or more
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`claim limitations,” as well as “why [one reference] is more preferred for satisfying
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`some elements, while [another reference] is more preferred for satisfying some
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`
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`4
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`other elements.” Oracle Corporation v. Clouding IP, LLC, IPR2013-0088, Paper
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`13, at 5 (PTAB June 13, 2013).
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`Moreover, this Board’s rules against redundant and cumulative grounds
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`cannot be avoided by filing multiple petitions against the same patent, as
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`Petitioners have done. Where a petitioner files “multiple challenges to” the claims
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`of the same patent “across separate petitions,” and “does not address the
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`duplicative nature of its arguments across Petitions,” the petitions shall be
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`“considered together” by the Board. Canon Inc. v. Intellectual Ventures I LLC,
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`IPR2014-00535, Paper 9, at 19 (PTAB Sep. 24, 2014). “Petitioner’s separate fee
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`payments, [] did not assure them that three separate trials would be instituted.”
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`Canon Inc. v. Intellectual Ventures I LLC, IPR2014-00536, Paper 11, at 4 (PTAB
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`Nov. 5, 2014). Thus, when presented with multiple petitions with redundant
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`challenges to the same claims of the same patent, the Board may elect to only
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`consider one petition. See id. Alternatively, the Board may elect to eliminate
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`redundancies across the petitions and consolidate the remainder of the petitions “to
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`administer the proceedings more efficiently.” Microsoft Corporation v. Surfcast,
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`Inc., IPR2013-00292, Paper 15, at 2 (PTAB Nov. 19, 2013).
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`Notwithstanding this Board’s clear directive against submitting cumulative
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`and redundant grounds, the present petition is one of four petitions for inter partes
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`review simultaneously filed by the same Petitioners, all challenging the ’121
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`5
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`Patent: IPR2015-00159, IPR2015-00161, IPR2015-00163, and IPR2015-00172.
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`Patent No. 7,296,121
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`Pet. at 2. Two of these petitions, the ’159 and ’172 Petitions, utilize the maximum
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`sixty pages permitted for a petition for review, while the other two petitions nearly
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`reach that maximum with fifty-six pages each. Together, Petitioners’ four petitions
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`present sixteen grounds for review, involving ten distinct asserted prior art
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`references in two-hundred and thirty-two pages of briefing, as well as over one-
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`thousand, seven-hundred pages of exhibits, including a one-hundred and twenty-
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`three page expert declaration, Ex. 1014. Additionally, also pending before the
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`Board, is IPR2015-00158, another challenge to the ’121 Patent, filed by parties that
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`are co-defendants to the Petitioners in pending litigations in District Court. The
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`’158 Petition shares one primary prior art reference with the ’163 Petition, but the
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`’158 Petition presents seven grounds for review, as well an additional four distinct
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`alleged prior art references and an additional fifty-nine pages of briefing and claim
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`charts and an additional sixteen pages of expert declaration. Plainly, the pending
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`petitions jeopardize this Board’s goal to “secure the just, speedy, and inexpensive
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`resolution of every proceeding.” 37 C.F.R. § 42.1(b).
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`Additionally, the pending petitions challenging the ’121 Patent present
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`grossly redundant and cumulative grounds for review, as demonstrated by this
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`chart showing the number of grounds asserted against each claim of the ’121
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`Patent for each of the pending petitions.
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`6
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`Patent No. 7,296,121
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`Claim #
`\ Pet. # 1
`’158 Pet. 2 2 2 0 0 0 0 2 0 0 2 2 0 2 4 2 2 2 2 2 2 2 2 2 4
`’159 Pet. 1 1 1 0 0 0 0 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
`’161 Pet. 1 1 1 0 0 0 0 1 1 0 1 0 0 1 1 1 1 1 2 2 1 2 1 1 1
`’163 Pet. 1 1 1 1 1 1 0 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 1
`’172 Pet. 1 1 1 1 1 1 1 1 1 0 1 1 0 0 0 1 1 1 2 2 1 2 1 1 0
`Total 6 6 6 2 2 2 1 6 3 1 6 5 1 4 7 6 6 6 8 8 6 8 6 6 7
`
`25
`24
`23
`22
`21
`20
`19
`18
`17
`16
`15
`14
`13
`12
`11
`10
`9
`8
`7
`6
`5
`4
`3
`2
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`
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`In total, the pending petitions challenging the ’121 Patent ask this Board to
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`make one-hundred and twenty-five determinations of whether a particular ground
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`necessitates cancellation of a particular claim, an average of five grounds per
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`claim. The grounds for review are redundant and cumulative both within
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`individual petitions, and across the petitions.
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`Petitioners argue that the four petitions filed by them are not redundant
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`because they “presented only those grounds necessary to sufficiently demonstrate
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`that each claim of the ’121 is not patentable, having demonstrated how various
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`teachings address the claims divergently.” IPR2015-00159 Pet. at 59. This is
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`plainly false. Indeed, none of the pending petitions even attempts to describe the
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`substance of any of the other pending petitions to compare the different grounds
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`and prior art asserted between them. Moreover, for the claims with redundant
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`grounds within a single petition, e.g., claims 19, 20, and 22 in the ’161 and ’172
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`Petitions, Petitioners present no explanation for that redundancy. Thus, Petitioners
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`fall far short of their burden of “provid[ing] a meaningful distinction between the
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`different, redundant rejections.” Illumina, IPR2012-00006, Paper 41, at 11-12.
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`Petitioners also argue that “[t]he petition including rejections based on
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`Chaiken provides the most direct disclosure of any of the petitions of the features
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`recited in claim 14” However, this is inadequate. Petitioners do not “articulate a
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`meaningful distinction in terms of relative strengths and weaknesses with respect
`
`to application of the prior art disclosures to one or more claim limitations,” nor do
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`they explain “why [one reference] is more preferred for satisfying some elements,
`
`while [another reference] is more preferred for satisfying some other elements.”
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`Oracle, IPR2013-0088, paper 13, at 5 (June 13, 2013).
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`Petitioners also argue that “Stanford DASH . . . is the only petition that
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`includes a rejection of claims 4-6 based on prior art that cannot be antedated
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`through priority or swearing behind,” that “Pong is the only petition that includes a
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`rejection of claim 13,” and that “Stanford DASH is the only petition that includes a
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`rejection of claim 7.” IPR2015-00159 Pet. at 59. However, this reflects that
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`Petitioners have attempted to introduce additional disputed claims in an attempt to
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`create the false perspective of meaningful non-redundancy between the petitions.
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`Indeed, each of the pending petitions arises out of patent infringement litigations
`
`brought by Patent Owner in District Court. In those cases, prior to the filing of any
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`8
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`of the present petitions for inter partes review, Patent Owner served an “Initial
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`Identification of Asserted Claims and Accused Products” on each of the
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`defendants, including each of the Petitioners, which identified claims 1-3, 8, 11-12,
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`and 14-25 of the ’121 Patent as being asserted. Ex. 2001. It is telling that none of
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`the claims that Petitioners identify as being unique to a particular petition were
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`listed in the Initial Identification of Asserted Claims served in the litigations.
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`Thus, Petitioners demonstrably are using additional claims as a tactic to attempt to
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`convince this Board to shoe-horn multiple redundant grounds on the other claims
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`into the IPR proceedings. The Board should not support such tactics.
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`Indeed, even if any of Petitioners’ arguments as to non-redundancy were a
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`legitimate excuse for Petitioners’ grossly redundant and excessive filings, they
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`would only counsel, at most, permitting institution as to those specific identified
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`claims on those specific allegedly non-redundant grounds. They are no basis for
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`instituting all petitions on all grounds, as Petitioners request.
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`Finally, as set forth in Patent Owner’s preliminary response to each petition,
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`Patent Owner believes that none of the grounds of unpatentability presented by
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`Petitioners should be instituted on any claim. However, to the extent that the
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`Board determines that some of the grounds presented by Petitioners should be
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`instituted, and is seeking to identify a reasonable basis for choosing among the
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`various petitions, Patent Owner submits that that the goal of “the just, speedy, and
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`9
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`inexpensive resolution of every proceeding” will best be served by instituting on
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`the grounds submitted in the ’163 Petition, as that petition shares a primary prior
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`art reference and similar grounds with those presented in the ’158 Petition, filed by
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`Petitioners’ co-defendants.
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`V. MEMORY INTEGRITY, LLC’S CLAIM CONSTRUCTIONS
`Because this preliminary response “is limited to setting forth the reasons
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`why no inter partes review should be instituted,” 32 C.F.R. § 42.107(a), Memory
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`Integrity does not at this time propose a construction for each term. However, the
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`following terms are either manifestly incorrectly construed by Petitioners, or are
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`wholly ignored by Petitioners. Memory Integrity reserves the right to assert any
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`construction of any term in any Patent Owner’s response, or in any subsequent
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`filing in this proceeding, or in any other proceeding.1
`
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`1 Patent Owner acknowledges that the PTAB has determined that the
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`broadest reasonable interpretation standard is the appropriate standard for
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`construing claims of an unexpired patent in an IPR proceeding, and that a panel of
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`the Federal Circuit has recently affirmed that holding. See In re Cuozzo Speed
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`Technologies, LLC, No. 2014-1301 (Fed. Cir. Feb. 4, 2015). Nonetheless, Patent
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`Owner contends that the claims should be construed in accordance the same
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`standard used by the district courts as articulated by the Federal Circuit in Philips
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`10
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`A.
`
`“probe filtering unit” (claims 1, 16, 25)
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`Despite the fact that “probe filtering unit” is recited in the body of every
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`independent claim of the ’121 Patent, despite the fact that Petitioners admit that the
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`“probe filtering unit” is the “focus” of the claims (Pet. at 18), and despite the fact
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`that Petitioners rely on the “probe filtering unit” to argue that the ’121 Patent is not
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`entitled to the priority of its earlier application (Pet. at 4 n.1), Petitioners make no
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`effort to construe the term. Rather, the Petition merely contains fleeting, cursory
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`mentions of the “probe filtering unit” limitation which fail to substantively address
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`the construction and application of the meaning of the term in the claims. See Pet.
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`at 4 n.1, 18, 23, 25-26. This is, in and of itself, sufficient to deny the petition in its
`
`entirety. See 37 C.F.R. § 42.104(b)(3) (“the petition must set forth . . . [h]ow the
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`challenged claim is to be construed.”); Gracenote, Inc. v. Iceberg Industries LLC,
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`IPR2013-00551, Paper 6, at 38 (PTAB Feb. 28, 2014) (denying petition for failure
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`to comply with 37 C.F.R. § 42.104(b)(3)); see also 37 C.F.R. § 42.22(a)(2).
`
`If Petitioners’ failure to substantively address this limitation is not
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`
`v. AWH Corp., 415 F.3d 1303(Fed. Cir. 2005), and Patent Owner explicitly
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`preserves this issue in the event that the Federal Circuit takes this issue en banc or
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`there is some other change in the governing law. Patent Owner maintains that its
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`proposed constructions are correct under either standard.
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`11
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`dispositive, Memory Integrity submits that the proper construction of a probe
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`Patent No. 7,296,121
`IPR2015-00172
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`filtering unit requires, at least, “an apparatus operable to filter probes within a
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`single cluster of processors.” For example, the ’121 Patent describes the probe
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`filtering unit, stating:
`
`The filtering of probes within a cluster, i.e., local probe filtering,
`may be implemented in systems . . . having a single cluster of
`processors. . . . . In [that case], these functionalities may be
`implemented in a device which will be referred to herein as a
`probe filtering unit (PFU). It should be understood that the use of
`the term “probe filtering unit” or “PFU” in the following discussion is
`not intended to be limiting or exclusive. Rather, any device or object
`operable to perform the described functionalities . . . is within the
`scope of the invention.
`
`Ex. 1001 at 26:36-57; see also Ex. 1001 at 26:58-27:4 (“FIG. 18 is a diagrammatic
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`representation of a multiple processor system 1800 in which embodiments of the
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`invention relating to the filtering of probes within a single cluster of processors
`
`may be practiced. System 1800 [includes] probe filtering unit 1830.”); Ex 1001 at
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`29:31-53 (“FIG. 21 is a diagrammatic representation of a transaction flow in which
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`local probe filtering is facilitated . . . The memory controller . . . generates a probe
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`to the probe filtering unit PFU. . . . The PFU, in turn, probes nodes N0 and N2
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`after it applies its directory lookup and probe filtering algorithm”).
`
`Thus, the specification of the ’121 Patent supports construing “probe
`
`
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`12
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`filtering unit” as requiring “an apparatus operable to filter probes within a single
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`Patent No. 7,296,121
`IPR2015-00172
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`cluster of processors.” This is significant because, as discussed below, Stanford-
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`DASH does not filter probes sent within a cluster.
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`B.
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`“accumulate responses to each probe” and “accumulating probe
`responses” (claims 15 and 25)
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`For purposes of this proceeding, the Board should construe these terms as
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`“gather two or more responses to a probe.” This construction is supported by the
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`claim language itself which uses the plural “responses” to indicate that it involves
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`more than just a single response. Memory Integrity’s construction is also
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`supported by the specification of the ’121 Patent which describes an example
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`where the probe filtering unit sends a probe to two nodes and then gathers the
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`responses from both nodes. In particular, the specification explains that:
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`The PFU, in turn, probes nodes N0 and N2 after it applies its directory
`lookup and probe filtering algorithm. . . . The PFU then accumulates
`the responses from nodes N0 and N2 and sends two responses (one of
`which may be a read response from N0 or N2) back to the requesting
`CPU.
`Ex. 1001 at 29:42-50. Additionally, the dictionary definition of
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`“accumulate” is “to gather or pile up esp. little by little.” Ex. 2004 at 8. This is
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`entirely consistent with Memory Integrity’s proposed construction. The Petitioners
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`did not propose any construction for this term. Accordingly, the Board should
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`adopt Memory Integrity’s proposed construction.
`13
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`VI. THERE IS NO REASONABLE LIKELIHOOD OF PETITIONERS
`PREVAILING AS TO A CHALLENGED CLAIM OF THE ’121 PATENT
`A.
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`Patent No. 7,296,121
`IPR2015-00172
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`Petitioners Failed to Demonstrate That Stanford-DASH Anticipates
`Claims 1-3, 8, 11, 12, 16, 19, 20 and 22
`1.
`
`Petitioners Fail to Demonstrate that Stanford-DASH Anticipates
`Any Independent Claim Because Stanford-DASH Does Not
`Disclose a “probe filtering unit” “operable to filter probes within
`a single cluster of processing nodes”
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`A “probe filtering unit” is a limitation of every independent claim of the
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`’121 Patent, including challenged claims 1 and 16, and their dependents. As
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`discussed above, the specification of the ’121 Patent makes clear that the
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`appropriate construction of “probe filtering unit” is “an apparatus operable to filter
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`probes within a single cluster of processing nodes.”
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`However, Stanford-DASH simply does not have a “probe filtering unit” as
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`properly construed because in Stanford-DASH, a “bus-based snoopy scheme is
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`used to keep caches coherent within a cluster.” Ex. 1005 at 1 (emphasis added).
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`That is, Stanford-DASH does not perform filtering within a single cluster of
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`processing nodes. Petitioners contend that the “directory board” of a “home
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`cluster” in Stanford-DASH constitutes a “probe filtering unit.” Pet. at 22, 24.2
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`However, Stanford-DASH expressly teaches that:
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`2 A “home cluster” in Stanford-DASH is the cluster which contains the main
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`memory and directory for a given physical memory address.” Ex. 1005 at 4.
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`14
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`Patent No. 7,296,121
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`The directory does not maintain information concerning whether the
`home cluster itself is caching a memory block because all
`transactions that change the state of a memory block are issued
`on the bus of the home cluster, and the snoopy bus protocol keeps the
`home cluster coherent.
`
`Ex. 1005 at 5. Stanford-DASH continues, explaining that this is an intentional
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`design choice to “issue all transactions on the home cluster’s bus”:
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`While we could have chosen not to issue all transactions on the home
`cluster’s bus this would had an insignificant performance
`improvement since most requests to the home also require an access
`to main memory to retrieve the actual data.
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`Ex. 1005 at 5. Thus, a home cluster of Stanford-DASH will always probe all
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`processors in that cluster by transmitting probes over a bus without any filtering.
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`Therefore, Petitioners’ arguments that the directory board of a home cluster in
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`Stanford-DASH is a “probe filtering unit” fail because the home cluster issues “all
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`transactions” on the bus without filtering. Thus, it cannot be an apparatus operable
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`to filter probes within a single cluster of processors.
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`Stanford-DASH further emphasizes that all requests to the home cluster are
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`broadcast to all processors in the home cluster in discussing requests. Petitioners
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`identify two type of requests in Stanford-DASH as being the allegedly filtered
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`probes: “read requests” and “read-exclusive requests.” Pet. at 22; Ex. 1014 ¶ C-5.
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`In both cases, Stanford-DASH expressly states that those requests are broadcast on
`15
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`the home cluster’s bus. Ex. 1005 at 5 (“When the read request reaches the home
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`Patent No. 7,296,121
`IPR2015-00172
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`cluster, it is issued on that cluster’s bus.”); id. at 6 (“At the home cluster, the read-
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`exclusive request is echoed on the bus.”).
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`Indeed, that Stanford-DASH’s apparatus is incapable of being a probe
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`filtering unit is further reinforced by Stanford-DASH’s Figure 3—the “Directory
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`board block diagram”—which shows how remote requests are processed (i.e. such
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`as would be received by a home cluster).
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`16
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`Patent No. 7,296,121
`IPR2015-00172
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`Annotation of Figure 3 of Stanford-DASH, Ex. 1005 at 4.
`Thus, all remote requests in Stanford-DASH go through the request network, into
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`the “Pseudo-CPU,” which “[f]orwards remote CPU request[s] to [the] local
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`MPBUS.” Ex. 1005 at 4, Fig. 3. As a bus, all of those requests sent on the
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`MPBUS are transmitted to all
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