Consultant Curriculum Vitae
`
`
`
`
`
`Vojin G. Oklobdzija, Ph.D., IEEE Life Fellow
`President, IEEE Circuits and Systems Society
`(Phonetic spelling: Vo-in Oklob-j-a)
`
`Contact:
`
`Address:
`1285 Grizzly Peak Blvd, Berkeley, CA 94708
`
`Telephone and email:
`510-230-3267; vojin@integration-corp.com
`
`
`
`Expertise
`
`
` Computer System Design and
`Computer Architecture
` VLSI Circuits and Systems
` System Clocking and Clocked
`Storage Elements
` Logic Design and Machine
`Organization
`
` Low-Power Design and Technology
` Computer Arithmetic: VLSI adders,
`multipliers arithmetic, crypto
`processors
` Microprocessor Design
` Design for Testability and Fault-
`Tolerant Computer Design
`
`
`
`
`Professional Summary
`
`
`
`Employment History
`
`
`From:
`To:
`
`
`
`2013
`Silicon Analytics Inc.
`San Jose, California
`Present
`Position: Founder and President
`
`Expertise and tool development for power optimization. Targeting low
`and ultra-low power design.
`
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`Modified: January 24, 2013
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`Page 1
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`Resume of Prof. Vojin G. Oklobdzija, Fellow IEEE
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`Consultant Curriculum Vitae
`
`
`2013
`Skyera Inc.
`San Jose, California
`2014
`Position: Senior Director, Processor Development
`
`
`1996
`Integration Corp.
`Present Berkeley, California
`Position: President and CEO
`
`Processor design services: Developed fastest encryption processor for
`Blue Steel Networks (sold to Broadcom for $150M). Designed and
`developed network encryption processor for Digital Archways. Design
`and developed Media and Floating-Point Processor for BOPS Inc.
`
`
`
`1992
`Advanced Computer Systems Engineering Laboratory
`Present Berkeley, California
`Position: Director
`
`Conducting research in: Low-Power systems and processor development
`with implementations in multi-media, cryptography and wireless
`communication.
`Developed a comprehensive family of clocked storage elements and
`clocking strategies for high performance and low-power applications;
`optimization method for digital circuits and system design resulting in up
`to 50% energy savings; the fastest parallel multiplier, adder and method
`for generation, estimation and comparison of arithmetic structures.
`
`
`1991
`University of California Davis
`Present Davis, CA
`Position: Professor Emeritus, 2007-Present
`
`1991-2007: Full Professor, Electrical and Computer Engineering
`Department
`
`
`2007
`University of Texas at Dallas
`Present Dallas, TX
`Position: Visiting Professor; Director of Systems and Circuits Group (2007-2010),
`Adjunct Professor (2010 – on)
`
`2005
`Sydney University
`Sydney, Australia
`2007
`Position: Computer Engineering Chair and Chair Professor, Department of
`Electrical and Information Engineering
`(ARC funding $1,900,000).
`
`
`
`03/2004 Ecole Polytechnique Federale de Lausanne, EPFL
`10/2004 Lausanne, Switzerland
`Position: Visiting Professor, Processor Architecture Laboratory
`
`Developed and taught a new doctoral course in computer arithmetic
`
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`Modified: January 24, 2013
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`Page 2
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`Resume of Prof. Vojin G. Oklobdzija, Fellow IEEE
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`Consultant Curriculum Vitae
`
`
`07/2003 Government of Korea
`12/2003 Seoul, Korea
`Position: Distinguished Visiting Professor, Korea Information Technology
`Assessment Program
`Established research program in digital media and secured a three year
`grant in “Power Minimization for Media Signal Processing” from the
`Korean government (appx: $300,000). Established and taught the course
`titled: “Digital System Engineering”.
`
`
`
`1998
`University of California at Berkeley
`Berkeley, CA
`1990
`Position: Visiting IBM Faculty, Electrical Engineering and Computer Science
`Department
`Teaching: Upper level courses: CS150 Digital System Design, CS152:
`Computer System Design and Organization. Graduate courses: CS252
`Computer System Architecture, CS292I VLSI Implementation of Fast
`Computer Arithmetic. Assisted in preliminary evaluation and preparation
`of Patterson-Hennessy book “Computer Architecture: A Quantitative
`Approach”.
`
`
`
`1996
`Siemens Corporation
`San Jose, CA
`1998
`Position: Architecture / Circuit Design Manager
`
`Development of Full-Custom high-performance arithmetic units. Chief
`architect for Siemens / Infineon TriCore line of integrated RISC-DSP
`controller. Development of and embedded Logic-DRAM processor (32-
`bit, RISC + DSP). Managed a group of 15 engineers.
`
`
`
`1982
`IBM T.J. Watson Research Center
`Yorktown Heights, NY
`1991
`Position: Research Staff Member
`My work was in the areas of: Systems and Architecture, CPU and
`Floating Point processor design, Circuit design, Design for Testability
`Development and implementation of VLSI RISC architectures:
`1. High Performance 801 (first RISC microprocessor) for PC-RT
`(ROMP-E project).
`2. Very high performance Super-Scalar RISC Architecture, RS/6000:
`floating point processor and system organization. (current PowerPC
`architecture)
`3. Architectural definition and design of VLSI-RISC type processor to be
`used in a highly parallel super-computer. IBM SP-2.
`
`1979
`Xerox Corp.
`El Segundo, CA
`1982
`Position: Member of the Engineering Staff, Microelectronics Center
`
`Work on the VLSI microprocessors design and diagnostic. Chip set for
`
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`Modified: January 24, 2013
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`Consultant Curriculum Vitae
`
`
`the first Workstation – Xerox Alto.
`
`1977
`UCLA
`Los Angeles, CA
`1982
`Position: Research Assistant & Senior Research Engineer, Computer Science
`Department
`Worked on VLSI Design and Testability, VLSI Design Methodology,
`Fault-Tolerant Computer Design and High Reliability, Computer
`Arithmetic and Design of Arithmetic Processor.
`
`
`
`1974
`University of Belgrade
`Belgrade, Yugoslavia
`1976
`Position: Assistant Professor, Electrical Engineering Department
`
`Research and teaching in Analog and Digital Electronics.
`
`1973
`Institute for Automation and Telecommunications
`Belgrade Yugoslavia
`1974
`Position: Research Engineer
`
`Design of non-standard analog circuitry for the analog part of the state of
`the art hybrid computer (project with USSR). Design of an Analog
`Multiplier based on Time Division Concept.
`
`1971
`Institute of Physics
`Belgrade Yugoslavia
`1973
`Position: Research Physicist
`
`Experimental work in plasma physics with extensive use of computer
`tools for simulation and data acquisition. Written software in Fortran on
`IBM 360/44 and CDC 6600.
`
`
`Current and Past Professional Service:
`
`
` President, IEEE Circuits and Systems Society (2014 - on)
` President Elect, IEEE Circuits and Systems Society (2013).
` Vice President, Technical Activities, IEEE Circuits and Systems Society (2009-
`2013)
` General Chair: International Symposium on Low-Power Electronics, 2010.
` Technical Program Chair: International Symposium on Low-Power Electronics,
`2008.
` General Chair: International Symposium on Computer Arithmetic, ARITH-20.
`(Tuebingen, Germany, 2011)
` General Chair: International Symposium on Computer Arithmetic, ARITH-13,
`Pacific Grove, California, 2007.
` Member of the Board of Governors, IEEE Circuits and Systems Society (2008-
`present)
` Editorial Board, IEEE MICRO.
`
`
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`Modified: January 24, 2013
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`Resume of Prof. Vojin G. Oklobdzija, Fellow IEEE
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`Consultant Curriculum Vitae
`
`
`
`
` Editor, Computer Engineering Series, Taylor & Francis.
` Editorial Board Taylor and Francis / CRC Press.
` Distinguished Lecturer of IEEE Solid-State Circuits Society: 2000-on.
`
`
`Consulting History Industry
`
`From:
`To:
`
`
`10/2014 Wave Semi, Inc.
`current
`Campbell, California
`Duties:
`Developing high-speed low-power adders and multipliers, clocking
`strategy for a proprietary reconfigurable multi-processor.
`Samsung Electronics Co. System LSI Division Research
`Laboratories
`Suwon-City, Gyeonggi-Do, Korea
`Provided lectures in the area of media processor architecture, clocking
`and clocked storage elements, power optimization of digital circuits.
`
`10/2003
`
`01/2004
`Duties:
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`05/2002
`Intel Advanced Microprocessor Research Laboratories
`09/2002 Hillsboro, OR
`Duties:
`Developed Energy-Delay optimization methodology and tool for adders
`used in Itanium and P4 processors. Supervised two of my students in
`wireless 802.11 chip realization project.
`
`1997
`2001
`Duties:
`
`1996
`1999
`Duties:
`
`SONY, LSI Systems Laboratories
`San Jose, CA
`Architect and project leader for new generation of media processors
`(reporting to the vice-president of SONY Corp.). Participated in
`strategic program planning as a member of the board.
`
`Hitachi Research and Development Laboratories
`San Jose, CA
`Low-Power Design. Performed evaluation of clocked storage elements
`to be used in SH-5 processor. Work in low-power design.
`
`07/1994 AT&T Bell Laboratories
`09/1994 Holmdel, NJ
`Duties:
`Development of new type of Low-Power circuits and logic based on
`energy-recovery principles.
`
`07/1992
`Sun Microsystems Laboratories
`10/1992 Mountain View, CA
`Duties: Worked on development of high-performance (1 GOP) super-scalar
`BiCMOS processor implementation and design.
`
`
`
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`Modified: January 24, 2013
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`Resume of Prof. Vojin G. Oklobdzija, Fellow IEEE
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`Consultant Curriculum Vitae
`
`
`
`Litigation Support Experience:
`
`Date:
`
`
`2015
`Case:
`
`Nelson Bumgardner P.C.
`Technology Properties LTD. LLC, v. Barnes and Noble Inc. and
`Technology Properties LTD. LLC, Phoenix Digital Solutions LLC and
`Patriot Scientific Corp. vs. LG Electronics Inc. and LG Electronics USA
`Inc., USDC, N.D. Cal., Case No.: 3:12-CV-03863-VC, and Case No.
`3:12-cv-03880-VC (PSG).
`Technology Properties LTD. LLC, v. Barnes and Noble Inc. and
`Technology Properties LTD. LLC, Phoenix Digital Solutions LLC and
`Patriot Scientific Corp. vs. LG Electronics Inc. and LG Electronics USA
`Inc.
`Independent, expert opinion on the patent, claim construction, testifying
`services etc.
`Technology Properties LTD. LLC.
`In progress.
`
`Parties:
`
`Project:
`
`Repres.:
`Status:
`
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`Date:
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`Date:
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`
`2015
`Case:
`
`Arnold and Porter LLP
`Synopsys Inc. v. Atop Tech Inc., USDC, N.D. Cal., Civil Case: No 3:13-
`cv-02965-MMC.
`Synopsys Inc. v. Atop Tech Inc.
`Parties:
`Independent, expert opinion on the patent, testifying services etc.
`Project:
`Repres.: Atop Tech Inc.
`Status:
`In progress.
`
`2015
`Case:
`
`Farney Daniels PC
`Apple Inc., HTC Corp., HTC America Inc., Samsung Electronics Co.
`LTD and Samsung Electronics America Inc., Amazon.com Inc., v.
`Memory Integrity LLC, USDC, Richmond, Virgina, Case: IPR2015-
`00163.
`Apple Inc., HTC Corp., HTC America Inc., Samsung Electronics Co.
`LTD and Samsung Electronics America Inc., Amazon.com Inc., v.
`Memory Integrity LLC.
`Independent, expert opinion on the litigation, patent, claim construction
`etc.
`Repres.: Memory Integrity LLC., Patent Owner.
`Status:
`In progress: IPR Review
`
`Parties:
`
`Project:
`
`
`Date:
`
`
`2015
`Case:
`
`
`
`Parties:
`
`Latham and Watkins LLP
`Samsung Electronics Co. LTD and Samsung Electronics America Inc.,
`v. Nvidia Corp.,Old Micro Inc., F/K/A Velocity Micro Inc,.and Velocity
`Holdings, LLC, USDC, Richmond, Virgina, CIVIL ACTION NO. 3:14-
`cv-00757-REP
`Samsung Electronics Co. LTD and Samsung Electronics America Inc.,
`Nvidia Corp.,Old Micro Inc., F/K/A Velocity Micro Inc,.and Velocity
`
`
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`Modified: January 24, 2013
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`Page 6
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`Resume of Prof. Vojin G. Oklobdzija, Fellow IEEE
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`Consultant Curriculum Vitae
`
`
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`
`
`
`
`
`Project:
`
`Holdings, LLC.
`Independent, expert opinion on the litigation, patent, claim construction
`etc.
`Repres.: Nvidia Corp., defendant.
`Status:
`In progress: IPR Review
`
`
`Date:
`
`
`2015
`Case:
`
`AZA Law
`Parthenon Unified Memory Architecture, v. HTC Corporation and HTC
`America Inc, USDC, Eastern District of Texas, Marshal Division, Case
`No. 2:14-cv-00690
`Parthenon Unified Memory Architecture, HTC Corporation and HTC
`America Inc.
`Independent, expert opinion on the litigation, patent, claim construction
`etc.
`Parthenon Unified Memory Architecture, plantif.
`In progress
`
`Parties:
`
`Project:
`
`Repres.:
`Status:
`
`
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`Date:
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`Parties:
`
`Project:
`
`2012-14 Otteson Law Group of Agility IP Law, LLP
`Acer, Inc., et al. v. Technology Properties Limited, et al., USDC, N.D.
`Case:
`Cal., Case No. CV08-00877; HTC Corporation, et al. v. Technology
`Properties Limited, et al., USDC, N.D. Cal., Case No. CV08-00882;
`Barco NV v. Technology Properties Limited, et al., USDC, N.D. Cal.,
`Case No. CV08-05398
`Acer, Inc., Acer America Corporation, Gateway, Inc., Barco NV,
`Technology Properties Limited, Patriot Scientific Corporation,
`Alliacense Limited, HTC Corporation, HTC America, Inc.
`Patent infringement dispute related to computer circuits and logic.
`Study of patents and publications, preparation of expert reports.
`(Transferred from Farella Braun + Martel LLP.)
`Technology Properties Limited
`In progress
`Four deposition testimonies 2011, 2012, 2013, Expert Report, Infringement
`Report, Two days testimony at International Trade Commission Court (June
`5,6, 2013). Two weeks in the ITC court.
`
`Court testimonies:
`(a) International Trade Commission, Washington, D.C., June 2013.
`(b) Northern California District Court, San Jose California. (I was the
`only expert on the side of TPL against half-dozen experts on the side
`of HTC). Three days of testimony, one week in court.
`(c) Case won October 2, 2013.
`
`Repres.:
`Status:
`Work:
`
`
`Date:
`
`
`2012
`Case:
`
`Wolf Greenfield and Sacks P.C
`In the Matter of Certain Consumer Electronics and Display Devices
`and Products Containing Same, USITC, Inv. No. 337-TA-836 and
`parallel district court actions Graphics Properties Holdings, Inc. v.
`
`
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`Modified: January 24, 2013
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`Resume of Prof. Vojin G. Oklobdzija, Fellow IEEE
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`Consultant Curriculum Vitae
`
`
`Parties:
`
`Research In Motion Ltd., et al., USDC, D. Del., Case No. CV11-01161
`(and related actions CV11-01161, CV11-01162, CV11-01163, CV11-
`01164, CV11-01165)
`Graphics Properties Holdings, Inc., Research In Motion Ltd., Research
`In Motion Corp., HTC Corporation, HTC America, Inc., LG
`Electronics, Inc., LG Electronics, LG Electronics MobileComm U.S.A.,
`Apple Inc., Samsung Electronics Co., Ltd., Samsung Electronics Co.
`Ltd., Samsung Telecommunications, Sony Corporation, Sony
`Corporation of America, Sony Electronics, Inc., Sony Ericson Mobile,
`Sony Ericson Mobile
`Preparing expert witness report. Assisting in claim construction.
`Project:
`Repres.: Graphics Properties Holdings, Inc.
`Status:
`Settled: December 2012
`
`
`
`
`2012
`Case:
`
`Parties:
`
`Project:
`
`Irell & Manella LLP
`Infineon Technologies AG, et al. v. Atmel Corporation, USDC, D. Del.,
`Case No. CV11-00307
`Infineon Technologies AG, Infineon Technologies North America
`Corp., Atmel Corporation
`Independent, expert opinion on the litigation, patent, claim construction
`etc.
`Repres.: Atmel Corporation
`Status:
`Settled
`
`
`2011
`Arnold and Porter LLP
`Optimum Power Solutions LLC vs. Hewlett-Packard Company, USDC,
`Case:
`N.D. Cal., Case No. CV12-03125 (transferred from USDC, D. Del.,
`Case No. CV11-00853) (related cases in USDC, N.D. Cal., CV12-
`03127, CV12-03123, CV12-01509, CV12-03126; related cases in
`USDC, D.Del., CV11-00854, CV11-00855, CV11-00856)
`Optimum Power Solutions LLC, Hewlett-Packard Company
`Parties:
`Patent infringement, search for prior art.
`Project:
`Repres.: Hewlett-Packard Company
`Status:
`Closed
`
`
`2011
`Covington & Burling LLP
`AVM Technologies LLC v. Intel Corporation, USDC, D. Del., Case No.
`Case:
`CV10-00610
`AVM Technologies LLC, Intel Corporation
`Parties:
`Patent examination: prior history and infringement.
`Project:
`Repres.: AVM Technologies LLC
`Status:
`Case terminated
`
`
`2009
`DLA Piper US LLP
`Zoran Corp vs. DTS Inc., Superior Court of California, County of Los
`Case:
`
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`Date:
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`Date:
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`Date:
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`Modified: January 24, 2013
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`Date:
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`Date:
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`Date:
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`2008-11
`Case:
`
`Parties:
`
`Project:
`
`Repres.:
`Status:
`Work:
`
`Farella Braun + Martel LLP
`Acer, Inc., et al. v. Technology Properties Limited, et al., USDC, N.D.
`Cal., Case No. CV08-00877; HTC Corporation, et al. v. Technology
`Properties Limited, et al., USDC, N.D. Cal., Case No. CV08-00882;
`Barco NV v. Technology Properties Limited, et al., USDC, N.D. Cal.,
`Case No. CV08-05398
`Acer, Inc., Acer America Corporation, Gateway, Inc., Barco NV,
`Technology Properties Limited, Patriot Scientific Corporation,
`Alliacense Limited, HTC Corporation, HTC America, Inc.
`Patent infringement case. Preparing expert witness report. Assisting in
`claim construction.
`Technology Properties Limited
`Transferred to another attorney group
`Two deposition testimonies given, Claim construction, Patent invalidity
`analysis, Expert report, Prior art search.
`
`2008-09 Nixon Peabody LLP / Thelen LLP
`Technology Properties Limited, et al. v. HTC Corporation, et al.,
`Case:
`USDC, E.D. Tex., Case No. CV08-00174
`Technology Properties Limited, Patriot Scientific Corporation, HTC
`Corporation, HTC America, Inc., Syrus XM, ASUSTeK Computer, Inc.
`Patent infringement case.
`Technology Properties Limited
`Settled 2009
`
`Consultant Curriculum Vitae
`
`
`Parties:
`Project:
`
`Repres.:
`Status:
`
`
`
`
`
`
`
`
`Angeles, Northwest District, Case No. LC 083529
`DTS Inc., Zoran Corp.
`Licensing / product infringement dispute. Preparing expert witness
`report, expert testimony, expert rebuttal report, product infringement
`investigation.
`Zoran Inc.
`Settled
`
`
`
`
`
`
`
`
`Parties:
`
`Project:
`Repres.:
`Status:
`
`2008-09 Townsend Townsend & Crew
`Case:
`TPL, case filed in Eastern District of Texas
`Parties:
`TPL vs. Patriot Scientific Corporation, HTC Corporation, HTC
`America, Inc., Syrus XM, ASUSTeK Computer, Inc.
`Patent infringement case.
`Technology Properties Limited
`
`Project:
`Repres.:
`
`
`
`
`Modified: January 24, 2013
`
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`Page 9
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`Resume of Prof. Vojin G. Oklobdzija, Fellow IEEE
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`

`
`Consultant Curriculum Vitae
`
`
`Status:
`
`Work:
`
`Transferred to other law firms including Farella Braun + Martell, Nixon
`Peabody LLP / Thelen LLP.
`Patent invalidity prosecution assistance given, prior art search.
`
`Parties:
`Project:
`
`Parties:
`
`2007-08 Dechert LLP
`Case:
`Acer, Inc., et al. v. Hewlett-Packard Company, USDC, W.D. Wisc.,
`Case No. CV07-00620
`Acer, Inc., Acer America Corporation, Hewlett-Packard Company
`Patent
`infringement dispute. Preparing expert
`report, product
`infringement investigation.
`Repres.: Hewlett-Packard Co.
`Status:
`Closed
`
`
`2007
`Townsend Townsend & Crew
`Technology Properties Limited Inc., et al. vs. Fujitsu Limited, et al.,
`Case:
`USDC, E.D. Tex., Case No. CV08-00494
`Technology Properties Limited, Inc., Patriot Scientific Corporation,
`Fujitsu Limited, Fujitsu General America, Inc., Fujitsu Computer
`Products of America, Inc., Fujitsu Computer Systems Corp., Fujitsu
`Microelectronics America, Inc., Fujitsu Ten Corporation of America,
`Matsushita Electrical Industrial Co., Ltd., Panasonic Corporaton of
`North America, JVC Americas Corporation, NEC CorporationNEC
`Electronics America, Inc., NEC America, Inc., NEC Display Solutions
`of America, Inc., NEC Solutions America, Inc., NEC Unified Solutions,
`Inc., Toshiba Corporation, Toshiba America, Inc., Toshiba America
`Electronics Coomponents, Inc., Toshiba America Information Systems,
`Inc., Toshiba America Consumer Products, LLC, NEC Corporation of
`America, ARM Inc., ARM Ltd.
`Patent infringement dispute related to computer circuits and logic.
`Study of patents and publications, preparation of expert reports,
`assisting in a deposition.
`Technology Properties Limited Inc.
`
`Project:
`
`Represen
`ted:
`Status:
`
`Closed
`
`Parties:
`
`2004-06 Kellogg, Huber Hansen Todd & Evans PLLC
`Case:
`OKI America, Inc. v. Advanced Micro Devices Inc., USDC, N.D. Cal.,
`Case No. CV04-03171
`OKI America, Inc., OKI Electric Industry Company, Ltd., OKI Data
`Corporation, OKI Data Americas, Inc., OKI Telecom, Inc., Advanced
`Micro Devices Inc., Pankaj Dixit,
`Preliminary patent
`invalidity contention. Writing expert report.
`Deposition testimony.
`Repres.: OKI plaintiffs
`Status:
`Closed
`
`Project:
`
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`Date:
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`Date:
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`Date:
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`Modified: January 24, 2013
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`Page 10
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`

`
`Consultant Curriculum Vitae
`
`
`Irell & Manella LLP
`Examining Patent No: 6,126,235. Contact attorney: Rudy Y. Kim
`Patent examination.
`Closed
`
`Arent Fox Kintner Plotkin & Kahn, PLLC:
`Hitachi Ltd. Contact: Raymond J. Ho, Esq. Member (Partner)
`Product examination and chip analysis related to product infringement.
`Closed
`
`Morgan Lewis & Bockius LLP
`unknown
`Patent examination.
`Closed
`
`2005
`Case
`Project:
`Status:
`
`2004
`Case
`Project:
`Status:
`
`2001
`Case:
`Project:
`Status:
`
`1999-00 Townsend Townsend & Crew
`Sun Microsystems v. IBM.
`Case
`Project:
`Patent infringement dispute related to computer circuits and logic:
`Study of patents and publications, preparation of expert report.
`Case successfully settled
`Sun Microsystem, IBM Corp.
`Case successfully settled
`
`Status:
`Parties:
`Status:
`
`1998
`Case:
`Project:
`Status:
`
`Weil Gotshal & Manges LLP
`unknown
`Patent examination. Two patents examined.
`Closed
`
`1997-98 Bernstein Litowitz Berger & Grossmann LLP
`Case:
`Edward McDaid, et al., On Behalf Of Themselves and All Others
`Similarly Situated v. Walter J. Sanders, III, et al., USDC, N.D. Cal.,
`Case No. CV95-20750
`Edward McDaid, et al., On Behalf Of Themselves and All Others
`Similarly Situated, Walter Jeremiah Sanders, III, Anthony B. Holbrook,
`Richard Previte, Marvin D. Burkett, Advanced Micro Devices, Inc.
`Class action case, analysis of AMD K5 processor design, writing expert
`report and participating in deposition as an assisting expert to the
`attorney.
`Case successfully settled (award amount $15 million)
`
`Parties:
`
`Project:
`
`Status:
`
`
`
`
`
`
`Date:
`
`
`
`
`
`Date:
`
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`
`Date:
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`
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`
`
`Date:
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`Date:
`
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`Date:
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`Modified: January 24, 2013
`
`
`
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`Page 11
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`Resume of Prof. Vojin G. Oklobdzija, Fellow IEEE
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`

`
`Consultant Curriculum Vitae
`
`
`6,753,715
`
`6,693,459
`
`6,647,487
`
`6,553,541
`
`6,353,843
`6,301,599
`
`6,282,556
`
`6,243,728
`
`6,232,810
`6,128,641
`
`
`U.S. Patents: Vojin G. Oklobdzija
`
`Patent Number Date Issued Title
`7,509,486
`03/24/2009 ENCRYPTION PROCESSOR FOR PERFORMING
`ACCELERATED COMPUTATIONS TO ESTABLISH
`SECURE NETWORK SESSIONS CONNECTIONS
`06/22/2004 SYSTEM FOR SYMMETRIC PULSE GENERATOR FLIP-
`FLOP
`02/17/2004 METHOD AND SYSTEM FOR IMPROVING SPEED IN A
`FLIP-FLOP,”
`11/11/2003 METHOD AND SYSTEM FOR REDUCING HAZARDS IN
`A FLIP-FLOP
`04/05/2003 METHOD FOR REDUCED-COMPLEXITY SEQUENCE
`DETECTION IN EEPR4 MAGNETIC RECORDING
`CHANNEL
`03/05/2002 HIGH PERFORMANCE UNIVERSAL MULTIPLIER
`10/09/2001 MULTIPLIER CIRCUIT HAVING OPTIMIZED BOOTH
`ENCODER/SELECTOR
`08/28/2001 HIGH PERFORMANCE PIPELINED DATA PATH FOR A
`MEDIA PROCESSOR
`06/05/2001 PARTITIONED SHIFT RIGHT LOGIC WITH ROUNDING
`SUPPORT
`05/15/2001 FLIP-FLOP
`10/03/2000 DATA PROCESSING UNIT WITH HARDWARE
`ASSISTED CONTEXT SWITCHING CAPABILITY
`INSTRUCTION CONTROL MECHANISM FOR A
`COMPUTING SYSTEM WITH REGISTER RENAMING
`AND QUEUES INDICATING AVAILABLE REGISTERS
`07/11/1989 REGISTER SELECTION MECHANISM AND
`ORGANIZATION OF AN INSTRUCTION PREFETCH
`BUFFER
`INSTRUCTION PREFETCH BUFFER CONTROL
`12/22/1987
`10/13/1987 CONSISTENT PRECHARGE CIRCUIT FOR CASCODE
`VOLTAGE SWITCH LOGIC
`
`4,992,398
`
`02/12/1991
`
`4,847,759
`
`4,714,994
`4,700,086
`
`
`European Patents: Vojin G. Oklobdzija
`
`EP1058394 European Patent: NIKOLIC BORIVOJE (US); FU LEO (US); LEUNG
`MICHAEL (US); OKLOBDZIJA VOJIN G (US); YAMASAKI RICHARD (US),
`Reducedcomplexity sequence detection (US19990129149P 19990414)
`
`EP1012715 European Patent: R. Fleck, R. Arnold, B. Holmer, V.G. Oklobdzija, Eric
`Chesters, “DATA PROCESSING UNIT WITH HARDWARE ASSISTED CONTEXT
`SWITCHING CAPABILITY,” European Patent Issued, June 28, 2000.
`
`
`
`
`
`Modified: January 24, 2013
`
`
`
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`Page 12
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`

`
`Consultant Curriculum Vitae
`
`
`
`EP0195202 European Patent: OKLOBDZIJA VOJIN G; “Register selection mechanism
`and organization of an instruction prefetch buffer”; Publication date: 1986-09-24.
`Applicant: IBM (US)
`
`EP0297265 European Patent: COCKE JOHN; GROHOSKI GREGORY FREDERICK;
`OKLOBDZIJA VOJIN G; “An instruction control mechanism for a computer system”
`Publication date: 1989-01-04. Applicant: IBM (US).
`
`EP0199946 European Patent: OKLOBDZIJA VOJIN G; LING DANIEL T;
`“Instruction prefetch buffer control and method of controlling an instruction prefetch
`buffer,” Publication date: 1986-11-05; Applicant: IBM (US)
`
`EP0206462 European Patent: LING DANIEL TAJEN; OKLOBDZIJA VOJIN G;
`RAVER NORMAN; “Method of precharging and precharge circuit for dynamic cascode
`voltage switch logic”; Publication date: 1986-12-30; Applicant: IBM (US)
`
`Japanese Patents: Vojin G. Oklobdzija
`
`JP2001053622 Japan Patent: LEUNG MICHAEL; FU LEO; NIKOLIC BORIVOJE;
`OKLOBDZIJA VOJIN G; YAMASAKI RICHARD, “METHOD FOR SIMPLIFIED
`VITERBI DETECTION FOR SEQUENCE DETECTION AND VITERBI
`DETECTOR,” Issued: February 23, 2001.
`
`JP1017126 Japan Patent: COCKE JOHN; GROHOSKI GREGORY FREDERICK;
`OKLOBDZIJA VOJIN G, “REGISTER RENAMING DEVICE,” Issued: January 20,
`1989.
`JP61214029 Japan Patent: OKLOBDZIJA VOJIN G; “Register selection mechanism
`and organization of an instruction prefetch buffer”; Issue date: Applicant: IBM (US).
`
`JP1017126 Japan Patent: COCKE JOHN; GROHOSKI GREGORY FREDERICK;
`OKLOBDZIJA VOJIN G; “An instruction control mechanism for a computer system”
`Issue date: 1989-01-04. Applicant: IBM (US).
`
`JP61256446 Japan Patent: OKLOBDZIJA VOJIN G; LING DANIEL T; “Instruction
`prefetch buffer control and method of controlling an instruction prefetch buffer,” Issue
`date: Applicant: IBM (US)
`
`JP61247122 Japan Patent: LING DANIEL TAJEN; OKLOBDZIJA VOJIN G; RAVER
`NORMAN; “Method of precharging and precharge circuit for dynamic cascode voltage
`switch logic”; Issue date:; Applicant: IBM (US).
`
`
`
`PATENTS: World Intellectual Property Organization patents
`
` WO0127742 WIPO patent: CHEHRAZI FARZAD; OKLOBDZIJA VOJIN G;
`
`
`
`
`Modified: January 24, 2013
`
`
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`Consultant Curriculum Vitae
`
`
`
`FAROOQUI AAMIR A, “A PARTITIONED MULTIPLIER”; Publication date: 2001-
`04-19. Applicant: SONY ELECTRONICS INC (US).
`
` WO0104724 WIPO patent: OKLOBDZIJA VOJIN; CHEHRAZI FARZAD; LI WEI-
`JEN; YU ANDY W, FAROOQUI AAMIR; “A PARTITIONED RIGHT SHIFT LOGIC
`CIRCUIT HAVING ROUNDING SUPPORT”; Publication date: 2001-01-18.
`Applicant: SONY ELECTRONICS INC (US).
`
`WO0057270 WIPO patent: FAROOQUI AAMIR A; OKLOBDZIJA VOJIN G;
`CHEHRAZI FARZAD; “ADDER CIRCUIT”; Publication date: 2000-09-28.
`Applicant: SONY ELECTRONICS INC (US).
`
`WO0059112 WIPO patent: CHEHRAZI FARZAD; OKLOBDZIJA VOJIN G;
`FAROOQUI AAMIR A; “MULTIPLIER CIRCUIT”; Publication date: 2000-10-05.
`Applicant: SONY ELECTRONICS INC (US).
`
`WO0140934 WIPO patent: CHEHRAZI FARZAD; OKLOBDZIJA VOJIN G;
`“PIPELINED DATA PATH CIRCUIT”; Publication date: 2001-06-07. Applicant:
`SONY ELECTRONICS INC (US).
`
`WO9914671 WIPO patent: FLECK ROD G; ARNOLD ROGER D; HOLMER
`BRUCE; OKLOBDZIJA VOJIN; CHESTERS ERIC; “DATA PROCESSING UNIT
`WITH HARDWARE ASSISTED CONTEXT SWITCHING CAPABILITY”;
`Publication date: 1999-03-25 Applicant: INFINEON TECHNOLOGIES NORTH
`AMERICA CORP.
`
`
`
`
`
`
`
`
`Modified: January 24, 2013
`
`
`
`
`Page 14
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`Resume of Prof. Vojin G. Oklobdzija, Fellow IEEE
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`

`
`Consultant Curriculum Vitae
`
`
`
`Education: Vojin G. Oklobdzija
`
`Year
`1982
`1978
`1971
`1968
`
`
`College/University
`University of California at Los Angeles, CA
`University of California at Los Angeles, CA
`University of Belgrade, Yugoslavia
`University of Belgrade, Yugoslavia
`
`
`Publications: Vojin G. Oklobdzija
`
`BOOKS
`
`Degree
`Ph.D., Computer Science
`MS, Computer Science
`Dipl. Ing, Electrical Engineering
`Ing, Electrical Engineering
`
`[1] V. G. Oklobdzija, “High-Performance System Design: Circuits and Logic,” IEEE
`Press, July, 1999.
`
`[2] V. G. Oklobdzija, “Computer Engineering,” CRC Press, December 2001. (Selected
`as “Outstanding Academic Title” in 2002 by Choice Magazine out of 22,000 titles).
`
`[3] V. G. Oklobdzija et al, “Digital System Clocking: High-Performance and Low-Power
`Aspects,” John Wiley Publishing, January 2003.
`
`[4] V. G. Oklobdzija, R. K. Krishnamurthy, “High Performance Energy Efficient
`Microprocessor Design,” Springer, ISBN: 0-387-28594-6, June 2006.
`
`[5] V. G. Oklobdzija, “Digital Systems and Applications,” Taylor & Francis Publishing,
`December 2007.
`
`[6] V. G. Oklobdzija, “Digital Design and Fabrication,” Taylor & Francis Publishing,
`December 2007.
`Books Published under my editorship in Computer Engineering book series:
`
`[7] C. Piguet, “Low-Power Electronics Design,” CRC Press, August, 2004.
`
`[8] B. Vasic, E. M. Kurtas, “Coding and Signal Processing for Magnetic Recording
`Systems,” CRC Press, November 2004.
`
`[9] T. Reed, “Digital Image Sequence Processing, Compression and Analysis,” CRC
`Press, 2004.
`
`BOOK CHAPTERS:
`
`[1] V. G. Oklobdzija, “Computer Arithmetic,” The Electrical Engineering Handbook, R.
`C. Dorf (Ed.), a Chapter, CRC Press, Inc., pp. 1858-1865, 1993.
`
`
`
`
`Modified: January 24, 2013
`
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`

`
`Consultant Curriculum Vitae
`
`
`
`[2] V. G. Oklobdzija, “Computer Organization: Architecture,” The Engineering
`Handbook, R. C. Dorf (Ed.), a Chapter, CRC Press, Inc., 1995.
`
`[3] V. G. Oklobdzija, “Digital Systems” , The Engineering Handbook, R. C. Dorf (Ed.),
`Introduction into Digital Systems, Chapter, CRC Press, Inc., 1995.
`
`[4] V. G. Oklobdzija, “Computers” , The Engineering Handbook, R. C. Dorf (Ed.),
`Introduction into Computers, a Chapter, CRC Press, Inc., 1995.
`
`[5] V. G. Oklobdzija, “Digital Arithmetic,” Wiley Encyclopedia of Electrical and
`Electronics Engineering, Book Chapter, John Wiley publishing, 1999.
`
`[6] V. G. Oklobdzija, “Reduced Instruction Set Computing,” Vol.18, Wiley
`Encyclopedia of Electrical and Electronics Engineering, Book Chapter, John Wiley
`publishing, 1999.
`
`[7] V. Oklobdzija, “High-Speed VLSI Arithmetic Units: Adders and Multipliers,” in
`“Design of High-Performance Microprocessor Circuits,” Book Chapter, Book edited by
`A. Chandrakasan, IEEE Press, 2000.
`
`[8] V. G. Oklobdzija, “Clocking Multi-GHz Systems,” Low-Power Electronics Design,
`C. Piguet (Ed.), a Chapter, CRC Press, Inc., 2004.
`
`[9] N. M. Nedovic, V. G. Oklobdzija, “Clocked Storage Elements in Digital Systems”, in
`“High Performance Energy Efficient Microprocessor Design” V.G. Oklobdzija, R.K.
`Krishnamurthy (Ed.), a Chapter, Springer, 2006.
`
`[10] V. G. Oklobdzija, B.R. Zeydel, “Design of Energy Efficient Digital Circuits”, in
`“High Performance Energy Efficient Microprocessor Design” V.G. Oklobdzija, R.K.
`Krishnamurthy (Ed.), a Chapter, Springer, 2006.
`
`[11] V. G. Oklobdzija, B.R. Zeydel, “Energy-Delay Charachteristics of CMOS Adders”,
`in “High Performance Energy Efficient Microprocessor Design” V.G. Oklobdzija, R.K.
`Krishnamurthy (Ed.), a Chapter, Springer, 2006.
`
`
`
`
`
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`
`Modified: January 24, 2013
`
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`
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`

`
`Consultant Curriculum Vitae
`
`
`
`JOURNAL PAPERS:
`
`[1] V. G. Oklobdzija and N. Konjevic, “Refractive-Ray Bending In Axially-Symmetric
`Plasma Sources,” Journal of Quantitative Spectroscopy and Radiative Transfer, Vol. 14,
`pp. 389-394, 1974.
`
`[2] V. G. Oklobdzija, “Up/Down Display Counter Counts Over Pos/Neg Range,” Digital
`Design, pp. 94-95, 1981.
`
`[3] V. G. Oklobdzija and M. D. Ercegovac, “An On-Line Square Root Algorithm,” IEEE
`Transactions on Computers, Vol. C-31, No. 1, pp. 70-75, 1982.
`
`[4] V. G. Oklobdzija, “Design Note. Opto-Isolated RS-232 Interface Achieves High Data
`Rate,” Electronics, Vol. 55, No. 1,