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`[II] Patent Number:
`[45] Date of Patent:
`Patent Number:
`[I l]
`
`United States Patent (19J
`4,493,067
`Jan. 8, 1985
`Thomas et al.
`United States Patent m]
`4,493,067
`Date of Patent:
`Thomas et a].
`[45]
`Primary Examiner-Nelson Moskowitz
`SEISMIC VIBRATOR CONTROL SYSTEM
`Jan. 8, 1985
`Attorney. Agent. or Firm-William J. Miller
`Inventors: Bobby J. Thomas; Billy J. Heath,
`[57]
`ABSTRACT
`both of Ponca City, Okla.
`Primary Examiner—Nelson Moskowitz
`[54
`SEISMIC VIBRATOR CONTROL SYSTEM
`Attorney. Agent, or Firm—William Jr Miller
`[75
`Inventors: Bobby J. Thomas; Billy J. Heath,
`A method and apparatus for construction of a seismic
`Assignee: Conoco Inc., Ponca City, Okla.
`both of Ponca City, Okla.
`[57]
`ABSTRACT
`vibrator control signal which comprises manually se(cid:173)
`AppL No.: 253,207
`lecting sweep parameter data values for starting fre(cid:173)
`A method and apparatus for construction of a seismic
`[73
`Assignee: Conoco Inc., Ponca City, Okla.
`Filed:
`Apr. 13, 1981
`quency, ending frequency. sweep time and taper time
`vibrator control signal which comprises manually se-
`[21
`Appl, No: 253,207
`and inputting to an addre~sable storage medium. There(cid:173)
`lecting sweep parameter data values for starting Fre-
`Int. Cl.' ...................... G01V 1/155; GOIV 1/143
`[22
`Filed:
`Apr. 13, 1981
`quency, ending frequency, sweep time and taper time
`after, determining for each of a plurality of sample
`U.S. Cl. ..................................... 367/189; 181/107
`and inputting to an addressable storage mediumi There-
`points throughout the sweep time, the sweep rate of
`[51‘
`Int. CI.j ..................... 001V 1/155; GOlV VHS
`Field of Search ..................... 367/23, 41, 49, 189;
`after, determining for each of a plurality of sample
`change per sample point and the accumulated fre(cid:173)
`[52
`.............. 367/189; 181/107
`364/421; 181/107; 73/662
`points throughout the sweep time. the sweep rate of
`Field of Search ..................... 367/23, 4], 49, 189;
`[58
`quency value per sample point, and outputting in real
`change per sample point and the accumulated fre-
`364/421: 181/107; 73/662
`References Cited
`time the digital sweep values for each ~uccessive sample
`quency value per Sample potnt, and outputting in real
`point, and subsequently converting and smoothing ~aid
`U.S. PATENT DOCUMENTS
`References Cited
`time the digital sweep values for each successive sample
`successive digital sweep values to an analog control
`US. PATENT DOCUMENTS
`point. and subsequently converting and smoothing said
`3.440.599 4/1969 Waters et al.
`signal of the selected frequency, relative amplitude and
`successive digital sweep values to an analog control
`3.4401599
`4/1969 W'aters et al,
`..
`3.460.648 8/1969 Brown et al. .........
`duration of sweep length.
`3.460.048
`8/1969 Brown et a1.
`..
`signal of the selected frequency, relative amplitude and
`3,7J9.870 6/1'l73 Pelton et al.
`3.739.870
`6/1973 Pelton et al‘
`duration of sweep length
`3.886.493 5/1975 Fair
`3.886.493
`5/1975 Falr .............
`12 Claims, 5 Drawing Figures
`4.168.485 9/1979 Payton et al. .
`4.168.485
`9/1979 Payton el al.
`12 Claims, 5 Drawing Figures
`
`[54]
`[75]
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`SEISMIC VIBRATOR CONTROL SYSTEM
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`that can be decoded at selected sites for activating one
`or more sweep vibrators.
`Other objects and advantages of the invention will be
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`read in conjunction with the accompanying drawing
`which illustrate the invention.
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`of encoding and
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`BACKGROUND OF THE INVENTION
`SEISMIC VI :
`I. Field of the Invention
`BACKGRO
`The invention relates generally to control signal gen(cid:173)
`erators and, more particularly, but not by way of limita(cid:173)
`1. Field of the ll
`The invention r‘
`tion, it relates to a digital signal generator for use in
`erators and. more
`controlling a seismic vibrator.
`tion,
`it relates to .
`2. Description of the Prior Art
`controlling a seis
`The prior art includes various forms of analog signal
`2. Description 0
`generator which have been utilized in controlling fre(cid:173)
`The prior art in
`quency. duration and amplitude of seismic vibrators. In
`generator which h
`general. the prior equipment has taken the form of ana- 15
`qucncy. duration a
`log generation devices for generating the prescribed
`general. the prior a
`replica or control signal. Such prior types of generator
`log generation de
`have not been capable of providing the frequencies
`replica or control .
`have not been ca
`necessary to resolve thin layering in geologic events,
`nor have they been able to provide the requisite sweep 20
`necessary to resol
`linearity to minimize ghosting or correlation back(cid:173)
`nor have they beei
`linearity to mini
`ground. One known prior teaching that i~ directed to
`ground. ()ne kno
`digital construction of a prescribed control signal is the
`digital constructio
`subject of U.S. Pat. No. 1.460,648 in the name of Waters
`subject of US Pat
`et al. This patent de,cnhe~ a digital system for provid- 25
`et al. This patent (
`1ng accurate '>Weep signals, but it has proven impractical
`mg accurate sweep
`due to tht' very large drum requirements when utilizing
`due tothe cry
`r
`such computational digital equipment.
`such computation
`SUMMA'
`SUMMARY OF THE INVENTION
`The present invention relates to a sweep generation
`The present inv
`system utiliLing digital microprocessor technology that
`system utilizing di
`achieves the swee
`ach1eves the sweep parameters necessary to meet the
`requirements of n
`requirements of not only the commonly used sweep
`speetrums‘. but 211%
`spectrum-;, hut also the requirements for the high-reso- 35
`lution seismic surv
`lution seismic surveying now being practiced.
`The sweep gen
`The sweep generation system consists of a micro(cid:173)
`processor ineludin
`proces'or including program memory and random ac(cid:173)
`eess memory whie
`timer to construei
`cess memory which function;, under a real-time interval
`timer to construct a desired seismic vibrator control 40
`signal
`in aceordan
`signal in accordance with manually input parameters.
`Input parameters
`thumb wheel swi
`Input parameters are initially input to the system by
`quency. ending fr
`thumb wheel switches t(' select such as starting fre(cid:173)
`and the central pr
`quency. ending frequency, sweep time and taper time,
`orders the increme
`and the central processing unit of the microprocessor
`a digital to analog
`orders the incrementing of output sweep values through
`seismic vibrator 5y
`a digital to analog converter and smoothing filter to the
`processor through
`seismic vibrator system. Control output from the micro(cid:173)
`allows selected tra
`processor through an external device control logic also
`(lo-random code i
`allows ~elected transmit control logic as well as a pseu- 50
`than a single seis
`Therefore. it
`is
`do-random code output for synchronization of more
`than a ~ingle seismic vibrator.
`provide a seismic
`puhle of increased
`Therefore, it is an object of the present invention to
`and ending frequ
`provide a seismic vibrator control signal generator ca(cid:173)
`'
`remems.
`pable of increased frequency range and having starting 55
`It is also an obje
`and ending frequencie~ that are selectable in I hertz
`a vibrator control
`increments.
`sweep lengths ofg
`It is also an object of the present invention to provide
`of greater length.
`a vibrator control signal that is capable of producing
`It is a further 0:
`sweep lengths of greater duration and sweep taper times 60
`vide a control si_
`of greater length.
`which enables a ,
`It is a further object of the present invention to pro(cid:173)
`ground In the me
`Finally,
`it
`is a
`vide a control signal generator for a seismic vibrator
`provide a control
`which enables a great reduction in correlation back(cid:173)
`ground in the measurable frequency ranges.
`Finally, it is an object of the present invention to
`provide a control signal generator which is also capable
`of encoding and transmitting a pseudo-random code
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`FIG. 1 is a system block diagram of the control signal
`10 generator;
`FIG. 2 is a schematic diagram of the sweep start logic
`and central processing unit of the present invention;
`FIG. 3 is a schematic diagram of the read only mem(cid:173)
`ory and random access memory in bus interconnection
`with the input/output stages of the present invention;
`FIG. 4 is a schematic diagram of the parameter input
`logic of the present invention; and
`FIG. 5 is a schematic diagram of the sweep output
`stages of the present invention.
`
`30
`
`45
`
`DETAILED DESCRIPTION OF THE
`INVENTION
`The central control of the present system is a micro(cid:173)
`processor which of necessity utilizes relatively slower
`processor speeds; therefore, the system utilizes an algo(cid:173)
`rithm allowing for realtime output of the control signal
`sweep as it is developed. The particular algorithm as
`based on the classical vibrational sweep generation
`formula is:
`
`12-/J J
`/1 + -rr- nllr
`[
`
`nllt
`
`IJ,ud = 21T
`
`(I)
`
`where,
`f1 =starting frequency
`f2 =ending frequency
`llt =sample time increment
`T =total sweep time
`n =number of current sample.
`Letting K represent accumulated frequency for any
`sample point, the accumulated frequency will then be
`equal to the starting frequency plus the sum of the rate
`of change per unit time from sample n =0 to the current
`sample. As,
`
`n
`K =/1 +:!: DF
`0
`
`where,
`
`DF = h ~/1
`
`(2)
`
`(3)
`
`rate of change per unit time.
`If DF equals the change in frequency per unit time
`and K is the accumulated frequency at a given sample,
`the next sample will be
`
`(4)
`
`In order to determine the amplitude of a sample, a
`table of values corresponding to 7T radians or one-half
`65 cycle of a sine function is first calculated. These values
`are then spaced at 256 equal increments along the half
`cycle. The accumulated frequency K which is in radi(cid:173)
`ans is represented somewhere in the table of values by a
`
`EX. PGS 1067
`
`
`
`4,493,067
`
`J,. c J,
`
`()J
`
`(St
`Smce the table is onl) 1T rad1ans in length and J is an
`eight-bit hinary number representing 25b addre.,.,es. a
`Since the table is only 77 radians in length and J is an
`means of deternuning when 1T radians (a polarity sign
`eight-bit binar} number representing 25b addresses. a
`change 1 ha' been cxcceded in nece.,sary. Thus, a;, the
`new K I' summed inlll J. an overfiow will occur when
`means of determining when 1r radians (a polarity sign
`change) has been exceeded in necessary Thus. as the
`;; radtan' ha\ ,. been reached. and the sum of thts over-
`new K is summed into J. an overflow will occur when
`11(1\\ will he an indicator or sme: even number;, w1ll
`r radians haw: been reached. and the sum of this oveiv
`tloss Will be an indicator ot’ sine: even numbers will
`''gnify a po'>ltiVe pol:trit~ and odd numbers will '>ignify
`,, negative p(llarity requlflll[! the cnmplcmcn1 of the
`signify a positive polarity and odd numbers Will signify
`tabk \alue.
`a negative polarity requiring the complement of the
`table value.
`Thc taper rll'h.:t1on utili7ed in tlu-, particular algo(cid:173)
`The taper ltiviction utili7ed in this particular algo—
`nthm i-, linear. although non-linear ;,weep<, and/or non(cid:173)
`rithm is linear. although non-linear sweeps and/or non-
`fi!Jc..lf t..tpc'r' can he generated with minor change' to
`linear tapers can be generated With minor changes to
`1hc program. if desired. A;, de;,criheJ hcrt:in, the taper
`the program. if desired. As described herein, the taper
`r.tte pf l hangc per sample point. i.e .. 6 T
`io; a binary
`rate of thange per sample point.
`i.e.. AT is a binary
`fraction \\ h1ch i, the reuprocal of the taper length TL
`traction “Inch is the reciprocal of the taper length TL
`''-'nmd' time'> the number of ;,ampk'i per 'ccond,
`111
`in seconds times the number ol‘ samples per second.
`'-'Sf'S The taper fa,~t''' TF I'> tht:n a binary fraction
`\‘SPS The :::per t‘tictt‘i TI: is then a binary Fraction
`\\ hich is a summation of saccessise AT values as shown
`")nch '' ;1 '>llrnmalinn ( rf >~Icce'>'>ive 6 T values"-' 'hnwn
`nelmt.
`
`A’
`fl.
`H:
`
`:1. was
`\S/'.)
`H sneer start, .md
`
`If
`
`thi
`
`t‘>
`
`I I
`
`4
`3
`mtcrval timer 14 anJ '>Weep-.,tart logic 16 a;, h<l'>IC clock
`L·nrre.,pnnding amplitude. Thw •. the correct amplitude
`4,493,067
`L·an he loL·akd 111 the table hy ;,.:tting J as a number that
`frequency '' input from sy,tem dock and re;et logic 18
`4
`3
`stan' at zero and accumulate., the amount of pha;,e
`via kad 20. Data acce'i'> from microproce'>'>Or 12 i;, car-
`interval timer 14 atid sweep—start logic 16 as basic clock
`corresponding amplitude. Thus. the correct amplitude
`ad'>·anced from sample to ;,ample. Since the table of
`ned out through addre'' hu<, 22, Jata hu;, 24, and con(cid:173)
`can be located In the table by setting I as a number that
`frequency is input from system clock and reset logic 18
`value' i;, also dl'>p<.hed in equal radian increment'>. J will
`trol hu-, 26. The microproct:"or 12 i-. C<ll!'>lituted of chip
`starts at zero and accumulates the amount of phase
`via lead 20. Data access from microprocessor 12 is car»
`al'" be the addre.,., of the desired amplitude value.
`circuitry, Intel H080A, to he further de'>cTihed, and the
`advanced from sample to sample Since the table of
`ried otit through address bus 22. data bus 24, and con»
`Therefore. incrementing of J will adhere to
`requi-.ite program. amrlitude table and p'>eudo-random
`values is also disposed in equal radian increments. J will
`trol bus 26. The microprocessor 12 is constituted olcliip
`also be the address of the desired amplitude value.
`codt: wa., converted tn the Intel Microproce;,;or Lan(cid:173)
`circuitry. liitcl 8080A, to he further described. and the
`J,, .II.
`Therefore, incrementing of] will adhere to
`guage and burned into era;,able program rt:ad onl~
`requisite program. amplitude table and pseudo-random
`I O memory (EPROM) module'> 28. Once programmt:d, the
`code was converted to the Intel Microprocessor Lan<
`gauge and burned into erasable program read only
`EPROM module' 28 cannot he changed without era'>(cid:173)
`Hi
`memory (EI’ROM t modules 28. Once programmed. the
`mg and totally reprogramming the '>Y'>tcm A '>elected
`El’ROM modules 28 cannot be changed without eras-
`am<lUnt of random acce;,;, memory 30 IR.I\M) h
`in·
`ing and totally reprogramming the system. A selected
`eluded for u'>c a' '>Cratchpad >torage fur parameter<,.
`amount of random access memory 30 t'RAMi
`is in»
`;,weep length counter, and taper length counlL'r'> Both
`cluded for use as scratchpad storage for parameters.
`menwry module;,, EPROM 211 and RAM 30, are con(cid:173)
`sweep length counter. and tapcr length counters Both
`trolled and addrc.,.,ed by the micropruu:\'>or 12 mer
`memory modules. EI’ROM 2.8 and RAM 30, are con-
`addn:-., hu;, 22 and control bu' 24 Input and output
`trolled and addressed by the microprocessor 12 met
`logic i;, al'>n ennt rnlled h~ micropn>cc.,.,or 12 "1 I hat an\
`address bus 22 and control bus 24 liiptit and output
`21 ' Jat:~ 1nput or output i' ;,ynchronized with the h;p,Jc
`logic is also controlled by microprocessor 12 so that any
`data input or output
`is synchronized u itli
`the basic
`mic1 oprucc::;,,or timing
`micioproccssor timing.
`Parameter input ;,wllche' 32. clecimal thumh "heel
`Parameter tiiptit switches 32, decimal thumb \ihecl
`<,witche;,, provide ;,dected hinar) cockd Jecmwl lllput'
`switches, provide selected binary coded decimal inputs
`fc. \Weep tillll' anJ taper
`c~ 11ftht: 'i\\c;ep parameter'>. i.e .. f1
`ofthe ‘s\\cL‘p parameters, i,c.. it
`lg. sweep lime and tapcr
`l!lllt:, \ 1a l111t: 34 to paramekr mput logic 36. An encode
`time. in: line 34 to parameter input logic 36. An encode
`sw1tch 311 i;, ahu <JV~ilahk if the de<,tred npl·ratton h to
`switch 38 is also available if the desired operation is to
`tr,Pl'>nJit the p;,eudo-random code pnor t11 <i!llputtin).!
`transmit
`the pseudoirandom code prior to outputting
`the ;,weep The n1crnal device contr"l lugtc 42 d1·
`the sweep. The external device control
`logic 42 di-
`_10 reeled hy the data hw, 24 anJ controlled hy the c.onlrol
`3t)
`rcctcd by the data bits 24 and controlled h) the control
`hu;, 40 provide;, CLEAR and ADVA:--;cr~ 1npuh to rile
`bus 40 provides CLEAR and ADVANCE inputs to the
`parameter input logic 36 to cnrrectl) enter the paramc·
`parameter input logic 36 to correctly enter the parame-
`ter switch values through data input 44 to data has 24.
`ter '>Wildt values through data mput 44 t(l (bta bu, 24
`The external device control logic 42 also provtdcs an
`The external device control logic 42 al~o prmllde'> an
`output enabling the transmitter control logic 50 so the
`_15 output enabling the tran<,milter control logic 50 ;,o the
`pseudo-random code can be
`transmitted while
`a
`p;,eudo-random code can he
`tran;,mittcd while a
`SWEEP END output on line 52 is returned to sweep
`SWEEP E:'-JD output un lim· 52 i' returned to <,weep
`start logie16.
`;,tart loptc 16.
`Final data output is available from data bus 24 Vlu line
`F1nal data output j, available from data bus 24 vta line
`4t)
`54 to data output 56 under control olcontrol hus line 58
`4r1 54 to data output 56 under control of control hu;, line 58
`Output from data output in stage 56 is then applied to a
`Output from data output 111 <,tage 56 1' then applied to a
`digital to analog converter 50 and the final analog signal
`digital to analog converter 50 and the final analog ~tgnal
`on lead 62 is applied through a smoothing filter 64 for
`output as control signal on the SWEEP OUT line 66.
`on lead 62 !'> applied through a ;,moothing filter 64 fur
`FIG. 2 illustrates in greater detail the microprocessor
`output a' control '>ignal on the SWEEP OUT line 66.
`12 and attendant bus interconnections along With inter-
`FIG. 2 illustrate\ in greater detail the microproce,,or
`val timer ]4 and the sweep start logic )6. The micro—
`12 and attendant bu<, interconnections along with inter(cid:173)
`processor 12 is of the lntel type utilizing a type 8080A
`val timer 14 and the sweep ;,tart logic 16. The micro(cid:173)
`central processing unit 70 in connection with a type
`pwce"or 12 is of the Intel type utilizing a type 8080A
`8224 clock generator and driver 72 and a type 8228
`central proce;,-;ing unit 70 in connection with a type
`iii-directional bus driver and system control 74. The
`50 ~224 clod generator <Jnd dnver 72 and a type 8228
`clock generator and driver 72 provide basic system
`bi-directional bus driver anJ system control 74. The
`timing as output on line 76.
`i.e., 2.048 mgI—lz. and as
`clock generator and driver 72 provide basic system
`input to interval timer 14 The interval tuner 14 consists
`of series divider circuits 78. 80. and 82. each type 7490,
`liming a' output on line 76. i.e, 2.()48 mgHz, and a'
`which provide the basic interval timing pulse output on
`input to intc:rvaltimer 14. The interval timer 14 consist-;
`or ,t·rie-. divider c1rcuih 78, 80. and 82, each type 7490,
`line 84 at 204?2 Hz. The timing signal on lead 84 is then
`applied to input of gate 86 For input to a flip-flop 88. 1C
`whllh provide the ha.,ic tnten.al timing pul-;e output on
`type 7474, when the gate is enabled.
`lme !U at 204F Hz. The timing signal on lead 84 i;, then
`Start up of the system is effected either through mans
`applied to input of gate 86 for input to a fiip-fiop 88, IC
`tial start 90 or remote start 92 through gate 94 as input
`type 7474, when the gate i.o; enabled.
`to a first flip-flop 96. type 7474. Ftip~flop 96 then pro-
`Start up of the system is effected either through man(cid:173)
`vides output via line 98 enabling gate 86 to pass interval
`ual start 90 or remote start 92 through gate 94 as input
`timer pulses to actuate the second flip-flop 88 thereby to
`to a first fiip-flop 96, type 74 74. Flip-flop 96 then pro(cid:173)
`provide interrupt pulse output on line 100 to the central
`vides output via line 98 enabling gate 86 to pass interval
`processing unit 70, The first flip-flop 96 output on the
`gate lead 98 is also applied to each of the divider circuits
`timer pulses to actuate the second flip-fiop 88 thereby to
`78, 80 and 82. A SWEEP END input on line 52 is ap-
`provide interrupt pulse output on line 100 to the central
`processing unit 70. The first flip-flop 96 output on the
`gate lead 98 is also applied to each of the divider circuits
`78, 80 and 82. A SWEEP END input on line 52 is ap-
`
`IF,~'-- O, ..,\ .. t.'er end
`IIIli
`The number of ssseep values is determined by multi~
`plsing the ssx eep length by 2048. The number 2048 is
`The number of 'i\\ eep value;, i;, determined by multi(cid:173)
`the number of samples per second and is fixed at this
`plying the ''' eep length by 2048 The number 2048 i;,
`salue because it
`is the minimum number of samples to
`adequately describe a desirable upper frequency limit of
`the number of -.ample' per .,econd and is fixed at thl'>
`500 hertz: l‘to\se\‘et'. a higher sampling rate maybe used
`\ alue hecau'e it i, the minimum number of 'ample' to
`thereby to extend the upper frequency limit. The num-
`.1dequately de'l'flhl' "de.,irahle upper frequency limit of
`ber of sweep values to be effected by the taper factor is
`500 herll: hm\ e\'el. a higher 'ampling rate may be u'ed 55
`also determined by multiplying the taper time by 2048.
`thereby tn C\ tcnJ the upper frequency limit. The num(cid:173)
`Implementation of the algorithm is made by the use of
`her of ~weep values to he effected by the taper factor i;.
`integer arithmetic rather than floating point arithmetic
`also determined by multiplying the taper time by 2048.
`in order to achieve minimum calculation. and all input
`Implementation of the algorithm is made by the use of
`values. counters. and the parameters K. DF. .1, TF are
`integer arithmetic rather than fioatmg point arithmetic nO
`represented as integers
`111 order to achieve minimum calculation. and all input
`FIG.
`1 shows the total system block digram.
`the
`\alues. counttT'i. and the parameters K. DF, J, TF an:
`specific portions of the system shown in FIGS. 2—5 to
`be discussed in addition. The sweep generation system
`represented a~ mteger~.
`10 consists of a microprocessor 12 and peripheral ele-
`FIG. 1 ~how~ the total system hlm;k digram, the
`ments. Microprocessor 12 functions under control of
`specific portion> of the system ;hown in FIGS. 2-5 to 65
`be discussed in addition. The sweep generation system
`10 consists of a microproce~sor 12 and peripheral ele(cid:173)
`ments. Microprocessor 12 function'> under control of
`
`I!
`
`i
`
`. _\i‘ btgiiiiuag taper
`
`in;
`
`:i'
`!I
`The taper factor TF is applied to all sweep values in
`The taper factnr Tr' '' applied to all sweep value;, 111
`succession until
`the taper lenih has been reached At
`'u-:cc,sion t:ntil the t:tpcr knth ha;, been reached AI
`this point. TF is maximum alltming full amplitude sal-
`i 1ll' P''im. fF i;, m~x11num allowing full amplittH.k \ al(cid:173)
`tres to be output When time is reached for the end
`taper.
`the reverse ial-tes place and the AT \alues are
`u-:' tc• hl· c·utpul
`'When l!me i' reached for the end
`subtracted as shown belou.
`t:Jper, the re'> crse take> place: and the D. T 'a lues are
`'>Ubtr;;ctc·d '~'> 'huwn below
`7",: TI“.
`i A7 end taper.
`rm and
`
`H5"; ll. sis eep end
`fl. c IF,.
`
`llttt
`
`~
`
`1)
`
`45
`
`5t)
`
`55
`
`ht)
`
`65
`
`EX. PGS 1067
`
`
`
`the microprocessor 12 through external control logic
`
`6
`the parameter mput logic 36. Thu'>, the START fre(cid:173)
`quency ft
`i'> dialed in three d1gits hy decimai/BCD
`switches 140, 142 and 144 and the re'>pectivc BCD out(cid:173)
`put is input to a re'ipcctive one of the I tHo- I decoders,
`i.e., the 2n decoder 146, 21 decoder 148, 2" decoder 150
`<lnd 21 decoder 152. The BCD outpuh from the respec(cid:173)
`tive switche'> 140-144 i., via lead group'> 34-1. 34-l, and
`34-3, with each of the re'>pective lead'> of the lead group
`applied to a respective input of the decoder'> 146-152 as
`10 designated. That i'>. the 1 output of lead group 34-1 j.,
`applied lo the S1-1 input or pin 0 of decoder 146, tht: 2
`output of lead group 34-1 i'> app!Jed to the S1-2 mput or
`pin 0 of decoder 148. etc.
`In like mannt:r. all of the swllch inpuh arc applied 1n
`15 four conductor BCD form to the rt:>pcctlve dt:coder.,
`146-152. The END frequency or f2 i'> dialed for input m
`three decimal digih hy thumb whet:! '>Witcht:,. 154. 156
`and 158 a~ the HCD outputs on lead group'> 34-4. 34-5
`and 34-6 are applied to the re'>pcctivt: dccodn-. 146-152.
`20 The SWEEP LENGTH "d~aled in hy thumb wheel
`-.witchc-. 160. 162 <Jnd 164 wllh BCD outpul <HI lead
`group., 34-7, 34-8 and 34-9; and tht: TAPER Tl\1E. a
`two d1git number, is di<Jied Ill hy -.election nf '>W!tche.,
`166 and 168 with BCD output on re'>pective kad group.,
`34-10 and 34-11. All binary coded '>witch mput'> from
`lead group., 34-1 through 34-11 <Jre applied to the re-
`spective binary decoder., 146-152 a~ deSignated. The
`16-to-1 decoder., 146-152 are each IC Type 74!50.
`-.c(cid:173)
`The decoders 146-152 are each controlkd 111
`quencc hy a Binary Counll:r intcgratt:d Circuit 154. IC
`Type 749.\, in rt:~pon'e to<;witch ADVA'\ICE inpul on
`lead 156 and \Witch CLEAR input on lead 158. The
`'>Wllch ADVA'\ICE and CLEAR mput., arc: conducted
`from the external device control logic 42 (FIGS. I and
`\5 3). HCD output from the decoder'> 146-152 i-, then de(cid:173)
`rivt:d from the pin 10 connt:ctit1fl to con'>tltute lead
`group 134 as applied to 'witch mput terminab of the
`data mput circuit 44 (FIG. 3)
`The output from data output 56 (FIG 3) ~~ in the
`form of eight-hit binary. i.e., lead Bl-B!l or inpul group
`130 of FIG. 5. The bmary input of kad group 130 "
`then applied to il digital to analog converter 60. a Hurr(cid:173)
`Hrnwn Type DAC 90 with output present at JUnction
`160. Tht: converter output at JUnction 160 i., then ap-
`plied through smoothing filter<; 64 which con'>ISt of
`<;erieo; act