EZ-USB™
`Integrated Circuit
`
`EZ-USB Family
`
`The Anchor Chips EZ-USB™ family (AN21XX/AN23XX) provides
`significant improvements over other USB architectures including an
`enhanced 8051 core, 4, 8 or 16 Kbytes of RAM, an intelligent USB core,
`and high-performance I/O ports. The family includes 16 different
`products to accommodate the needs of different systems.
`
`The enhanced 8051 core provides five times the performance of the
`standard 8051, while maintaining complete 8051 software compatibil-
`ity. With on-chip RAM, firmware code can be downloaded from the
`host PC. This allows the peripheral manufacturer to easily modify and
`transfer new code to current and new users. This on-chip memory
`eliminates the need for external memory.
`
`The EZ-USB family supports high-bandwidth transfers by providing
`an efficient mechanism to move data between external memory and
`the USB FIFOs. Using this “turbo mode,” the 8051 core can transfer
`1024 bytes of data in or out of an isochronous FIFO in 338 microsec-
`onds. This leaves a high percentage of the bandwidth for the processor
`to service the application. The EZ-USB family also supports an equiva-
`lent data transfer rate for bulk packets of over 2 Mbytes per second,
`which is more than the USB bandwidth.
`
`The EZ-USB family conforms to the high-speed (12 Mbps) require-
`ments of USB Specification version 1.0, including support for remote
`wake-up. The internal SRAM replaces Flash memory, EEPROM,
`EPROM, or masked ROM that is conventionally used in other USB
`solutions.
`
`The EZ-USB family offers two packages, a 44 PQFP and an 80 PQFP.
`All EZ-USB devices are pin- and software-compatible. And, all RAM
`versions have ROM equivalents to allow easy migration for high-
`volume applications.
`
`Features
`· Single-chip, low-power
`solution for high-speed USB
`peripherals
`· Firmware downloadable
`· High-performance I/O port
`· Small board space (less than
`1 square inch)
`· 44 PQFP or 80 PQFP
`· USB Specification 1.0
`compliant
`· Uses commercially-available
`8051 software tools
`· Thirty-one flexible endpoints
`· All endpoints can be double
`buffered
`· 4, 8 or 16 Kbytes of memory
`· Five times the speed of a
`standard 8051
`· Supports composite devices
`· I²C controller
`· Supports isochronous, bulk,
`control, and interrupt data
`· On-chip PLL
`
`EZ-USB Products
`AN2121SC
`AN2321SC
`AN2125SC
`AN2325SC
`AN2126SC
`AN2326SC
`AN2131SC
`AN2331SC
`AN2135SC
`AN2335SC
`AN2136SC
`AN2336SC
`AN2131QC
`AN2331QC
`AN2141QC
`AN2341QC
`
`Exhibit 2025 - Page 01 of 16
`
`

`
`Complete USB Design Made Easy
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`Typical USB
`Implementation
`
`Anchor USB
`Solution
`
`432
`
`With the EZ-USB family’s
`software utilities and
`tools, firmware develop-
`ment is simplified and acceler-
`ated. Firmware can be tested
`independent of drivers, allowing
`the firmware developer and
`driver software developer to write
`code simultaneously. They do not
`need each other to verify and test
`code. This dual path decreases
`software development time.
`
`The EZ-USB RAM
`architecture provides
`design and software
`flexibility. Its “soft” configuration
`enables peripheral manufacturers
`and designers to make changes to
`the USB device through software.
`This means complete flexibility
`with minimal design risks.
`
`The EZ-USB family uses
`an intelligent USB core to
`simplify 8051 firmware
`code by as much as 80%. This
`reduces the firmware designer’s
`need to develop code to handle
`the low-level nuances of the USB
`specification. The designer is free
`to concentrate on higher level
`functions. EZ-USB firmware
`development is quick, requiring
`less binary code and reducing the
`likelihood of errors.
`
`With the EZ-USB family, the
`peripheral designer gains
`two overall advantages:
`First, the design is much
`simpler because of the
`chip’s significant integra-
`tion and built-in flexibility.
`Second, the EZ-USB archi-
`tecture reduces software
`code significantly over other
`USB solutions. This combi-
`nation gives users a quick
`and easy path toward ob-
`taining a working proto-
`type.
`
`2
`
`Anchor Chips’ EZ-USB family
`eliminates the need to become an
`expert in USB. It allows the
`designer to take advantage of the
`benefits of USB without investing
`large amounts of time and
`energy. With the EZ-USB family,
`peripheral designers can have
`USB traffic running within
`hours, instead of weeks as with
`other USB solutions.
`
`The EZ-USB family of controllers
`simplifies the process of imple-
`menting USB hardware and
`software development for
`peripheral manufacturers. Low-
`level USB protocol requirements
`are automatically handled by the
`Anchor smart USB core and the
`included software utilities.
`
`1
`
`A typical USB
`implementation uses
`nonvolatile memory
`(EPROM, EEPROM, Flash memo-
`ry), a microprocessor, RAM, USB
`SIE and DMA. The EZ-USB
`family includes all the building
`blocks for a complete and low-
`cost USB solution in a single chip.
`The design is much simpler since
`timing and interface analysis are
`significantly reduced.
`
`Exhibit 2025 - Page 02 of 16
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`

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`Features
`
`Benefits
`
`Single-Chip Solution
`
`RAM Architecture
`
`Lower overall system cost
`Minimum board space with 44 PQFP and 80 PQFP packages
`Quicker design and faster time to market than other USB solutions
`Minimal design resources
`
`Quick changes in firmware and driver code
`Updates in the field via software downloads
`Flexibility in multiple configurations
`Dynamic changes in performance/properties based on user’s needs
`
`High-Performance I/O Transfers a full 1024-byte isochronous packet within one USB frame
`Provides highest quality full-motion video or audio performance
`Data I/O rate greater than 2 Mbyte/sec for bulk and isochronous packets
`Fastest response time for the end user
`
`4- 8- or 16-Kbyte
`Pin- and Software-
`Compatible Family
`
`EZ-USB Firmware
`Architecture
`
`Easy transition from RAM to ROM for high-volume applications
`Pin- and software-compatible options for program code growth
`No change in hardware as needs change
`Lowers system cost since only minimal memory size is needed
`
`Significantly less 8051 USB code since core handles most USB activity
`Shortened USB learning curve
`Quicker working prototypes and final production models
`More software development time to devote to the peripheral function
`
`Enhanced 8051 Core Five times faster performance than 8051
`No new 8051 software tools to learn
`
`Anchor USB Core/
`ReNumeration
`Capability
`
`External EPROM components eliminated
`A quick path to working prototypes
`User-selectable changes in peripheral properties without disconnecting
`
`EZ-USB Xcelerator
`Development Kit
`
`Low 3.3V Power
`
`Speedier firmware and driver development
`Independent development of firmware and driver
`Fewer software errors
`No custom Windows® driver needed to test USB traffic and firmware
`
`Meets the 100 mA power-up specification
`Useful in bus-powered applications
`Useful in power-sensitive applications such as battery-powered equipment
`
`Five External Interrupts Flexible without sacrificing standard 8051 interrupts
`
`Separate Memory
`Expansion Port
`
`Design flexibility in USB program code
`No sacrifice in I/O capability for high-functionality peripheral devices
`Non-multiplexed, requiring no external latch
`
`3
`
`Exhibit 2025 - Page 03 of 16
`
`

`
`Unprecedented “Soft” Architecture
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`The focus of the EZ-USB
`family is to provide the
`peripheral designer a multi-
`tude of design configura-
`tions and migration paths.
`The “soft,” programmable
`nature of the EZ-USB archi-
`tecture provides flexibility
`while minimizing risks.
`
`4
`
`USB requires synchronization
`between four major technology
`suppliers: operating system,
`UHCI/OHCI interfaces, hub
`controllers, and peripheral
`devices. In a traditional hard-
`ware configuration, ensuring
`that a peripheral device will
`work with every combination of
`these technologies is a time-
`consuming and expensive task.
`
`Using the EZ-USB chip’s “soft”
`configuration, the peripheral
`developer can easily devise
`workarounds or accommodate
`dynamic changes. At the same
`time, there is minimum risk to
`design implementation.
`
`Peripheral manufacturers can
`provide firmware updates in
`conjunction with driver changes
`via a floppy disk or through
`Internet downloads. Thus,
`
`software device configurability
`provides easy field updates, last
`minute software code changes
`prior to production, or alterations
`due to ever-changing standards.
`In these ways, the EZ-USB chip
`makes development easier and
`guards against product obsoles-
`cence.
`
`RAM Architecture
`
`With an enhanced 8051 core
`combined with 4, 8, or 16 Kbytes
`of SRAM in a single chip, users
`have a complete solution. The
`8051’s firmware can be stored in
`the hard disk (along with the
`driver) and downloaded into the
`peripheral during its initializa-
`tion. That makes updates as easy
`as updating any other PC soft-
`ware.
`
`Exhibit 2025 - Page 04 of 16
`
`

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`Enumeration and
`ReNumeration
`
`Anchor Chips’ proprietary
`ReNumeration™ function is the
`means by which the enhanced
`8051 firmware is downloaded.
`
`How It Works
`Upon power-up or plug-in, the
`EZ-USB chip automatically
`enumerates as a default USB
`device. This allows the USB core
`
`to download 8051 code. The USB
`core logic inside EZ-USB per-
`forms this initial enumeration
`and code download while holding
`the 8051 in reset.
`
`Once enumerated, the host PC
`downloads 8051 code into
`EZ-USB RAM over the USB
`interface. (Anchor Chips supplies
`the software tools to incorporate
`the loader into any application).
`The downloaded 8051 code
`
`contains program, data, and
`enumeration tables. Once loaded,
`the EZ-USB core performs a
`ReNumeration cycle to simulate a
`USB disconnect and reconnect to
`come back as a completely new
`USB device.
`
`This entire sequence of enumera-
`tion, download and ReNum-
`eration happens quickly (less
`than a quarter of a second) and is
`transparent to the user.
`
`5
`
`Host
`
`Your Peripheral Device
`
`Host PC recognizes
`device is attached and
`starts enumeration
`
`Device provides start-up
`device descriptors
`
`Now the device has its final firmware.
`However, the host PC still recognizes
`the device by its start-up
`description. To update the host PC,
`we complete renumeration.
`
`RENUMERATION
`
`Device simulates
`disconnect and reconnects
`
`Device provides new
`device descriptors to PC
`host
`
`Host PC issues
`configuration to be used
`by device
`
`Host PC loads final
`firmware and enumeration
`data into device from
`software file
`
`Host PC recognizes
`attachment of new USB
`device with updated
`firmware
`
`Host PC recognizes new
`device and loads final
`peripheral driver
`
`ENUMERATION
`
`Exhibit 2025 - Page 05 of 16
`
`

`
`Automatically Handles Low-Level USB Overhead
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`The EZ-USB chip family reduces
`the complexity of USB. It has a
`predefined default descriptor
`that causes it to function as a
`generic USB device. Very little
`code is required to operate the
`EZ-USB chip when configured in
`this default state. The default
`descriptor can be replaced as the
`peripheral manufacturer devel-
`ops customized firmware.
`
`Four Major Benefits of
`Smart USB Core
`
`1
`
`The firmware code is
`smaller and more
`efficient than alternate
`USB solutions. In the EZ-USB
`family, the memory requirement
`is reduced by a factor of two to
`five times as compared to other
`solutions. And, since less memory
`is needed for firmware, board
`size and system cost are reduced.
`
`2
`
`3
`
`4
`
`A USB hardware connection
`is simpler than current
`interface standards (ISA,
`PCI, serial, parallel, and
`SCSI). For example, there
`are no IRQs or DMAs to set.
`USB does not use direct
`connections like RS232 or
`EPP (Enhanced Parallel
`Port). Instead, USB is a
`packetized protocol similar
`to telecommunication stan-
`dards such as X.25 or frame
`relay. This makes software
`development complex.
`
`Efficient EZ-USB Code
`
`Firmware
`File Type
`
`Source
`
`Binary
`
`EZ-USB Family
`
`Alternate Solutions
`
`730 lines of C code
`
`5445 lines of assembly code
`
`< 1 Kbyte
`
`> 5 Kbytes
`
`Test Code Supports:
`· USB Chapter 9
`· String descriptors
`· USB suspend/resume
`· Remote wake-up
`· Bulk endpoint loopback
`
`USB firmware develop-
`ment is faster since there
`is less code to write. This
`reduction in firmware allows the
`design team to concentrate more
`on software development for the
`peripheral function.
`
`Fewer 8051 MIPs are
`dedicated to USB
`processing. With the
`EZ-USB family, as little as 10% of
`8051 processing time is dedicated
`to USB. That makes 90% of the
`enhanced 8051 core’s processing
`time available for peripheral
`functions. Alternate solutions
`dedicate more of their micro-
`controller bandwidth to USB
`processing.
`
`The EZ-USB family
`handles most low-level
`USB overhead automati-
`cally. Therefore, the learning
`curve to understand all the
`nuances of USB is reduced,
`yielding fewer code errors and
`faster product development.
`
`6
`
`Exhibit 2025 - Page 06 of 16
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`Comparison of Standard USB Request “Get Descriptor”
`
`Conventional Method
`
`1 USB Setup data copied to
`FIFO
`
`2 CPU copies FIFO data to
`RAM; decodes Get Descriptor
`request
`
`3 CPU transfers first packet of
`data from memory to endpoint
`FIFO
`
`4 FIFO data sent in response to
`USB IN token
`
`5 CPU transfers next packet of
`data from memory to endpoint
`FIFO
`
`6 FIFO data sent in response to
`USB IN token
`
`7 Repeat steps 5-6
`
`This diagram shows how conventional USB controllers handle a three-stage USB setup transaction called “Get
`Descriptor.” The serial data flowing over the USB is shown as three stages: Setup, Data and Status. The
`numbered arrows indicate transfers between the USB, endpoint FIFOs, and microprocessor memory. Significant
`CPU overhead is required to transfer the data to and from the endpoint FIFOs (2,3,5) and to divide the
`descriptor table data into packets for transmission using multiple USB data packets (4,6).
`
`EZ-USB Method
`
`1 EZ-USB core copies Setup
`data directly to RAM,
`eliminating the FIFO-to-RAM
`copy step. The 8051
`decodes the Get Descriptor
`request.
`
`2 The 8051 sets pointer to
`descriptor table in RAM.
`EZ-USB core does entire
`multi-packet transfer.
`
`The EZ-USB core directly transfers setup packet data into a dedicated eight-byte Setup data buffer for CPU
`inspection (1). Then the 8051 loads an EZ-USB pointer with the start address of the requested descriptor data
`(2). The EZ-USB core does the rest. The EZ-USB core automatically takes care of error checking and retries,
`dividing the table into packets for the various IN transfers and responding to the Status stage.
`
`7
`
`Exhibit 2025 - Page 07 of 16
`
`

`
` Turbo Performance
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`access the last frame’s data while
`the other FIFO empties or fills
`with new USB data.
`
`A single “movx” instruction
`transfers data between EZ-USB
`endpoint FIFOs and external logic
`in two cycles or 330 nano seconds.
`
`Based on these connections a
`complete 1024-byte transfer can
`take 388 microseconds, less than
`40% of the 1 ms USB frame time.
`This is an equivalent transfer rate
`of greater than 2 Mbytes per
`second.
`
`Turbo Bulk Capability
`
`USB bulk endpoint data is avail-
`able to the 8051 as 16 64-byte
`buffers in RAM. A special bulk
`data pointer allows this RAM data
`to also be accessed as a FIFO. The
`8051 loads this sixteen-bit pointer
`with the address of a bulk buffer.
`Then, using a special data register,
`accesses the buffer data as if it
`were a FIFO. Every read or write
`to the data register increments the
`address pointer. This gives the
`8051 a third data pointer: one that
`auto-increments.
`
`As with the fast isochronous
`mode, the special data register
`uses the turbo mode that allows a
`byte of data to be transferred
`using a single “movx” instruction.
`Bulk transfers in and out of the
`8051 therefore can be done with
`the speed of the isochronous
`transfers, one byte every two
`cycles (330 nanoseconds). This
`performance can generate well
`over the maximum allowable bulk
`packets within a USB frame.
`
`The EZ-USB family pro-
`vides the maximum perfor-
`mance specified for USB.
`This allows the peripheral
`manufacturer to take ad-
`vantage of USB’s full band-
`width in high-speed appli-
`cations such as full-motion
`video, continuous audio,
`scanning, digital photogra-
`phy, and printing.
`
`Turbo Isochronous
`Capability
`
`The EZ-USB family provides
`1024 bytes of double-buffered
`FIFO memory (2048 bytes in all)
`which may be divided between
`16 isochronous endpoints.
`During any one millisecond
`frame time, one of the FIFOs is
`connected to the USB and the
`other to the 8051. At every SOF
`(Start Of Frame), the buffers
`“ping-pong” so the 8051 can
`
`To make full use of the USB
`bandwidth, the EZ-USB family
`has large endpoint buffers and a
`fast method for transferring data
`into and out of the buffers. With
`the EZ-USB architecture, bulk
`and isochronous endpoints can
`be configured as double-buffered
`with maximum packet sizes.
`With the 2-Kbyte FIFO, the
`EZ-USB family can transfer a
`1024-byte isochronous packet
`within a single USB frame.
`Similarly for bulk endpoints, the
`EZ-USB can transfer data using
`the 64-byte double buffer capa-
`bilities at a data transfer rate of
`greater than 2 Mbytes per
`second.
`
`Fast transfer rates can occur in
`and out of the internal FIFOs to
`external peripherals since the
`EZ-USB core automatically
`monitors 8051 transfers between
`the accumulator and the end-
`point FIFO registers. When one of
`these transfers occurs, the
`EZ-USB core also reads or writes
`the FIFO data over the external
`data bus and provides external
`FIFO read and write strobes for
`the external interface.
`
`8
`
`Exhibit 2025 - Page 08 of 16
`
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`To write data to outside logic, the 8051 loads a data pointer with a USB FIFO register address, and then executes a “movx
`a,@dptr” instruction to move a byte from the FIFO to the 8051 accumulator. The EZ-USB core simultaneously broadcasts the FIFO
`data on the external data bus pins and generates the external write signal FWR# (Fast Write). A 24 MHz clock is provided for use
`as an external FIFO clock, if required. EZ-USB control bits allow the timing and polarity of the FWR# signal to be tailored for
`different external interface requirements.
`
`To read data from outside logic, the 8051 loads a data pointer with a USB FIFO register address, and then executes a “movx
`@dptr,a” instruction to move a byte from the accumulator to the FIFO. The EZ-USB core discards the accumulator data and instead
`writes a byte from the external data bus pins to the FIFO. The EZ-USB core provides the external read signal FRD# (Fast Read) to
`strobe the data, and a 24 MHz clock. Like the FRW# signal, the FRD# signal may be tailored for different interface requirements.
`
`support extra features such as a
`second data pointer, a second
`UART, cycle-stretched timing, an
`expanded interrupt system, and
`enhanced timers.
`
`instructions on bits, flags, and
`other status functions are identi-
`cal to the standard 8051. The
`enhanced 8051 core also provides
`special function registers that
`
`A Leap in Performance with 8051 Compatibility
`The enhanced 8051 processor
`increases performance by
`executing most instructions in
`four clock cycles instead of
`twelve, as in the standard 8051.
`The enhanced 8051 core also
`runs at 24 MHz; that’s twice as
`fast as the standard part. These
`factors improve the execution
`rate for most instructions by a
`factor of five. The enhanced
`8051 core contained in the
`EZ-USB family is binary-code
`compatible and performs the
`same functions as the industry-
`standard 8051. The effects of
`
`Standard
`Feature
`12
`Clocks per instruction cycle
`1
`Data pointers
`1
`Serial ports (UARTs)
`1
`16-bit timers
`5
`Interrupt sources (int and ext)
`No
`Stretch memory cycles
`Nominal operating frequency 12 MHz
`Nominal operating voltage
`5 V
`
`Anchor
`4
`2
`2
`3
`13
`Yes
`24 MHz
`3.3 V
`
`9
`
`Exhibit 2025 - Page 09 of 16
`
`

`
` Flexible for Many Applications
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`The EZ-USB architecture
`includes features that give
`the designer many options
`for creating an efficient and
`effective design that is
`tailored to the needs of an
`application.
`
`Options for Loading
`8051 Firmware
`
`The EZ-USB family provides
`the peripheral developer with
`four options for loading its
`8051 firmware.
`
`Software file from the
`host system
`Loading from a software file
`provides the maximum flex-
`ibility to the peripheral manu-
`facturer. This configuration
`takes advantage of the internal
`4K-, 8K- or 16K- RAM to load
`8051 code and data from the
`host system. Because of the
`ReNumeration capability of
`EZ-USB chips, a new set of
`descriptors can be loaded after
`the initial enumeration with-
`out physically disconnecting
`the device. This allows device
`descriptors and 8051 program
`code to be loaded from a driver
`disk. Only the vendor ID,
`product ID, and device ID need
`to be loaded during boot time
`in hardware through a 16-byte
`
`Loading 8051 Firmware from the Host
`
`EEPROM. Using this configura-
`tion, users can implement a USB
`function in a tiny 44 PQFP pack-
`age yielding a complete USB
`solution in less than one square
`inch of PC board space.
`
`EEPROM loaded through the
`I2C port
`The EZ-USB architecture supports
`an external EEPROM load
`through the I2C bus. This gives
`designers the capability to load
`8051 program code from hard-
`ware. Because of the flexibility of
`the external EEPROM and inter-
`nal RAM, manufacturers have the
`option to make last-minute
`changes to a design/code without
`impacting production schedules.
`
`External memory through the
`memory expansion port
`External memory may be added to
`EZ-USB family members in the
`80-pin PQFP package. This
`memory is available through a
`memory expansion port. Separate
`16-bit address and 8-bit data
`busses are also available to
`directly attach to a 64K EPROM,
`SRAM, or Flash memory. Unlike a
`standard 8051, the address and
`memory ports are not multi-
`plexed, eliminating the need for
`glue logic for connection to
`external memory.
`
`Internal ROM for peripheral
`manufacturers who migrate to the
`ROM-based EZ-USB chip
`EZ-USB ROM options are soft-
`ware and pin compatible to RAM
`members of the family. Therefore,
`high-volume customers can move
`easily to ROM when their 8051
`firmware code is solidified.
`
`10
`
`Exhibit 2025 - Page 10 of 16
`
`

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`Thirty-one
`Endpoints
`for Ultimate
`Flexibility
`
`64
`bytes
`
`64
`bytes
`
`64
`bytes
`
`1024
`bytes
`total
`
`Control Endpoint
`
`Bulk or Interrupt Endpoints
`
`Isochronous Endpoints
`
`Low Power—Even for
`Bus-Powered Devices
`
`The EZ-USB family meets the
`tough power specifications of
`USB. Running off of a 3.3V power
`supply, it can accommodate bus-
`powered devices and self-pow-
`ered peripherals. In addition,
`with a 60 mA current draw under
`full operating conditions, the
`EZ-USB family provides current
`headroom for peripheral func-
`tions. This meets the USB require-
`ment of 100 mA maximum
`current for attached peripherals
`prior to configuration. Total
`maximum power required by an
`EZ-USB chip under active condi-
`tions is 220 mW. Other solutions
`require five times more power.
`
`More Endpoint Buffer
`Memory
`
`The EZ-USB chip supports more
`endpoints and provides more
`endpoint buffer memory than any
`other USB-device solution in the
`market. The USB specification
`describes an endpoint as a source
`or sink of data. In the EZ-USB
`chip, endpoints are constructed
`as RAM (bulk, control, interrupt
`endpoints) or FIFOs (isochronous
`endpoints). With support for 31
`endpoints (the maximum in the
`USB specification), it gives the
`peripheral designer ultimate
`flexibility. Unlike other USB
`peripheral alternatives, the
`EZ-USB architecture also sup-
`ports the maximum packet size
`for each endpoint. Thus 64-byte
`packets are available for all
`control, bulk, and interrupt
`endpoints. Isochronous endpoints
`are double buffered with a packet
`size of up to 1024 bytes, the
`maximum allowable under the
`USB specification.
`
`Control
`The EZ-USB family supports one
`control endpoint. To simplify
`firmware programming, the
`EZ-USB chip provides data from
`
`control transfers in two separate
`buffers. It also has a unique
`capability to manage the three-
`phase transfer in hardware,
`relieving device firmware from
`this task.
`
`Bulk/Interrupt
`Bulk endpoints are used when
`data integrity must be guaran-
`teed, but without critical delivery
`time. The EZ-USB family provides
`14 bulk endpoints: seven IN and
`seven OUT. These endpoints can
`be programmed to be double-
`buffered, which improves trans-
`fer bandwidth in some applica-
`tions. Bulk data is accessible as
`RAM or FIFO data. The IN and
`OUT endpoints can also be used
`as interrupt endpoints.
`
`Isochronous
`These endpoints support stream-
`ing data such as audio or video.
`The EZ-USB family supports 16
`isochronous endpoints: eight IN
`and eight OUT. A pool of FIFOs
`can be allocated among the
`endpoint to a maximum of
`1 Kbyte. Isochronous endpoints
`are double-buffered, as required
`by the USB specification, so the
`actual size of iscochronous buffer
`memory is 2 Kbytes.
`
`11
`
`Exhibit 2025 - Page 11 of 16
`
`

`
`EZ-USB Xcelerator Development Kit EZ-USB
`Xcelerator™ Development Kit
`
`○
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`
`The EZ-USB Xcelerator™
`development kit provides a
`complete hardware and
`software solution for accel-
`erating the firmware and
`device driver development
`for all the members of the
`EZ-USB family. Other USB
`development kits use emula-
`tion of the eventual USB
`device. The EZ-USB
`Xcelerator developer kit uses
`the actual device, the
`AN2131QC, during the
`entire development. Because
`of the simplicity of EZ-USB
`and Anchor’s software
`utilities, users can be up and
`running USB code in hours,
`not weeks!
`
`12
`
`Development Board
`
`The EZ-USB Xcelerator develop-
`ment board is compact and
`powerful. It provides an
`AN2131QC, 64 kilobytes of
`external RAM, two UARTS, and
`user-programmable seven
`segment display, LED indicators,
`and switches. One UART is used
`to communicate with the Win-
`dows-hosted debugger, and the
`other is free for application use.
`The indicators and switches are
`connected via the EZ-USB I2C
`port, leaving all AN2131QC I/O
`lines uncommitted for prototype
`development. The board can be
`USB bus powered, eliminating
`the need for an external power
`supply. A debug monitor loads
`either into internal EZ-USB RAM
`or the external RAM. The exter-
`nal RAM can be configured in
`various ways to allow seamless
`code development for EZ-USB
`ROM versions.
`
`A matching plug-in breadboard
`eases the interface of custom
`circuitry to the AN2131. Headers
`bring out all interface signals, and
`provide a convenient interface to
`a logic analyzer.
`
`C Compiler from Keil
`
`The C compiler from Keil Soft-
`ware lets the designer write 8051
`microcontroller applications in C
`and still get the efficiency and
`speed of assembly language.
`Advanced features from Keil tools
`include the ability to single step
`through code. This makes it easy
`to detect errors, handle source
`level debugging and dual-data
`pointer support, and set
`breakpoints. With the use of Keil
`software, the leading 8051 tool
`provider, the firmware designer
`can be assured the software has
`been tested thoroughly with
`reliable results.
`
`Exhibit 2025 - Page 12 of 16
`
`

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`Anchor Utilities
`
`Anchor Chips software utilities
`accelerate the developer’s firm-
`ware development. The USB
`Control Panel allows the devel-
`oper to send and receive inter-
`rupt, bulk, and isochronous
`packets and standard USB device
`requests without first developing
`the host-based software for the
`specific application. The USB
`Control Panel takes the drudgery
`out of building USB data struc-
`tures such as descriptors. It can
`be used to test a multitude of
`operating conditions without first
`learning low-level USB program-
`ming. The user can quickly test
`different packet sizes and emu-
`late USB host application re-
`sponses. In addition, users can
`quickly test and adjust firmware
`based on immediate results from
`the USB Control Panel.
`
`Also in the EZ-USB development
`kit is the EZ-USB 8051 firmware
`library and firmware frame-
`works. With this library of
`predefined function calls, devel-
`opers can quickly develop their
`peripheral function. The firm-
`ware library includes functions
`such as ReNumeration, I2C
`programming, descriptor table
`parsing, USB initialization, device
`initialization, suspend/resume
`and complete USB standard
`device request processing.
`
`Device Driver
`
`A general-purpose device driver
`is included in the Xcelerator
`development kit. It is a WDM
`driver for Windows 98 or OSR
`2.1. With source code provided,
`peripheral driver developers can
`convert this code to a miniport
`driver to meet their unique needs.
`
`The EZ-USB Xcelerator Development Kit
`(AN2131-DK-001)
`
`· EZ-USB Development Board
`· EZ-USB Peripheral Board
`· EZ-USB Firmware Library and Firmware Frameworks
`· EZ-USB General-Purpose Device Driver
`· EZ-USB Driver and Firmware Sample Code
`· EZ-USB Control Panel
`· EZ-USB Documentation
`· Reference Schematics
`· 8051 C Compiler from Keil Software
`· 8051 Assembler from Keil Software
`· 8051 Custom Debugger from Keil Software
`
`13
`
`Exhibit 2025 - Page 13 of 16
`
`

`
`Packages and Pin Definitions
`
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`13.45
`12.95
`
`10.10
`9.90
`8.00 REF
`
`44
`
`34
`
`33
`
`44 PQFP
`
`0.80 BSC.
`
`1
`
`11
`
`23
`
`40
`
`25
`
`41
`
`24
`
`0.80 BSC.
`
`12
`
`22
`
`24.10
`23.70
`20.05
`19.95
`
`3.0
`
`80 PQFP
`
`0.80
`
`18.10
`17.70
`
`14.05
`13.95
`
`65
`
`80
`
`64
`
`3.0
`
`1
`
`1.00 Ref
`
`3.04 MAX
`
`3.04 MAX
`
`14
`
`Exhibit 2025 - Page 14 of 16
`
`

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`○
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`○
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`○
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`○
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`○
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`○
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`○
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`○
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`○
`
`○
`
`
`
`
` sserddA sserddA sserddA sserddA
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`
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`
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`
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`
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`
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`15
`
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`
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`
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`
`CCV
`
`Exhibit 2025 - Page 15 of 16
`
`

`
`Ordering Information
`
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`With the broadest family of USB solutions in the market, peripheral manufactures can find the right
`combination of features, board space, and price to fit their applications. All eight of EZ-USB family
`members with internal RAM can be converted to ROM equivalents with no changes in their design.
`
`EZ-USB Internal RAM Product Family
` Part
`Package
`RAM I/O Rate
`# Prog
`8-Bit
` Number
`Type
` Size
`Bytes/sec
`I/Os
`Databus
`
`Isochronous
`Support
`
`AN2121SC
`AN2125SC
`AN2126SC
`AN2131SC
`AN2135SC
`AN2136SC
`AN2131QC
`AN2141QC
`
`44 PQFP
`44 PQFP
`44 PQFP
`44 PQFP
`44 PQFP
`44 PQFP
`80 PQFP
`80 PQFP
`
`4K
`4K
`4K
`8K
`8K
`8K
`8K
`16K
`
`600K
`2M
`2M
`600K
`2M
`2M
`2M
`2M
`
`16
`8
`8
`16
`8
`8
`24
`24
`
`No
`Yes
`Yes
`No
`Yes
`Yes
`Yes+Addr
`Yes+Addr
`
`Yes
`Ye