`Document # 001-13670 Rev. *D
`
`Cypress Semiconductor
`198 Champion Court
`San Jose, CA 95134-1709
`Phone (USA): 800.858.1810
`Phone (Intnl): 408.943.2600
`http://www.cypress.com
`
`Exhibit 2031 - Page 01 of 402
`
`
`
`Copyrights
`
`Copyrights
`Copyright © 2002 - 2011 Cypress Semiconductor Corporation. All rights reserved.
`Cypress, the Cypress Logo, and EZ-USB are registered trademarks and MoBL-USB and ReNumeration are trademarks of
`Cypress Semiconductor Corporation. Macintosh is a registered trademark of Apple Computer, Inc. Windows is a registered
`trademark of Microsoft Corporation. SmartMedia is a trademark of Toshiba Corporation. All other product or company names
`used in this manual may be trademarks, registered trademarks, or servicemarks of their respective owners.
`Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the
`Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard
`Specification as defined by Philips. As from October 1st, 2006 Philips Semiconductors has a new trade name - NXP Semicon-
`ductors.
`The information in this document is subject to change without notice and should not be construed as a commitment by
`Cypress. While reasonable precautions have been taken, Cypress assumes no responsibility for any errors that may appear
`in this document. No part of this document may be copied or reproduced in any form or by any means without the prior written
`consent of Cypress. Made in the U.S.A.
`
`Disclaimer
`CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL,
`INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PAR-
`TICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein.
`Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress
`does not authorize its products for use as critical components in life-support systems where a malfunction or failure may rea-
`sonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems appli-
`cation implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
`The acceptance of this document will be construed as an acceptance of the foregoing conditions.
`This manual is the EZ-USB® Technical Reference Manual, for EZ-USB FX2LP™, and EZ-USB FX1™. It provides information
`for the chips listed below.
`CY7C68013A
`CY7C68014A
`CY7C68015A
`CY7C68016A
`CY7C64713
`
`2
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`EZ-USB® Technical Reference Manual, Document # 001-13670 Rev. *D
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`Exhibit 2031 - Page 02 of 402
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`
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`Contents Overview
`
`1.
`
`Introducing EZ-USB®
`
`2. Endpoint Zero
`
`3. Enumeration and ReNumeration™
`
`4.
`
`Interrupts
`
`5. Memory
`
`6. Power Management
`
`7. Resets
`
`8. Access to Endpoint Buffers
`
`9. Slave FIFOs
`
`10. General Programmable Interface
`
`11. CPU Introduction
`
`12. Instruction Set
`
`13. Input/Output
`
`14. Timers/Counters and Serial Interface
`
`15. Registers
`
`Appendix A. Descriptors for Full-Speed Mode
`
`Appendix B. Descriptors for High-Speed Mode
`
`Appendix C. Device Register Summary
`
`Index
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`EZ-USB® Technical Reference Manual, Document # 001-13670 Rev. *D
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`13
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`37
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`51
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`59
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`71
`
`77
`
`83
`
`87
`
`99
`
`121
`
`169
`
`175
`
`181
`
`193
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`211
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`367
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`375
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`383
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` 395
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`3
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`Exhibit 2031 - Page 03 of 402
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`Contents
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`4
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`EZ-USB® Technical Reference Manual, Document # 001-13670 Rev. *D
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`Exhibit 2031 - Page 04 of 402
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`
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`Contents
`
`1.
`
`1.8
`
`1.6
`1.7
`
`13
`Introducing EZ-USB®
`1.1
`An Introduction to USB ...................................................................................................................13
`1.2
`The USB Specification....................................................................................................................14
`1.3
`Host is Master.................................................................................................................................14
`1.4
`USB Direction .................................................................................................................................14
`1.5
`Tokens and PIDs............................................................................................................................14
`1.5.1
`Receiving Data from the Host ..........................................................................................15
`1.5.2
`Sending Data to the Host .................................................................................................15
`USB Frames...................................................................................................................................15
`USB Transfer Types .......................................................................................................................15
`1.7.1
`Bulk Transfers ..................................................................................................................16
`1.7.2
`Interrupt Transfers............................................................................................................16
`1.7.3
`Isochronous Transfers......................................................................................................16
`1.7.4
`Control Transfers..............................................................................................................16
`Enumeration ...................................................................................................................................16
`1.8.1
`Full Speed/High Speed Detection ....................................................................................17
`The Serial Interface Engine............................................................................................................17
`1.9
`1.10 ReNumeration™.............................................................................................................................18
`1.11 EZ-USB Architecture ......................................................................................................................18
`1.12 EZ-USB Feature Summary.............................................................................................................20
`1.13 EZ-USB Integrated Microprocessor................................................................................................20
`1.14 EZ-USB Block Diagram ..................................................................................................................21
`1.15 Packages........................................................................................................................................22
`1.15.1
`56-Pin Packages ..............................................................................................................22
`1.15.2 CY7C68013A/14A and CY7C68015A/16A Differences ...................................................22
`1.15.3
`100-Pin Package..............................................................................................................22
`1.15.4
`128-Pin Package..............................................................................................................23
`1.15.5 Signals Available in the Five Packages............................................................................23
`1.16 Package Diagrams .........................................................................................................................25
`1.17 EZ-USB Endpoint Buffers...............................................................................................................30
`1.18 External FIFO Interface ..................................................................................................................31
`1.19 EZ-USB Product Family .................................................................................................................34
`1.20 Document History ...........................................................................................................................35
`
`37
`2. Endpoint Zero
`2.1
`Introduction.....................................................................................................................................37
`2.2
`Control Endpoint EP0 .....................................................................................................................37
`2.3
`USB Requests................................................................................................................................39
`2.3.1
`Get Status.........................................................................................................................40
`2.3.2
`Set Feature.......................................................................................................................42
`2.3.3
`Clear Feature ...................................................................................................................43
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`EZ-USB® Technical Reference Manual, Document # 001-13670 Rev. *D
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`Contents
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`2.3.5
`
`2.3.4
`
`Get Descriptor..................................................................................................................43
`2.3.4.1
`Get Descriptor-Device....................................................................................44
`2.3.4.2
`Get Descriptor-Device Qualifier .....................................................................45
`2.3.4.3
`Get Descriptor-Configuration .........................................................................45
`2.3.4.4
`Get Descriptor-String .....................................................................................46
`2.3.4.5
`Get Descriptor-Other Speed Configuration ...................................................46
`Set Descriptor ..................................................................................................................46
`2.3.5.1
`Set Configuration ..........................................................................................47
`Get Configuration.............................................................................................................47
`2.3.6
`Set Interface.....................................................................................................................47
`2.3.7
`Get Interface ....................................................................................................................48
`2.3.8
`Set Address .....................................................................................................................48
`2.3.9
`2.3.10 Sync Frame......................................................................................................................49
`2.3.11
`Firmware Load .................................................................................................................49
`
`51
`3. Enumeration and ReNumeration™
`3.1
`Introduction ....................................................................................................................................51
`3.2
`EZ-USB Startup Modes..................................................................................................................51
`3.3
`The Default USB Device ................................................................................................................52
`3.4
`EEPROM Boot-load Data Formats.................................................................................................52
`3.4.1
`No EEPROM or Invalid EEPROM....................................................................................52
`3.4.2
`Serial EEPROM Present, First Byte is 0xC0 ...................................................................53
`3.4.3
`Serial EEPROM Present, First Byte is 0xC2....................................................................53
`3.4.3.1
`General Purpose Use of the I2CBus..............................................................54
`EEPROM Configuration Byte .........................................................................................................55
`3.5
`The RENUM Bit..............................................................................................................................56
`3.6
`EZ-USB Response to Device Requests (RENUM = 0) ..................................................................56
`3.7
`EZ-USB Vendor Request for Firmware Load.................................................................................56
`3.8
`How the Firmware ReNumerates...................................................................................................57
`3.9
`3.10 Multiple ReNumerations™ .............................................................................................................58
`
`4.
`
`4.4
`
`4.3
`
`59
`Interrupts
`4.1
`Introduction ....................................................................................................................................59
`4.2
`SFRs ..............................................................................................................................................59
`4.2.1
`803x/805x Compatibility...................................................................................................61
`Interrupt Processing .......................................................................................................................62
`4.3.1
`Interrupt Masking .............................................................................................................62
`4.3.1.1
`Interrupt Priorities...........................................................................................62
`Interrupt Sampling............................................................................................................62
`4.3.2
`Interrupt Latency ..............................................................................................................63
`4.3.3
`USB-Specific Interrupts..................................................................................................................63
`4.4.1
`Resume Interrupt .............................................................................................................63
`4.4.2
`USB Interrupts .................................................................................................................63
`4.4.2.1
`SUTOK, SUDAV Interrupts............................................................................66
`4.4.2.2
`SOF Interrupt .................................................................................................66
`4.4.2.3
`Suspend Interrupt ..........................................................................................66
`4.4.2.4
`USB RESET Interrupt ....................................................................................66
`4.4.2.5
`HISPEED Interrupt (FX2LP only)...................................................................66
`4.4.2.6
`EP0ACK Interrupt ..........................................................................................66
`4.4.2.7
`Endpoint Interrupts ........................................................................................66
`4.4.2.8
`In-Bulk-NAK (IBN) Interrupt ...........................................................................66
`4.4.2.9
`EPxPING Interrupt (FX2LP only) ...................................................................67
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`6
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`Contents
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`4.4.2.10 ERRLIMIT Interrupt........................................................................................67
`4.4.2.11 EPxISOERR Interrupt ....................................................................................67
`USB-Interrupt Autovectors..............................................................................................................67
`4.5.1
`USB Autovector Coding ...................................................................................................68
`I²C Bus Interrupt .............................................................................................................................68
`FIFO/GPIF Interrupt (INT4) ............................................................................................................69
`FIFO/GPIF Interrupt Autovectors....................................................................................................69
`4.8.1
`FIFO/GPIF Autovector Coding .........................................................................................70
`
`4.5
`
`4.6
`4.7
`4.8
`
`71
`5. Memory
`5.1
`Introduction.....................................................................................................................................71
`5.2
`Internal Data RAM ..........................................................................................................................71
`5.2.1
`The Lower 128 .................................................................................................................72
`5.2.2
`The Upper 128 .................................................................................................................72
`5.2.3
`Special Function Register Space......................................................................................72
`External Program Memory and External Data Memory..................................................................72
`5.3.1
`56- and 100-Pin EZ-USB Chips .......................................................................................73
`5.3.2
`128-Pin EZ-USB Chip ......................................................................................................73
`EZ-USB Memory Maps...................................................................................................................74
`‘Von-Neumannizing’ Off-Chip Program and Data Memory.............................................................76
`On-Chip Data Memory at 0xE000-0xFFFF.....................................................................................76
`
`5.4
`5.5
`5.6
`
`5.3
`
`77
`6. Power Management
`6.1
`Introduction.....................................................................................................................................77
`6.2
`USB Suspend.................................................................................................................................79
`6.2.1
`Suspend Register.............................................................................................................79
`6.3 Wakeup/Resume............................................................................................................................80
`6.3.1 Wakeup Interrupt..............................................................................................................81
`USB Resume (Remote Wakeup) ...................................................................................................81
`6.4.1 WU2 Pin ...........................................................................................................................81
`
`6.4
`
`7. Resets
`7.1
`7.2
`7.3
`
`7.4
`7.5
`7.6
`7.7
`
`83
`Introduction.....................................................................................................................................83
`Hard Reset .....................................................................................................................................83
`Releasing the CPU Reset...............................................................................................................84
`7.3.1
`RAM Download ................................................................................................................84
`7.3.2
`EEPROM Load.................................................................................................................84
`7.3.3
`External ROM...................................................................................................................84
`CPU Reset Effects..........................................................................................................................84
`USB Bus Reset...............................................................................................................................85
`EZ-USB Disconnect........................................................................................................................85
`Reset Summary .............................................................................................................................85
`
`87
`8. Access to Endpoint Buffers
`8.1
`Introduction.....................................................................................................................................87
`8.2
`EZ-USB Large and Small Endpoints ..............................................................................................87
`8.3
`High Speed and Full Speed Differences ........................................................................................87
`8.4
`How the CPU Configures the Endpoints ........................................................................................88
`8.5
`CPU Access to EZ-USB Endpoint Data .........................................................................................89
`8.6
`CPU Control of EZ-USB Endpoints ................................................................................................89
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`EZ-USB® Technical Reference Manual, Document # 001-13670 Rev. *D
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`Contents
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`8.7
`
`8.8
`
`8.6.1
`
`Registers That Control EP0, EP1IN, and EP1OUT .........................................................90
`8.6.1.1
`EP0CS ...........................................................................................................90
`8.6.1.2
`EP0BCH and EP0BCL...................................................................................90
`8.6.1.3
`USBIE, USBIRQ ............................................................................................91
`8.6.1.4
`EP01STAT.....................................................................................................91
`8.6.1.5
`EP1OUTCS ...................................................................................................91
`8.6.1.6
`EP1OUTBC ...................................................................................................91
`8.6.1.7
`EP1INCS .......................................................................................................91
`8.6.1.8
`EP1INBC .......................................................................................................92
`Registers That Control EP2, EP4, EP6, EP8...................................................................92
`8.6.2.1
`EP2468STAT.................................................................................................92
`8.6.2.2
`EP2ISOINPKTS, EP4ISOINPKTS, EP6ISOINPKTS, EP8ISOINPKTS.........92
`8.6.2.3
`EP2CS, EP4CS, EP6CS, EP8CS..................................................................92
`8.6.2.4
`EP2BCH:L, EP4BCH:L, EP6BCH:L, EP8BCH:L ...........................................93
`Registers That Control All Endpoints ..............................................................................93
`8.6.3.1
`IBNIE, IBNIRQ, NAKIE, NAKIRQ...................................................................93
`8.6.3.2
`EPIE, EPIRQ .................................................................................................94
`8.6.3.3
`USBERRIE, USBERRIRQ, ERRCNTLIM, CLRERRCNT..............................94
`8.6.3.4
`TOGCTL ........................................................................................................95
`The Setup Data Pointer..................................................................................................................95
`8.7.1
`Transfer Length................................................................................................................96
`8.7.2
`Accessible Memory Spaces .............................................................................................96
`Autopointers ...................................................................................................................................96
`
`8.6.2
`
`8.6.3
`
`99
`9. Slave FIFOs
`9.1
`Introduction ....................................................................................................................................99
`9.2
`Hardware........................................................................................................................................99
`9.2.1
`Slave FIFO Pins.............................................................................................................100
`9.2.2
`FIFO Data Bus ...............................................................................................................101
`9.2.3
`Interface Clock ...............................................................................................................102
`9.2.4
`FIFO Flag Pins (FLAGA, FLAGB, FLAGC, FLAGD)......................................................103
`9.2.5
`Control Pins (SLOE, SLRD, SLWR, PKTEND, FIFOADR[1:0]) .....................................103
`9.2.6
`Slave FIFO Chip Select .................................................................................................104
`9.2.7
`Implementing Synchronous Slave FIFO Writes .............................................................105
`9.2.8
`Implementing Synchronous Slave FIFO Reads.............................................................107
`9.2.9
`Implementing Asynchronous Slave FIFO Writes ...........................................................108
`9.2.10
`Implementing Asynchronous Slave FIFO Reads ...........................................................109
`Firmware ......................................................................................................................................110
`9.3.1
`Firmware FIFO Access .................................................................................................. 110
`9.3.2
`EPx Memories................................................................................................................ 111
`9.3.3
`Slave FIFO Programmable Level Flag........................................................................... 111
`9.3.4
`Auto-In / Auto-Out Modes .............................................................................................. 111
`9.3.5
`CPU Access to OUT Packets, AUTOOUT = 1............................................................... 112
`9.3.6
`CPU Access to OUT Packets, AUTOOUT = 0............................................................... 113
`9.3.7
`CPU Access to IN Packets, AUTOIN = 1....................................................................... 115
`9.3.8
`Access to IN Packets, AUTOIN=0 ................................................................................. 116
`9.3.9
`Auto In/Auto Out Initialization......................................................................................... 117
`9.3.10 Auto Mode: Synchronous FIFO IN Data Transfers ........................................................ 118
`9.3.11 Auto Mode Example: Asynchronous FIFO IN Data Transfers ....................................... 119
`9.3.12 Skipping Out Packets while in AUTOOUT Mode ........................................................... 119
`9.3.13 Aborting Packets in FIFO while in AUTOIN Mode .........................................................120
`Switching Between Manual Out and Auto Out .............................................................................120
`
`9.4
`
`9.3
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`8
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`121
`10. General Programmable Interface
`10.1
`Introduction...................................................................................................................................121
`10.1.1 Typical GPIF Interface....................................................................................................123
`10.2 Hardware ......................................................................................................................................123
`10.2.1 The External GPIF Interface...........................................................................................124
`10.2.2 Default GPIF Pins Configuration ....................................................................................124
`10.2.3 Six Control OUT Signals ................................................................................................124
`10.2.3.1 Control Output Modes ..................................................................................124
`10.2.4 Six Ready IN Signals......................................................................................................124
`10.2.5 Nine GPIF Address OUT Signals...................................................................................124
`10.2.6 Three GSTATE OUT Signals..........................................................................................124
`10.2.7
`8/16-Bit Data Path, WORDWIDE = 1 (default) and WORDWIDE = 0 ............................125
`10.2.8 Byte Order for 16 Bit GPIF Transactions........................................................................125
`10.2.9
`Interface Clock (IFCLK)..................................................................................................125
`10.2.10 Connecting GPIF Signal Pins to Hardware ....................................................................126
`10.2.11 Example GPIF Hardware Interconnect...........................................................................126
`10.3 Programming the GPIF Waveforms .............................................................................................127
`10.3.1 The GPIF Registers........................................................................................................127
`10.3.2 Programming GPIF Waveforms .....................................................................................127
`10.3.2.1 The GPIF IDLE State ...................................................................................128
`10.3.2.2 Defining States.............................................................................................128
`10.3.3 Reexecuting a Task Within a DP State...........................................................................131
`10.3.4 State Instructions............................................................................................................134
`10.3.4.1 Structure of the Waveform Descriptors ........................................................136
`10.3.4.2 Terminating a GPIF Transfer .......................................................................136
`Firmware ......................................................................................................................................137
`10.4.1 Single Read Transactions ..............................................................................................143
`10.4.2 Single Write Transactions...............................................................................................147
`10.4.3 FIFO Read and FIFO Write (Burst) Transactions...........................................................150
`10.4.3.1 Transaction Counter.....................................................................................150
`10.4.3.2 Reading the Transaction-Count Status in a DP State..................................150
`10.4.4 GPIF Flag Selection .......................................................................................................150
`10.4.5 GPIF Flag Stop...............................................................................................................150
`10.4.5.1 Performing a FIFO Read Transaction ..........................................................151
`10.4.6 Firmware Access to IN Packets, (AUTOIN=1) ...............................................................156
`10.4.7 Firmware Access to IN Packets, (AUTOIN = 0) .............................................................157
`10.4.7.1 Performing a FIFO-Write Transaction ..........................................................159
`10.4.8 Firmware Access to OUT packets, (AUTOOUT=1)........................................................164
`10.4.9 Firmware Access to OUT Packets, (AUTOOUT = 0) .....................................................165
`10.5 UDMA Interface ............................................................................................................................167
`10.6 ECC Generation ...........................................................................................................................167
`
`10.4
`
`169
`11. CPU Introduction
`11.1
`Introduction...........................................................................................................................