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`EXHIBIT
`DSS-2007
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`DSS—2 007
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`EXHIBIT
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`______________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`______________
`
`TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (TSMC) and
`SAMSUNG ELECTRONICS CO., LTD (SAMSUNG),
`Petitioners,
`
`v.
`
`DSS TECHNOLOGY MANAGEMENT, INC.
`Patent Owner.
`
`____________
`
`Case IPR2014-010301
`Patent No. 5,625,084
`
`____________
`
`
`
`
`DECLARATION OF DR. CHRIS A. MACK, PH.D.
`
`
`
`
`
`
`1 Case IPR2014-01493 has been joined with this proceeding.
`
`

`

`Patent No. 5,652,084
`IPR2014-01030
`_____________________________________________________________________________
`
`
`
`
`
`TABLE OF CONTENTS
`
`I.
`
`INTRODUCTION ............................................................................................................... 1
`
`II.
`
`QUALIFICATIONS ............................................................................................................ 1
`
`III.
`
`INDEPENDENT EXPERT ................................................................................................. 3
`
`IV. MATERIALS CONSIDERED ............................................................................................ 3
`
`V.
`
`APPLICABLE STANDARDS ............................................................................................ 3
`
`VI. THE CLAIMED INVENTION ........................................................................................... 4
`
`VII. DIFFERENCES BETWEEN THE CLAIMED INVENTION AND JINBO ..................... 9
`
`VIII. CONCLUSION ................................................................................................................. 11
`
`
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`DECLARATION OF CHRIS A. MACK, PH.D.
`
`

`

`Patent No. 5,652,084
`IPR2014-01030
`_____________________________________________________________________________
`
`
`I, Chris A. Mack, Ph.D., declare as follows:
`
`I.
`
`INTRODUCTION
`
`1. I am making this declaration at the request of DSS Technology Management, Inc.
`
`(“Patent Owner”) in the matter of the Inter Partes Review Case No. IPR2014-01030 of U.S.
`
`Patent No. 5,652,084 (the ‘084 Patent”).
`
`2. I understand that the Patent Trial and Appeal Board (“the Board”) issued a decision
`
`(“Decision”) instituting trial with respect to claims 1-12, 15, and 16 of the ‘084 Patent on the
`
`following grounds:
`
`(1) anticipation of claims 1-8, 12, 15, and 16 under 35 U.S.C. §102(b) based on
`
`Japanese Patent Application No. HEI 4[1992]-71222 (“Jinbo”) (TSMC-1004);
`
`(2) obviousness of claim 9 under 35 U.S.C. §103(a) based on Jinbo in view of
`
`U.S. Patent No. 4,931,351 (“McColgin”) (TSMC-1006); and
`
`(3) obviousness of claims 10 and 11 under 35 U.S.C. §103(a) based on Jinbo in
`
`view of U.S. Patent No. 4,548,688 (“Matthews”) (TSMC-1007).
`
`
`
`II. QUALIFICATIONS
`
`3.
`
`I received Bachelor of Science degrees in Physics, Chemistry, Electrical
`
`Engineering, and Chemical Engineering from Rose-Hulman Institute of Technology in 1982, a
`
`Master of Science degree in Electrical Engineering from the University of Maryland in 1989,
`
`and a Ph.D. in Chemical Engineering from the University of Texas at Austin in 1998.
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`Page 1 of 11
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`Patent No. 5,652,084
`IPR2014-01030
`_____________________________________________________________________________
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`
`4.
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`In 1983, I joined the Microelectronics Research Laboratory of the National Security
`
`Agency and began work in optical lithography research.
`
`5. During 1990-91, I was on assignment at SEMATECH working in the areas of deep-
`
`UV photoresist characterization and phase-shifting mask optimization, which are part of the
`
`process of photolithography for semiconductor fabrication.
`
`6.
`
`In 1990, I founded FINLE Technologies, Inc. (“FINLE”). FINLE produced
`
`industry-standard lithography modeling and data analysis software that enabled semiconductor
`
`manufacturers to speed development of advanced lithography processes required to develop and
`
`produce integrated circuits with smaller geometries.
`
`7.
`
`In January of 1992, I joined FINLE full time as President and Chief Technical
`
`Officer. At FINLE, I developed lithography modeling and data analysis software. Further, I
`
`provided consulting and training services to the semiconductor industry.
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`8. After KLA-Tencor Corp. acquired FINLE in February 2000, I served as Vice
`
`President of Lithography Technology for KLA-Tencor Corp. for five years.
`
`9. Since 2005, I have pursued various intellectual interests—including researching,
`
`writing, and teaching lithography. I have taught numerous classes as an adjunct professor at the
`
`University of Texas at Austin, and I have taught as a visiting fellow at the University of
`
`Canterbury, in New Zealand.
`
`10. My professional background and technical qualifications are stated above and are
`
`reflected in my curriculum vitae, which is attached as Exhibit A.
`
`11. I have worked previously as an expert witness in several matters. Matters in which
`
`I have served as an expert witness are listed in my curriculum vitae, attached as Exhibit A.
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`Page 2 of 11
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`Patent No. 5,652,084
`IPR2014-01030
`_____________________________________________________________________________
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`12. My curriculum vitae contains a listing of my publications and issued patents.
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`III.
`
`INDEPENDENT EXPERT
`
`13. I am being compensated at my usual rate of $500/hour for each hour of work in
`
`connection with this matter. My compensation is not contingent on any of the opinions I provide
`
`or the outcome of this matter.
`
`IV. MATERIALS CONSIDERED
`
`14.
`
`In the preparation of this declaration, I have reviewed the following:
`
`(a) The ‘084 Patent (TSMC-1001)
`
`(b) The prosecution history of the ‘084 patent (TSMC-1002)
`
`(c) Certified translation of Japanese Patent App. No. 04-71222 (“Jinbo”) (TSMC-
`
`1004)
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`(d) TSMC’s IPR Petition
`
`(e) DSS’s Preliminary Response to TSMC’s IPR Petition
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`(f) The Board’s Decision to institute trial
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`(g) Final transcript of Dr. Blanchard’s February 17, 2015 deposition and the
`
`exhibits thereto
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`V.
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`APPLICABLE STANDARDS
`
`19.
`
`I understand that the disclosure and claims of a patent are read and understood
`
`from the perspective of a hypothetical person of ordinary skill in the art to which the patent
`
`is directed at the time of the invention (“POSITA”). For my analysis, I have been told to
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`Page 3 of 11
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`Patent No. 5,652,084
`IPR2014-01030
`_____________________________________________________________________________
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`assume that the relevant timeframe is December 22, 1994, which is the earliest priority date
`
`of the ‘084 Patent.
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`20.
`
`It is my understanding that a POSITA is not a genius or an expert in the art at
`
`hand, and is not necessarily represented by the skill, education, or experience of the inventor.
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`I also understand that POSITA has common sense and only ordinary creativity, and is not an
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`automaton.
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`15.
`
`I further understand that the level of ordinary skill in the art is a function of many
`
`factors, including (1) the educational level of the inventor; (2) type of problems encountered in
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`the art; (3) prior art solutions to those problems; (4) rapidity with which innovations are made;
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`(5) sophistication of the technology; and (6) educational level of active workers in the field.
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`16.
`
`I find the pertinent art to lie generally in the field of photolithography processing
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`for semiconductor manufacturing. Considering all of the factors in the context of the
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`technology of the ’084 Patent, I believe that a person of ordinary skill in the art would have a
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`B.S. degree in engineering or similar field and several years of experience using
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`photolithography methods for semiconductor fabrication.
`
`21.
`
`I understand that the Board has made some preliminary constructions of certain
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`terms in the challenged claims. In forming my opinions, I have applied the claim construction
`
`established by the Board in the Decision to institute trial.
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`VI. THE CLAIMED INVENTION
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`Page 4 of 11
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`Patent No. 5,652,084
`IPR2014-01030
`_____________________________________________________________________________
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`22.
`
`The ‘084 Patent discloses and claims a “lithographic patterning process us[ing]
`
`multiple exposures to provide for relatively reduced pitch for features of single patterned layer.”
`
`TSMC-1001, ‘084 Patent at Abstract.
`
`23.
`
`The ‘084 Patent discloses that a first imaging layer is formed on the
`
`semiconductor wafer. See id. at 3:29-30. The first imaging layer is exposed to radiation through
`
`the first mask containing a first pattern of clear and opaque features. See id. 3:65-66. This step
`
`is illustrated in FIG. 2, which is reproduced below:
`
`24. After the exposure, the first imaging layer is developed, and the remaining
`
`patterned layer is stabilized to withstand subsequent lithographic processing steps. See id. at
`
`
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`4:5-6, 4:35-36.
`
`25. A second imaging layer is formed over the stabilized first patterned layer. See id.
`
`at 5:56-65. For the second exposure step, the first mask is replaced with the second mask having
`
`a second pattern of opaque and clear features. See id. at 6:27-31. The second imaging layer is
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`Page 5 of 11
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`Patent No. 5,652,084
`IPR2014-01030
`_____________________________________________________________________________
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`exposed to radiation in accordance with the second pattern. See id. at 6:12-14. This step is
`
`illustrated in FIG. 4, which is reproduced below:
`
`26.
`
`The second imaging layer is then developed to form the second patterned layer.
`
`See id. at 6:51-53. This method allows the features of the first and second patterned layers to be
`
`formed relatively closer to one another than is possible through a single exposure to radiation.
`
`
`
`See id. at claim 1.
`
`A. Claims 1 and 15 require two separate individual patterns
`
`27.
`
`The ‘084 Patent explicitly discloses that the invention includes a technique of
`
`“pattern[ing] by exposure to radiation in accordance with two separate patterns.” TSMC-1001,
`
`‘084 Patent at Abstract [emphasis added]. The specification of the ‘084 Patent consistently
`
`states that the first pattern is embodied in the first mask and that the second pattern is embodied
`
`in a second mask. See id. at 3:57-59, 6:26-31, 8:9-11, 8:63-65, 10:59-61, 11:47-49, FIGS. 2, 4,
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`Page 6 of 11
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`Patent No. 5,652,084
`IPR2014-01030
`_____________________________________________________________________________
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`7, 9, 13, 15 and accompanying descriptions. The opaque and transparent features of each pattern
`
`are referenced by different reference characters. Accordingly, claims 1 and 15 require that each
`
`imaging layer is patterned in accordance with a separate individual pattern.
`
`B. The second pattern cannot be reasonably interpreted as a
`duplicate of the first pattern
`
`The ‘084 Patent states that “[t]he second mask may include any suitable pattern
`
`28.
`
`of opaque and clear features.” Id. at 6:24-25. For the reasons provided below, the only
`
`reasonable interpretation of claims 1 and 15 supported by the specification of the ‘084 Patent
`
`requires that a suitable second pattern cannot be a duplicate of the first pattern.
`
`29.
`
`The Board found that “[t]he geometry of the second pattern, however, is not
`
`necessarily different from the first pattern.” Institution Decision at pg. 8. While the Board’s
`
`finding is correct insofar as the geometries of the opaque and clear features of the first and
`
`second patterns are not necessarily different, the two patterns cannot be duplicates of one
`
`another because at least the arrangement of these features must be different in the two patterns.
`
`If the first and second patterns were duplicates of one another, the features of the second
`
`patterned layer would be simply superimposed onto the features of the first patterned layer. The
`
`second patterning step, therefore, would merely increase the thickness of the first patterned
`
`layer, and the first and second patterned layers would be incapable of having any distinct
`
`features. Accordingly, if the first and second patterns were duplicates of one another, claims 1
`
`and 15 would be inoperable, as illustrated below:
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`Page 7 of 11
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`Patent No. 5,652,084
`IPR2014-01030
`_____________________________________________________________________________
`
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`
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`30.
`
`To form two patterned layers having distinct features using identical patterns for
`
`both patterning steps, one would have to perform an additional step of changing the alignment
`
`between the wafer and the second pattern. This step is not disclosed in the ‘084 Patent and is
`
`divergent from the technique of patterning two imaging layers in accordance with two separate
`
`masks. For these reasons, the first and second patterns cannot be mere duplicates of one
`
`another.
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`Page 8 of 11
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`Patent No. 5,652,084
`IPR2014-01030
`_____________________________________________________________________________
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`
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`VII. DIFFERENCES BETWEEN THE CLAIMED INVENTION AND JINBO
`
`19.
`
`The invention claimed in the ‘084 Patent and Jinbo achieve the same result of
`
`creating a final resist pattern having dimensions beyond the resolution limits of the lithographic
`
`equipment. See TSMC-1004, Jinbo at pg. 4. Jinbo, however, teaches a method that is
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`functionally different than the method claimed in the ‘084 Patent. Specifically, in contrast to the
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`‘084 Patent, Jinbo teaches patterning both imaging layers in accordance with the same pattern
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`and requires a step of shifting the wafer with respect to the mask for the second patterning step.
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`20.
`
`Jinbo discloses that for the first patterning step, the wafer is aligned with the
`
`mask in accordance with “the mask alignment marks and the substrate alignment marks.” See
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`TSMC-1004, Jinbo at pg. 4. The first imaging layer is exposed to radiation through the mask
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`while the mask and the wafer remain in this alignment. Id.
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`21.
`
`For the second patterning step, Jinbo discloses, that the substrate is also aligned
`
`with the mask. However, after the alignment is achieved, the wafer is shifted in the x-direction
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`“so that the spaces of the mask will be projected on the spaces of first resist pattern.” Id. at pg.
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`5. The step of shifting the wafer after it has been aligned with the mask enables Jinbo to create a
`
`second patterned layer that is identical to the first patterned layer but shifted along the wafer in
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`the x-direction. The first and second patterned layers collectively form a final patterned layer.
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`The features of the final patterned layer have a pitch that is beyond the resolution limit of the
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`exposure apparatus.
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`22.
`
`The final patterned layer depicted in Figure 1(E) of Jinbo can be obtained by
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`exposing both imaging layers to radiation in accordance with the same pattern as evidenced by
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`Page 9 of 11
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`Patent No. 5,652,084
`IPR2014-01030
`_____________________________________________________________________________
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`the dimensions of the patterned layers disclosed in Jinbo. See TSMC-1004, Jinbo at pg. 4, 5 (“a
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`finished [first] pattern wherein the space width was 0.3 µm and pitch was 1.2 µm” and “a [final]
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`pattern in which spaces are 0.3 µm wide are aligned at a pitch of 0.6 µm, that is, a 0.3 µm line
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`and space pattern”). Figure 1(E) is reproduced and annotated below:
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`0.3
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`0.3
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`0.3
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`0.3
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`0.3
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`0.3
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`23.
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`Jinbo only discloses a single mask having a single pattern: “a mask having a line
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`and space pattern with which spaces 0.4 µm wide can be formed at a pitch of 1.2 µm.” Id. at pg.
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`4. Jinbo does not describe any other patterns, thereby reinforcing the conclusion that a single
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`pattern is used for both patterning steps. In contrast to the claimed invention which requires that
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`that the two imaging layers are patterned in accordance with two separate patterns, Jinbo uses
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`the same pattern for both patterning steps, but requires that the wafer be shifted prior to the
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`second patterning step.
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`Page 10 of 11
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`Patent No. 5,652,084
`IPR2014-01030
`_____________________________________________________________________________
`
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`24.
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`Jinbo does not disclose the step of “patterning the second imaging layer in
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`accordance with a second pattern,” and one can practice the method disclosed in Jinbo using a
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`single pattern on a single mask.
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`
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`VIII. CONCLUSION
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`25.
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`I declare that all statements made in this declaration are of my own knowledge
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`and are true and that all statements made on information and belief are believed to be true; that
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`these statements were made with the knowledge that willful false statements and the like so
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`made are punishable by fine or imprisonment, or both under Section 1001 of Title 18 of the
`
`United States Code.
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`March 13, 2015
`___________________
`Date
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`____________________________
`Chris A. Mack, Ph.D.
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`Page 11 of 11
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