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`
`BSRNCITS332
`
`BSRNCITS332
`
`¢
`
`DHPN-1008 / Page 1 of 150
`
`W31 American National Standards Institute
`11 West 42nd Street
`
`New York, New York
`
`10036
`
`

`
`DHPN-1008 / Page 2 of 150
`
`

`
`BSR NCITS 332
`
`American National Standard
`
`for Information Technology —
`
`Fibre Channel Arbitrated Loop (FC-AL-2)
`
`Secretariat
`
`Information Technology Industry Council
`
`Approved (not yet approved)
`
`American National Standards Institute, Inc.
`
`Abstract
`
`This standard defines functional requirements for an interoperable Arbitrated Loop topology to support the
`Fibre Channel standard.
`
`DHPN-1008 / Page 3 of 150
`
`

`
`'
`Ame ri ca n
`_
`N at| 0 n al
`
`Standard
`
`Approval of an American National Standard requires review by ANSI that the
`.
`.
`.
`requirements for due process, consensus, and other criteria for approval have
`been met by the standards developer.
`
`in the judgement of the ANSI Board of
`Consensus is established when,
`Standards Review, substantial agreement has been reached by directly and
`materially affected interests. Substantial agreement means much more than
`a simple majority, but not necessarily unanimity. Consensus requires that all
`views and objections be considered, and that a concerted effort be made
`towards their resolution.
`
`their
`The use of American National Standards is completely voluntary;
`existence does not in any respect preclude anyone, whether he has approved
`the standards or not, from manufacturing, marketing, purchasing, or using
`products, processes, or procedures not conforming to the standards.
`
`The American National Standards Institute does not develop standards and
`will
`in no circumstances give an interpretation of any American National
`Standard. Moreover, no person shall have the right or authority to issue an
`interpretation of an American National Standard in the name of the American
`National Standards
`Institute. Requests
`for
`interpretations
`should be
`addressed to the secretariat or sponsor whose name appears on the title
`page of this standard.
`
`CAUTION NOTICE: This American National Standard may be revised or
`withdrawn at any time. The procedures of the American National Standards
`Institute require that action be taken periodically to reaffirm,
`revise, or
`withdraw this standard. Purchasers of American National Standards may
`receive current information on all standards by calling or writing the American
`National Standards Institute.
`
`CAUTION: The developers of this standard have requested that holders of patents that may be
`required for the implementation of the standard disclose such patents to the publisher. However,
`neither the developers nor the publisher have undertaken a patent search in order to identify
`which,
`if any, patents may apply to this standard. As of the date of publication of this standard
`and following calls for the identification of patents that may be required for the implementation of
`the standard, no such claims have been made. No further patent search is conducted by the de-
`veloper or publisher in respect to any standard it processes. No representation is made or implied
`
`that licenses are not required to avoid infringement in the use of this standard.
`
`Published by
`
`American National Standards Institute, Inc.
`11 West 42nd Street, New York, NY 10036
`
`Copyright © 1999 by Information Technology Industry Council (ITI)
`All rights reserved.
`
`No part of this publication may be reproduced in any
`form, in an electronic retrieval system or otherwise,
`without prior written permission of ITI, 1250 Eye Street NW,
`Washington, DC 20005.
`
`Printed in the United States of America
`
`DHPN-1008 / Page 4 of 150
`
`

`
`Contents
`
`Page
`
`Foreword ............................................................................................................. ..xi
`
`Introduction ....................................................................................................... .. xiii
`
`1
`
`2
`
`3
`
`4
`
`5
`
`6
`
`7
`
`8
`
`9
`
`Scope ......................................................................................................... .. 1
`
`Normative references ................................................................................. .. 2
`
`Definitions and conventions ........................................................................ .. 3
`
`Structure and concepts ............................................................................... .. 8
`
`Addressing ................................................................................................ .. 13
`
`FC-AL Ordered Sets ................................................................................. .. 17
`
`FC-AL Primitive Signals and Sequences .................................................. .. 18
`
`L_Port operation ....................................................................................... .. 24
`
`L_Port state transition tables .................................................................... .. 49
`
`10
`
`Loop Initialization procedure ..................................................................... .. 73
`
`Tables
`
`1
`
`2
`
`3
`
`4
`
`5
`
`6
`
`7
`
`8
`
`9
`
`10
`
`11
`
`12
`
`8B/10B characters with neutral disparity .................................................. .. 14
`
`Primitive Signals ....................................................................................... .. 17
`
`Primitive Sequences ................................................................................. .. 17
`
`MONITORING (State 0) transitions .......................................................... .. 50
`
`ARBITRATING (State 1) transitions ......................................................... .. 54
`
`ARBITRATION WON (State 2) transitions ............................................... .. 57
`
`OPEN (State 3) transitions ....................................................................... .. 59
`
`OPENED (State 4) transitions .................................................................. .. 61
`
`XMITTED CLOSE (State 5) transitions .................................................... .. 64
`
`RECEIVED CLOSE (State 6) transitions .................................................. .. 67
`
`TRANSFER (State 7) transitions .............................................................. .. 70
`
`INITIALIZATION process (State 8) transitions ......................................... .. 72
`
`13 Reserved .................................................................................................. .. 72
`
`14 OLD-PORT (State A) transitions .............................................................. .. 72
`
`15 AL_PA mapped to bit maps ...................................................................... .. 78
`
`Figures
`
`0
`
`1
`
`2
`
`3
`
`4
`
`Fibre Channel roadmap ............................................................................ .. xiii
`
`Examples of the Loop topology ................................................................ .. 10
`
`FC-PH with Arbitrated Loop addition ........................................................ .. 11
`
`State Diagram ........................................................................................... .. 31
`
`Loop Initialization Sequences ................................................................... .. 76
`
`i
`DHPN-1008 / Page 5 of 150
`
`

`
`Page
`
`5
`
`6
`
`7
`
`8
`
`9
`
`Loop Initialization Sequence AL_PA bit map ........................................... .. 80
`
`Loop Initialization state diagram example ................................................ .. 83
`
`POWER-ON state diagram ...................................................................... .. 85
`
`OLD-PORT state diagram ........................................................................ .. 87
`
`Loop Fail Initialization state diagram ........................................................ .. 89
`
`10 Normal Initialization state diagram ........................................................... .. 91
`
`11
`
`12
`
`13
`
`OPEN-lN|T state diagram ........................................................................ .. 93
`
`Slave Initialization state diagram .............................................................. .. 95
`
`Slave AL_PA position map state diagram ................................................ .. 98
`
`14 Master Initialization state diagram ............................................................ .. 99
`
`15 Master AL_PA position map state diagram ............................................ .. 101
`
`Annexes
`
`A
`
`B
`
`C
`
`D
`
`E
`
`F
`
`G
`
`H
`
`I
`
`J
`
`K
`
`L
`
`M
`
`N
`
`O
`
`P
`
`Q
`
`L_Port Elasticity buffer management ..................................................... .. 103
`
`Loop Port State Machine examples ...................................................... .. 107
`
`Dynamic Half-Duplex .............................................................................. .. 110
`
`Access unfairness .................................................................................. .. 112
`
`Half-duplex operation ............................................................................. .. 113
`
`BB_Credit and Avai|ab|e_BB_Credit management example .................. .. 114
`
`L_Port clock design options ................................................................... .. 116
`
`Mark Synchronization examples ............................................................ .. 118
`
`Port Bypass Circuit example and usage ................................................ .. 119
`
`Public L_Ports and Private NL_Ports on a Loop ................................... .. 122
`
`Assigned Loop Identifier ......................................................................... .. 123
`
`Selective replicate for parallel query acceleration .................................. .. 124
`
`Controlled FC-AL configurations ............................................................ .. 127
`
`Insertion modes of Hubs ........................................................................ .. 129
`
`L_Port power-on considerations ............................................................ .. 130
`
`L_Port initialization flow diagram ............................................................ .. 131
`
`Examples of Switch Port Initialization ..................................................... .. 132
`
`Index ............................................................................................................... ..135
`
`II
`
`DHPN-1008 / Page 6 of 150
`
`

`
`Foreword (This foreword is not part of BSR NCITS 332.)
`
`This standard defines functional requirements for an inter-operable Arbitrated Loop
`topology for Fibre Channel.
`
`This standard was prepared by Task Group T11 (formerly X3T9.3) of the Accredited
`Standards Committee X3 during 1993. The standard process started in 1989. This
`document includes annexes that are informative and are not considered part of the
`standard.
`
`Requests for interpretation, suggestions for improvements or addenda, or defect re-
`ports are welcome. They should be sent to the NCITS Secretariat, Information Tech-
`nology Industry Council, 1250 Eye Street, NW, Suite 200, Washington, DC 20005-
`3922.
`
`This standard was processed and approved for submittal to ANSI by the National
`Committee for Information Technology Standards (NCITS). Committee approval of
`the standard does not necessarily imply that all committee members voted for ap-
`proval. At the time it approved this standard, NCITS had the following members:
`
`DHPN-1008 / Page 7 of 150
`
`

`
`Technical Committee T11 on Lower Level Interfaces, which developed and reviewed
`this standard, had the following members:
`
`Kumar Malavalli, Chair
`Edward L. Grivna, Vice-Chair
`Neil Wanamaker, Secretary
`
`David Baldwin
`Paul Boulay
`Joe Breher
`Scott Carlson
`James Coomes
`Robert Cornelius
`Roger Cummings
`Zane Daggett
`Scott Darnell
`Jan V. Dedek
`Don Deel
`David Deming
`Mark DeWi|de
`Schelto Van Doorn
`Mike Dudek
`Peter Dunlap
`Mike Fitzpatrick
`David Ford
`Michael S. Foster
`Kenneth J. Fredericks
`Edward M. Frymoyer
`Edward A. Gardner
`Chuck Grant
`Michael E. Griffin
`Virginia F. Haydu
`David F. Hepner
`Michael Hoard
`Albert F. Kelley
`Robert W. Kembel
`Bret Ketchum
`Ronald J. Kleckowski
`Dale LaFol|ette
`Paul A. Levin
`Tom Lindsay
`William Lynn
`William R. Martin
`Gregory McSor|ey
`Vince Melendy
`Dennis P. Moore
`Francis Mottini
`Chris Mulvey
`James Myers
`Hari Naidu
`J. Michael Nauman
`James Nelson
`Tom Palkert
`Elwood Parsons
`Robert K. Pedersen
`Curtis A. Ridgeway
`Elizabeth G. Rodriguez
`
`Roger Ronald
`Earl E. Rydell
`Colin L. Schaffer
`John Scheible
`Pak Seto
`Robert N. Snively
`Jeffrey Stai
`Gary R. Stephens
`Arlan Stone
`Rich Taborek
`Fred Van Roessel
`Matt Wakeley
`Gary Warden
`Jeffrey L. Williams
`John Williams
`Michael Wingard
`Danny Ybarra
`Leonard Young
`Jeff Young
`Carl Zeitler
`Dal Allan (Alt.)
`Rick Allison (Alt.)
`Greg Alvey (A|t.)
`Ravi Anantharaman (Alt.)
`Charles Binford (Alt.)
`Daniel Brown (Alt.)
`Craig Carlson (A|t.)
`Edward Chang (Alt.)
`Terry Cobb (A|t.)
`Bill Collette (Alt.)
`Jeff Connell (A|t.)
`Dave Cravens (Alt.)
`Jerry D’Alessandro (Alt.)
`Robert Dahlgren (Alt.)
`Mike Dorsett (A|t.)
`Steve Finch (Alt.)
`Dave Ford (Alt.)
`Ren Franse (A|t.)
`Matt Gaffney (A|t.)
`Dave Gampell (A|t.)
`Michael Gervvig (Alt.)
`Joe Golio (Alt.)
`Thom Hall (Alt.)
`Bill Ham (Alt.)
`Daniel Heim (Alt.)
`Scott Hilliker (Alt.)
`Lee Hu (A|t.)
`David E. lnstone (Alt.)
`James R. Johns (A|t.)
`Skip Jones (Alt.)
`
`Larry Jones (Alt.)
`Gregory Kapraun (A|t.)
`Michael J. Karg (Alt.)
`Julie Ann Kembel (Alt.)
`Allen N. Kramer (Alt.)
`Bill Kuypers (Alt.)
`Michael Lamatsch (A|t.)
`Larry Lamers (Alt.)
`Alan Langerman (Alt.)
`Edwin S. Lee Ill (Alt.)
`Mark Lippitt (A|t.)
`Bill Mable (Alt.)
`Paul Manka (A|t.)
`Roland Marot (A|t.)
`Bob Mayer (Alt.)
`Jim McGillis (Alt.)
`Brian McKean (Alt.)
`Stephan Meyer (Alt.)
`Gene Milligan (Alt.)
`Mike Morandi (A|t.)
`Eli Moyle (Alt.)
`Jay H. Neer (A|t.)
`Chris Nieves (Alt.)
`Charles Nogales (A|t.)
`John J. Nutter (Alt.)
`Michael O’Donnel| (A|t.)
`Robert Pearson (Alt.)
`George Penokie (A|t.)
`David Peterson (Alt.)
`Craig Prunty (Alt.)
`Michael Pugh (Alt.)
`Said Rahman (Alt.)
`Bart Raudebaugh (Alt.)
`Ron Reynolds (A|t.)
`Wayne Rickard (Alt.)
`Chris Simoneaux (Alt.)
`Brian R. Smith (Alt.)
`Bernard Warnakula Sooriya (A|t.)
`Steven E. Swanson (Alt.)
`Jacqueline Sylvia (Alt.)
`Tad Szostak (Alt.)
`Jonathan Thatcher (Alt.)
`Lloyd E. Thorsbakken (A|t.)
`Luis Torres (Alt.)
`Kevin White (Alt.)
`Lynn Whitfield (Alt.)
`Steven Wilson (Alt.)
`Paula Zoller (A|t.)
`
`DHPN-1008 / Page 8 of 150
`
`

`
`Introduction
`
`This American National Standard specifies an enhancement to the signaling protocol
`of the Fibre Channel Physical and Signaling Interface (FC-PH), ANSI X3230, to sup-
`port communication among two or more Ports without using the Fabric topology. The
`following diagram shows the relationship of this document to other parts of Fibre
`Channel. The roadmap is intended to show the general relationship of documents to
`one another, not a hierarchy, protocol stack, system architecture; it does not show
`the complete set of Fibre Channel documents.
`
`FC-SB
`
`FC-FP
`
`FC-LE
`
`SCSI-FCP
`
`SCSI-GPP
`
`FC-I3
`
`FC-I3
`
`Mapping of Single-Byte Mappin of
`Command Code Sets
`HIPPI-%P
`
`_
`Link
`Encapsulation
`
`scsi Fc
`P.-o:oco|
`
`G°"°F‘°
`Prolocol
`P3°k°"z°d
`
`R9VI3I°" ‘°
`ReVi3I°" I°
`IPI-3 Disk std IPI-3 Tape std
`
`Fibre Channel Enhanced Physical
`
`FC-PH
`Fibre Channel Physical Interface
`X3230-1994
`
`Switch Fabric
`FC-FG
`Generic Fabric Requirements
`
`IIIII I
`
`IIIIII
`
`Figure 0 - Fibre Channel roadmap
`
`FC-AL features enhanced Ports, called L_Ports, which arbitrate to access an Arbi-
`trated Loop. Once an L_Port wins arbitration, a second L_Port may be opened to
`complete a single point-to-point circuit (i.e., communication path between two
`L_Ports). When the two connected L_Ports release control of the Arbitrated Loop,
`another point-to-point circuit may be established. An L_Port may have the ability to
`discover its environment and work properly, without outside intervention, with an
`F_Port, an N_Port, or with other L_Ports.
`
`There is no change to the framing protocol of ANSI X3, FC-PH-X, however, modifica-
`tion to the Port hardware is required to transmit, receive, and interpret the new Arbi-
`trated Loop Primitive Signals and Sequences. The clauses in this document are
`organized as follows:
`
`Clause 1 describes the scope.
`
`Clause 2 lists the normative references.
`
`Clause 3 provides descriptions and conventions.
`
`Clause 4 provides an overview and general description of FC-AL.
`
`Clause 5 describes the Arbitrated Loop Physical Address.
`
`Clause 6 describes the FC-AL Ordered Sets.
`
`Clause 7 describes the Primitive Signals and Sequences.
`
`Clause 8 describes the operation of an L_Port including the state machine.
`
`Clause 9 provides a table representation of the FC-AL states.
`
`Clause 10 describes the L_Port initialization procedure.
`
`DHPN-1008 / Page 9 of 150
`
`

`
`DHPN-1008 / Page 10 of 150
`
`

`
`AMERICAN NATIONAL STANDARD
`
`BSR NCITS 332
`
`for Information Technology —
`
`Fibre Channel —
`
`Arbitrated Loop Topology (FC-AL-2)
`
`1 Scope
`
`This American National Standard for FC-AL specifies signaling interface enhancements for ANSI X3, FC-PH-x
`to allow L_Ports to operate with an Arbitrated Loop topology. This standard defines L_Ports that retain the
`functionality of Ports as specified in ANSI X3, FC-PH-x. The Arbitrated Loop topology attaches multiple
`communicating points in a Loop without requiring switches.
`
`The Arbitrated Loop topology is a distributed topology where each L_Port includes the minimum necessary
`function to establish a Loop circuit. A single FL_Port connected to an Arbitrated Loop allows multiple NL_Ports
`to attach to a Fabric.
`
`When an L_Port is operating on a Loop with at least one other L_Port, the L_Port uses the protocol extensions
`to ANSI X3, FC-PH-X that are specified in this standard.
`
`When an L_Port is connected with an N_Port or an F_Port, the L_Port communicates using the protocol
`defined in ANSI X3, FC-PH-x.1
`
`Each L_Port may use a self-discovering procedure to find the correct operating mode without the need for
`external controls.
`
`1
`
`In order to interoperate with an N_Port or an F_Port, the L_Port must have implemented the OLD—PORT state.
`
`DHPN-1008 / Page 11 of 150
`
`1
`
`

`
`ANSI NCITS 332-1999
`
`2 Normative references
`
`The following standards contain provisions which, through reference in this text, constitute provisions of this
`standard. At the time of publication, the editions indicated were valid. All standards are subject to revision, and
`parties to agreements based on this standard are encouraged to investigate the possibility of applying the most
`recent editions of the standards listed below.
`
`2.1 Approved references
`
`ANSI X3272-1996, Information Technology — Fibre Channel — Arbitrated Loop (FC-AL)*
`
`ANSI X3230-1994, Information Technology — Fibre Channel — Physical and Signaling Interface (FC-PH)*
`
`ANSI X3297-1997, Information Technology — Fibre Channel — Physical and Signaling Interface (FC-PH-2)*
`
`ANSI X3803-1998, Information Technology — Fibre Channel — Physical and Signaling Interface (FC-PH-3)*
`
`ANSI X3289-1996, Information Technology — Fibre Channel — Fabric Generic Requirements (FC-FG)*
`
`ANSI NCITS 321-1998, Information Technology — Fibre Channel — Switch Topologies and Switch Control (FC-
`SW)*
`
`ANSI X3lTR-18-1997, Information Technology — Fibre Channel — Private Loop DirectAttach (FC-PLDA)*
`
`ANSI NCITS TR-20-1998, Information Technology — Fibre Channel — Fabric Loop (FC-FLA)*
`
`2.2 References under development
`
`At the time of publication, the following referenced standards were still under development. For information on
`the current status of the documents, or regarding availability, contact the relevant standards body or other
`organization as indicated.
`
`NCITS Project 1305-D, Information Technology — Fibre Channel — Switch Topologies and Switch Control (FC-
`SW-2)
`
`NCITS Project 1315-DT, Information Technology— Fibre Channel — Tape (FC-TAPE)
`
`* For electronic copies of some standards, visit ANSl’s Electronic Standards Store (ESS) at www.ansi.org. For printed
`versions of all standards listed here, contact Global Engineering Documents, 15 Inverness Way East, Englewood, CO
`80112-5704, (800) 854-7179.
`
`DHPN-1008 I Page 12 of 150
`
`

`
`BSR NCITS 332
`
`3 Definitions and conventions
`
`3.1 Definitions
`
`For the purpose of this standard, the definitions in clause 3 of ANSI X3, FC-PH-x and the following definitions apply.
`Definitions in this clause take precedence over any definitions in ANSI X3, FC-PH-x.
`
`3.1.1
`
`3.1.2
`
`3.1.3
`
`3.1.4
`
`3.1.5
`
`3.1.6
`
`3.1.7
`
`3.1.8
`
`3.1.9
`
`3.1.10
`
`3.1.11
`
`3.1.12
`
`3.1.13
`
`3.1.14
`
`3.1.15
`
`3.1.16
`
`3.1.17
`
`3.1.18
`
`Arbitrated Loop: A Fibre Channel topology where Ports use arbitration to gain access to the Loop.
`
`Arbitrated Loop Physical Address (AL_PA): A unique one-byte valid value as established in 5.1.
`
`Arbitrated Loop Destination Address (AL_PD): The Arbitrated Loop Physical Address of the L_Port on the
`Loop that should receive the Primitive Signal or Primitive Sequence. For example, the AL_PD is the y value
`of the OPNyx or OPNyy Primitive Signal.
`
`Arbitrated Loop Source Address (AL_PS): The Arbitrated Loop Physical Address of the L_Port on the Loop
`that transmitted the Primitive Signal or Primitive Sequence. For example, the AL_PS is the x value of the
`OPNyx Primitive Signal.
`
`close: A procedure used by an L_Port to terminate a Loop circuit.
`
`current Fill Word: The Fill Word currently selected by the LPSM to be transmitted when needed. The initial
`value is the Idle Primitive Signal (see 8.4).
`
`Dynamic Half-Duplex: A procedure initiated by the L_Port in the OPEN state to change a full-duplex transfer
`to a half-duplex transfer. The resulting half-duplex transfer is from the L_Port in the OPENED state to the L_Port
`in the OPEN state (see 7.5 and annex C).
`
`fairness window: the period during which a fair L_Port can arbitrate and win access to the Loop only once (see
`4.3).
`
`Fill Word: A Transmission Word which is an Idle or an ARByx Primitive Signal. These words are transmitted
`between frames, Primitive Signals, and Primitive Sequences to keep a fibre active (see ANSI X3, FC-PH-x,
`clause 17).
`
`FL_Port: An F_Port (i.e., Fabric Port) which contains the Loop Port State Machine defined by this document.
`
`F/NL_Port: An NL_Port that detects OPN(OO,x) and provides Fibre Channel services in the absence of an
`FL_Port.
`
`full-duplex: Communication model 2 referred to as duplex in ANSI X3, FC-PH-x. Both L_Ports are allowed to
`transmit and receive Data frames.
`
`half-duplex: Communication model 1
`frames.
`
`in ANSI X3, FC-PH-x. Only one L_Port is allowed to transmit Data
`
`Hub: a device for interconnecting L_Ports.
`
`Loop: The Arbitrated Loop described in this document.
`
`Loop circuit: A bidirectional path that allows communication between two L_Ports on the same Loop.
`
`Loop Failure: Loss of word synchronization for greater than R_T_TOV; or loss of signal (see ANSI X3, FC-PH-x,
`16.4.2).
`
`L_Port: Either an FL_Port or an NL_Port as defined in ANSI X3, FC-PH-x, 3.1.
`
`DHPN-1008 / Page 13 of 150
`
`

`
`BSR NCITS 332
`
`3.1.19 NL_Port: An N_Port (i.e., Node Port) which contains the Loop Port State Machine defined by this document.
`Without the qualifier "Public" or "Private," an NL_Port is assumed to be a Public NL_Port.
`
`3.1.20 non-L_Port: A Port that does not support the Loop functions defined in this standard (see Port in ANSI X3,
`FC-PH-x).
`
`3.1.21 Non-Participating mode: The operational mode of an L_Port which does not have an AL_PA, but is enabled
`into the Loop (see 8.1.4).
`
`3.1.22 Non-Participating Bypassed mode: The operational mode of an L_Port which does not have an AL_PA and
`is bypassed from the Loop (see 8.1.4).
`
`3.1.23 open: A procedure used by an L_Port to establish a Loop circuit.
`
`3.1.24 Participating mode: The operational mode of an L_Port which has an AL_PA and is enabled into the Loop (see
`8.1.4).
`
`3.1.25 Participating Bypassed mode: The operational mode of an L_Port which has an AL_PA, but is bypassed from
`the Loop (see 8.1.4).
`
`3.1.26 Port_Name: A unique 64-bit identifier as defined in the LOGI or ACC frame (see ANSI X3, FC-PH-x, 23.6.4).
`
`3.1.27 Primitive Sequence: Three identical consecutive Ordered Sets before the function conveyed by the Primitive
`Sequence is performed (see ANSI X3, FC-PH-x, 16.4).
`
`3.1.28 Private Loop: A Loop that does not include a Participating FL_Port (see figure 1 and annex J).
`
`3.1.29 Private NL_Port: An NL_Port that does not attempt a Fabric Login and does not transmit OPN(OO,x) (see figure
`1 and 5.2).
`
`3.1.30 Public Loop: A Loop that includes a Participating FL_Port and may contain both Public and Private NL_Ports
`(see figure 1 and annex J).
`
`13.1.31 Public NL_Port: An NL_Port that attempts a Fabric Login (see figure 1 and 5.2).
`
`3.1.32 replicate frame: A Class 3 frame which may be received and processed by one or more NL_Ports while being
`forwarded (see 7.3).
`
`3.1.33 transfer: A procedure used by an L_Port to close an existing Loop circuit in order to establish a new Loop circuit
`without relinquishing control of the Loop.
`
`3.1.34 trusted AL_PA: an AL_PA which is assumed to be valid and unique through a vendor-specified means (e.g.,
`a Hard Address).
`
`3.2 Editorial conventions
`
`In FC-AL, many conditions, mechanisms, sequences, events or similar terms are printed with the first letter of each word
`in upper case and the rest lower case (e.g., Loop). States are defined in all upper case letters. Any lower case words
`not defined in 3.1 have the normal technical English meaning.
`
`In case of conflicts between text, tables, and figures, the following precedence shall be used: text, tables, figures. State
`diagrams have precedence as stated in the appropriate clauses.
`
`The word, shall, when used in this standard, states a mandatory rule or requirement. The word, may, when used in this
`standard, states an optional rule. The word, should, when used in this standard denotes flexibility of choice with a
`strongly preferred alternative (equivalent to the phrase ‘is recommended‘).
`
`DHPN-1008 / Page 14 of 150
`
`

`
`BSR NCITS 332
`
`The words, recognize, recognizes, or recognized, when used in this standard, indicates that an L_Port has detected a
`Primitive Signal or Primitive Sequence.
`
`Each individual entry that appears within parentheses of FC-AL Ordered Sets (e.g., ARByx and OPNy) represents the
`hexadecimal value of an AL_PA or special flags (e.g., hex 'F7', hex 'F8‘, and hex 'FF').
`
`All history variables, when used in this standard, are assumed to be set to zero (0) at power-on time. Any optional history
`variable that is not implemented tests as zero (0) in all tests of that variable.
`
`The ISO convention of numbering is used; i.e., the thousands and higher multiples are separated by a space and a
`comma is used instead of the decimal point (e.g., 1 062,5 Mbits/sec).
`
`Whenever ANSI X3, FC-PH-x is referenced, all ANSI X3, FC-PH documents referenced in clause 2 are implied.
`
`3.3 Abbreviations, acronyms, and other special words
`
`ACCESS
`
`AL_PA
`
`AL_PD
`
`AL_PS
`
`Access history variable — a two-valued variable (i.e., 0/1) to indicate access fairness history
`(see 8.1 .1).
`
`Arbitrated Loop Physical Address (see 5.1)
`
`Arbitrated Loop Destination Physical Address (e.g., the y value in OPNyx and OPNyy)
`
`Arbitrated Loop Source Physical Address (e.g., the x value in OPNyx)
`
`AL_T|ME
`
`Arbitrated Loop timeout value (see 8.2.2)
`
`ARB_PEND
`
`ARB_WON
`
`Arbitration PENDing history variable — a two-valued variable (i.e., 0/1) to help an L_Port
`remember that it has originated one or more ARB(AL_PA) Primitive Signals (see 8.1.1).
`
`Arbitration Won history variable — a two-valued variable (i.e., 0/1) to remember whether the
`L_Port won arbitration (see 8.1.1).
`
`ARB(AL_PA)
`
`Arbitrate Primitive Signal — an ARByx in which y = x = AL_PA of the L_Port (see 7.1.1)
`
`ARB(val)
`
`ARByx
`
`ARBf_SENT
`
`Arbitrate Primitive Signal — an ARByx in which y = x = val ('va|' represents a one byte
`hexadecimal value).
`
`Arbitrate Primitive Signal — any Ordered Set that begins with K28.5, D20.4 ('y' and 'x' may be
`used in adjacent text to denote the value of characters 3 and 4 within the Ordered Set) (see 7.1).
`
`Arbitrate hex ‘FF’ Sent history variable — a two-valued variable (i.e., 0/1) that indicates that the
`L_Port has requested REQ(arbitrate (FF)) and the LPSM has modified the current Fill Word to
`ARB(FF) (see 8.1.7 and 8.4.3).
`
`Avai|ab|e_BB_Credit
`
`Available Buffer-to-Buffer Credit (see 8.3.4)
`
`BB_Credit
`
`Buffer-to-Buffer Credit as established during Login (see 8.3.4 and ANSI X3, FC-PH-x, 26.5.2)
`
`BYPASS
`
`CLS
`
`CFW
`
`DHD
`
`BYPASS history variable — a two-valued variable (i.e., 0/1) which indicates whether an L_Port
`is bypassed (see 8.1.4).
`
`CLoSe Primitive Signal (see 7.4)
`
`Current Fill Word (i.e., Idle or ARByx) (see 3.1.10 and 7.1)
`
`Dynamic Half-Duplex Primitive Signal (see 7.5)
`
`DHPN-1008 / Page 15 of 150
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`

`
`BSR NCITS 332
`
`DHD_RCV
`
`DUPLEX
`
`Dynamic Half-Duplex ReCeiVed history variable — a two valued variable (i.e., 0/1) to indicate
`that the L_Port in the OPENED state has detected and supports DHD (see 8.1.5).
`
`DUPLEX history variable — a two-valued variable (i.e., 0/1) to indicate whether the L_Port is
`allowed to originate Data frames (see 8.1.2).
`
`EE_Credit
`
`End-to-End Credit (see ANSI X3, FC-PH-x, 26.4.4)
`
`ERR_|N|T
`
`ERRor |NlTia|ization history variable — a two-valued variable (i.e., 0/1) to indicate that the
`L_Port has attempted initialization which failed (see 8.1.6).
`
`LIFA
`
`LIHA
`
`LILP
`
`LIM
`
`LIP
`
`L|Pfx
`
`LIPA
`
`LlPyx
`
`URP
`
`USA
`
`USM
`
`U_FL
`
`UJD
`
`LP_TOV
`
`LPB
`
`LPBfx
`
`LPByx
`
`LPE
`
`LPEfx
`
`LPEyx
`
`Loop Initialization Fabric Assigned — Loop Initialization Sequence (see 10.5)
`
`Loop Initialization Hard Assigned — Loop Initialization Sequence (see 10.5)
`
`Loop Initialization Loop Position — Loop Initialization Sequence (see 10.5)
`
`Loop Initialization Master — the L_Port which is responsible for initializing the Loop (see clause
`10)
`
`Loop Initialization Primitive Sequence — any of the LIP Primitive Sequences (see 7.8)
`
`Loop Initialization Primitive Sequence — perform a vendor unique reset of all (except AL_PA =
`x) L_Ports (f = hex 'FF') (see 7.8.5)
`
`Loop Initialization Previously Acquired — Loop Initialization Sequence (see 10.5)
`
`Loop Initialization Primitive Sequence — perform a vendor unique reset of an L_Port at AL_PA
`= y (see 7.8.5)
`
`Loop Initialization Report Position — Loop Initialization Sequence (see 10.5)
`
`Loop Initialization Soft Assigned — Loop Initialization Sequence (see 10.5)
`
`Loop Initialization Select Master — Loop Initialization Sequence (see 10.5)
`
`Loop Initialization FLag — Loop Initialization flag (see 10.5)
`
`Loop Initialization |Dentifier — Loop Initialization identifier (see 10.5)
`
`LooP TimeOut Value (see 8.2.3)
`
`Loop Port Bypass Primitive Sequence — either LPByx or LPBfx (f = hex 'FF') (see 7.7.1 and
`7.7.2)
`
`Loop Port Bypass Primitive Sequence — used to bypass all (except AL_PA = x) L_Ports (f =
`hex 'FF') (see 7.7.2)
`
`Loop Port Bypass Primitive Sequence — used to bypass an L_Port at y = AL_PA (see 7.7.1)
`
`Loop Port Enable Primitive Sequence — either LPEyx or LPEfx (see 7.7.3 and 7.7.4)
`
`Loop Port Enable Primitive Sequence — used to enable all bypassed L_Ports (f = hex 'FF') (see
`7.7.4)
`
`Loop Port Enable Primitive Sequence — used to enable a bypassed L_Port at y = AL_PA (see
`7.7.3)
`
`DHPN-1008 / Page 16 of 150
`
`

`
`LPSM
`
`MRKtx
`
`MK_TP
`
`Loop Port State Machine (see 8.4)
`
`Mark Primitive Signal (see 7.6)
`
`Mark Type — used to identify the type of Mark Primitive Signal (see 7.6)
`
`(Non F8) LIP
`
`Any Loop Initialization Primitive Sequence as defined in 7.8, where character 3 is not equal to
`hex 'F8'.
`
`BSR NCITS 332
`
`OPNr
`
`OPNfr
`
`OPNy
`
`OPNyr
`
`OPNyx
`
`OPNyy
`
`PARTICIPATE
`
`REPEAT
`
`REPLICATE
`
`SOFiL
`
`Open Replicate Primitive Signal — either OPNyr or OPNfr (see 7.3)
`
`Open Primitive Signal — broadcast rep|icate(see 7.3.2)
`
`Open Primitive Signal — either OPNyx or OPNyy (see 7.2)
`
`Open Primitive Signal — selective replicate(see 7.3.1)
`
`Open Primitive Signal — full-duplex (see 7.2.1)
`
`Open Primitive Signal — half-duplex (see 7.2.2)
`
`PARTICIPATE history variable — a two-valued variable (i.e., 0/1) that indicates whether an
`L_Port has an AL_PA and is participating on the Loop (see 8.1.4).
`
`A symbol whose value is derived from BYPASS and PARTICIPATE, which indicates that an
`L_Port merely repeats received Transmission Words (see 8.1.4).
`
`Replicate history variable — a two valued variable (i.e., 0/1) to indicate if an L_Port has
`transmitted OPNr while in the OPEN state or an NL_Port has received OPNr while in the
`MONITORING or ARBITRATING states (see 8.1.3).
`
`Start_of_Frame Primitive Signal (K28.5 D21.5 D22.2 D22.2) used during Loop Initialization (see
`10.5).
`
`XM|T_2_lDLES
`
`Xmit 2 ldles history variable — a two-valued variable (i.e., 0/1) that indicates whether the L_Port
`needs to transmit two (2) ldles (see 8.1.1).
`
`3.4 Symbols
`
`Logic symbols are represented in state tables and diagrams as follows:
`
`— the logical 'or' is represented as ‘|';
`
`— the logical ‘and’ is represented as '&';
`
`— the logical negation is represented as '~' (tilda);
`
`— the ‘less-than‘ is represented as '<';
`
`— the ‘greater-than’ is represented as '>';
`
`— comparisons are represented as '='