INTERNATIONAL TECHNOLOGY
`
`ROADMAP TOR SEMlCONDUCTORS
`
`2003 EDITION
`
`LITHOGRAPHY
`
`THE ITRS IS DEVISED AND INTENDED FOR TECHNOLOGY ASSESSMENT ONLY AND IS WITHOUT REGARD TO ANY
`COMMERCIAL CONSIDERATIONS PERTAINING TO INDIVIDUAL PRODUCTS OR EQUIPMENT.
`
`THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS: 2003
`
`CARL ZEISS v. NIKON
`|PR2013-00362
`
`Ex.2oo3,p.1
`
`CARL ZEISS V. NIKON
`IPR2013-00362
`Ex. 2003, p. 1
`
`

`

`TABLE OF CONTENTS
`
`Scope ................................................................................................................................... 1
`Difficult Challenges ............................................................................................................... 1
`Lithography Technology Requirements ................................................................................ 3
`Potential Solutions .............................................................................................................. 15
`Crosscut Needs and Potential Solutions ............................................................................ 16
`
`Environment, Safety, and Health ................................................................................................. 16
`Yield Enhancement ..................................................................................................................... 17
`
`Metrology..................................................................................................................................... 17
`
`Modeling & Simulation ................................................................................................................. 17
`Inter-focus ITWG Discussion .............................................................................................. 18
`
`Impact of Future Emerging Research Devices ................................................................... 18
`
`LIST OF FIGURES
`
`Figure 53 Lithography Exposure Tool Potential Solutions ......................................................... 16
`
`LIST OF TABLES
`
`Table 76
`
`Lithography Difficult Challenges ................................................................................. 2
`
`Table 727a Lithography Technology Requirements—Near—term .................................................. 4
`
`Table 77b Lithography Technology Requirements—Long—term .................................................. 5
`
`Table 78a Resist Requirements—Near-term .............................................................................. 6
`
`Table 78b Resist Requirements—Long-term .............................................................................. 7
`Table T80 Resist Sensitivities ..................................................................................................... 7
`
`Table 79a Optical Mask Requirements ....................................................................................... 9
`
`Table 79b
`
`EUVL Mask Requirements ....................................................................................... 11
`
`Table 790 EPL Mask Requirements .......................................................................................... 13
`
`THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS: 2003
`
`CARL ZEISS v. NIKON
`lPR2013-00362
`
`Ex.2003,p.2
`
`CARL ZEISS V. NIKON
`IPR2013-00362
`Ex. 2003, p. 2
`
`

`

`Lithography
`
`1
`
`LITHOGRAPHY
`
`SCOPE
`
`In 2003 and beyond. lithographers are confronted with two sets of challenges. The first is a consequence of the difficulties
`inherent in extending optical methods of patterning to physical limits, while the second follows from the need to develop
`entirely new, post-optical lithographic technologies capable of being implemented into manufacturing. Not only is it
`necessary to invent technical solutions to very challenging problems, it is critical that die costs not be increased because
`of the new methods. Each new generation of lithographic technology requires advances in all of the key elements of the
`following lithography infrastructure:
`
`0
`
`-
`-
`I
`
`Exposure equipment
`
`Resist materials and processing equipment
`Mask making, mask making equipment, and materials
`Metrology equipment for critical dimension (CD) measurement, overlay control, and defect inspection
`
`technology requirements, and
`This chapter provides a 15-Year roadmap defining lithography’s difficult challenges,
`potential solutions. Additionally, this chapter defines the Lithography lntemational Technology Working Group (ITWG)
`interactions with and dependencies on the crosscut TWGs for Environment, Safety, and Health {ESH); Yield
`Enhancement; Metrology; and Modeling and Simulation.
`
`Since the earliest days of the microelectronics industry, optical lithography has been the mainstream technology for
`volume manufacturing, and it
`is expected to continue as such through the 45 nm node,
`through the application of
`resolution enhancement techniques such as off—axis illumination (0A1), phase shifting masks (PSM), optical proximity
`corrections (OPC), and possibly liquid immersion.
`In addition to resolution enhancement
`techniques,
`lenses with
`increasing numerical apertures and decreasing aberrations will be required to extend the life of optical lithography, and
`liquid immersion is also being considered as a means of extending optical lithography. It should be noted that it becomes
`much more difficult to implement OPC and resolution enhancement at the 65 nm node and beyond, compared to
`preceding nodes.
`
`The requirements of the 32 nm node and beyond are viewed as beyond the capabilities of optical lithography. Extension
`of the Roadmap will require the development of next-generation lithography (NGL) technologies, such as extreme
`ultraviolet lithography (EUV), electron projection lithography (EFL), and imprint lithography. Because next generation
`lithographies will require the development of substantially new infrastructure, the costs of these technologies will put
`great pressure on manufacturing costs.
`
`DIFFICULT CHALLENGES
`
`The ten most difficult challenges to the continued shrinking of minimum feature sizes are shown in Table 76. Mask-
`making capability and cost escalation continue to be critical to future progress in lithography and will require continued
`focus. As a consequence of prior aggressive Roadmap accelerationiparticularly the MPU gate linewidth (post etch), and
`increased mask error factors (MEFs) associated with low k] lithography—mask linewidth control appears as a particularly
`significant challenge going forward. For example, in the 1997 roadmap the 70 nm node requirements showed 4X masks
`needing 9 nm of CD control for isolated lines and 14 nm for contacts. The 2003 requirements are 6.4 nm for isolated lines
`and 5.5 nm for contacts assuming mask error factor (MEF) values of 1.0 (assuming alt—PSM masks) and 3.0, respectively.
`MPU gate CD control requirements will stress many other aspects of lithography process control, including lenses, resist
`processing equipment, resist materials, and metrology.
`
`Mask equipment and process capabilities are in place for manufacturing masks with complex OPC and PSM, while mask
`processes for post-193 nm technologies are in research and development. Mask damage from electrostatic discharge
`(ESD) has long been a concern, and it is expected to be even more problematic as mask feature sizes shrink. Furthermore,
`masks for 157 nm lithography will be kept in ambient atmospheres nearly free of water, so the risk of ESD damage to
`masks will increase. A cost-effective pellicle solution has not yet been fully developed for 157 nm masks, further
`complicating mask handling for lithography at that wavelength.
`
`THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS: 2003
`
`CARL ZEISS v. NIKON
`|PR2013-00362
`
`Ex.2003,p.3
`
`CARL ZEISS V. NIKON
`IPR2013-00362
`Ex. 2003, p. 3
`
`

`

`2 Lithography
`
`While lithography has long contributed significantly to over—all semiconductor manufacturing costs, there is even greater
`concern going forward regarding cost control and return-on—investment (ROI). These issues of masks and lithography
`costs are relevant to optical, as well as next—generation lithography. To be extended fitrther, optical lithography will
`require new resists that will provide both good pattern fidelity when exposed with short wavelengths (I93 nm, possibly
`under immersion, and IS? nm), and improved performance during etch. Inadequacies in resist performance and CaF;
`quality and supply have already led to a slowdown in the pace of advances in lithography.
`
`is unclear whether
`it
`Process control. particularly for overlay and linewidths, also represents a major challenge.
`metrology, which is fundamental to process control, will be adequate to meet future requirements as needed for both
`development and volume manufacturing. Resist line edge roughness (LER) is becoming significant, as gate linewidth
`control becomes comparable to the size of a polymer unit. Next—generation lithography will require careful attention to
`details as the exposure tools are based upon approaches that have never been used before in manufacturing. These tools
`must be developed and proven to be capable of meeting the reliability and utilization requirements of cost-effective
`manufacturing.
`
`Five Drfi'ictrh Cbaifcngcs/
`250 ”m m’vlllgh 20(J9
`
`Table 76 Lithography Difficult Challenges
`
`Optical masks with features for resolution
`enhancement and Post-optical mask fabrication
`
`Cost Control and Return on Investment (ROI)
`
`Process Control
`
`Registration, CD control, defectivity, and 157 nm pelticles; defect free multi—layer EUV substrates
`or EPL membrane masks
`_
`_
`_
`_
`_
`.
`Equipment infrastructure (writers. inspection, repair)
`Achieving constantiimproved ratio of tool cost to throughput over time
`Cost-effective resolution enhanced optical masks and post-optical masks
`Sufficient lifetimes for the technologies
`Resources for developing multiple technologies at the same time
`High output, cost-effective. EUV light source
`Processes to control gate CDs to less than 1.8 nm (3 sigma)
`New and improved alignment and overlay control methods independent of' technology option to
`< 19 nm overlay
`Accuracy of UPC
`Resists for ArF. Immersion Lithography and F: Outgassing, LER, SENT—induced CD changes. defects 2 30 nm.
`
`CaF‘z Yield. cost, quality
`Hue Drflictrh Cbaifcngcs/
`< 45 um Beyond 20”}
`
`
`
`Equipment infrastructure (writers. inspection. repair)
`Mask Fabrication and Process Control
`Mask process control methods
`
`Defect—free NGL masks
`
`Cost Control and ROI
`
`Gate CD Control Improvements, Process
`Control. Resist Materials
`
`Metrolo
`
`and Defect Ins ection
`P
`
`gy
`
`Capability for critical dimensions down to 1' nm and metrology for overlay down to 7.2 nm, and
`patterned wafer defect inspection for defects < 30 nm
`Achieving constanti’improvod ratio oftool cost to throtlghput
`Development ol‘cost—el'i'ective post—optical masks
`Achieving R0] for industry with sufficient lifetimes for the technologies
`Development of processes to control gate CD5 < l nm (3 sigma) with appropriate line—edge
`roughness
`Development of new and improved alignment and overlay control methods independent of
`technology option to < 7.2 nm overlay
`Tools for Mass Production Post optical exposure tools capable of meeting requirements of the Roadmap
`
`SEMfiscunning ciao-tron microscope
`
`THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS: 2003
`
`CARL ZEISS v. NIKON
`|PR2013-00362
`
`Ex.2003,p.4
`
`CARL ZEISS V. NIKON
`IPR2013-00362
`Ex. 2003, p. 4
`
`

`

`Lithography 3
`
`LITHOGRAPHY TECHNOLOGY REQUIREMENTS
`
`The lithography roadmap needs are defined in the following tables:
`
`0
`-
`-
`
`Lithography Requirements (Tables 77a and b)
`Resist Requirements (Tables 78a, b, and c)
`MaSk Requirements (Tables 7921, b, and c)
`
`Because of the particular challenges associated with imaging contact holes, contact hole size after etch will be smaller
`than the lithographically imaged hole, similar to the difference between imaged and final MPU gates. This is important to
`comprehend in the Roadmap, because contacts have very small process windows and large mask error factors, and minor
`changes in the contact size have large implications for mask CD control requirements. Small MPU gates after etch are
`pursued aggressively and create significant challenges for melrology and process control.
`
`Photoresists need to be developed that provide good pattern fidelity, good linewidth control (including roughness), and
`low defects. As feature sizes get smaller, defects and polymers will have comparable dimensions with implications for the
`filtering of resists.
`
`The masks for all next-generation lithographies are radically different from optical masks, and no NGL technology can
`support a pellicle. Because the requirements for NGL masks are substantially different than those for optical lithography,
`separate tables have been included for Optical, EUV, and EPL masks (Tables 79a, b, and c, respectively}. These masks
`have tight requirements for linewidth control and registration, because they will be applied at the 45 nm and beyond. EUV
`masks must also have very tight flatness control, and there are additional requirements for various parameters associated
`with reflectivity of EUV masks. EPL masks are comprised of thin membranes, and have special requirements. NGL
`masks, being different
`in form from optical masks, will also require the development of new defect
`inspection
`capabilities. Solutions for protecting the masks from defects added during storage, handling and use in the exposure tool
`need to be developed and tested, because there are no known pellicle options for NGL masks. These very different NGL
`mask requirements can be expected to exacerbate, rather than relieve, the high costs associated with masks that are
`already being encountered with optical masks.
`
`THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS: 2003
`
`CARL ZEISS v. NIKON
`|PR2013-00362
`
`Ex.2003,p.5
`
`CARL ZEISS V. NIKON
`IPR2013-00362
`Ex. 2003, p. 5
`
`

`

`4 Lithography
`
`
`
`
`
`
`
`
`
`
`
`Table 771.? Lithography chhnaiogy RequiremenfsiNear-fcrm
`Year of Production 200') 2003 2004 2005 2006 200? 3008 ‘
`
`
`
`Tm'hnuiugJ-' Node
`hpW
`Midi
`DEAM
`DRAM Ha Pitch {min}
`C(Jnlztrt in resist {mu}
`Contcirt uglier etch (nan)
`Ovarian:
`
`CD mntmi f3 sigma) (hm)
`.I'L’H’U
`
`in”)U/ASIL":r Metai i (Mi) ’fgpm'h (mil)
`MPU ‘16 Pitch {min} {tim‘rmtacted gaff)
`MPUgrita in resist (mil)
`MPU gate icngth q/icr etch {nm}
`Canine: in resist (inn)
`
`
`
`Cunmet (flier etch (inn)
`Cute CD contra." (3 sigma) {nin}
`ASIC/IJ’
`
`ASIC' 55 Fifth {mu} {nm‘rmtar‘tt’dgatrz}
`ASiC/LP gate in insist (rim)
`ASIC/LP gate iengtn qftcr etch {inn}
`Contact in resist (inn)
`
`C(Intact nfier etch (hm)
`CD amt”)! {3 signm) (mu)
`
`Chip sisc (mm2j
`DRA M', intimimrtion
`
`DMM. pimhrciion
`
`MP U. high VOIHHK’ at intrndiictirin
`
`MPU. high miumc at production
`
`MP U. high parfiu-manm'
`ASIC‘
`
`Minimumfieid urea
`Wajérsixl {dimntlicm mm)
`
`
`Matiifl'm'ttnuhie solutions exist and are being riptimted
`Mamdilctttl‘aiiie solutions are known
`interim .wimions are known
`Manitfut'ttrrahi'v sriintium' are NO T kimu-‘n
`
`THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS: 2003
`
`CARL ZEISS v. NIKON
`|PR2013-00362
`
`Ex.2003,p.6
`
`CARL ZEISS V. NIKON
`IPR2013-00362
`Ex. 2003, p. 6
`
`

`

`
`Tahie 7 7b Lithagraphy Technology RequirementsiLong-term
`
`Year of'Pt'odt-‘ctitm
`E'Oi fl
`2012
`2fii3
`201’5
`2016
`2M8
`Techmtiugv Nude
`hp45
`hp32
`hp22
`BRA M
`
`
`Lithography 5
`
`32
`40
`30
`
`DRAM V} Pitch (um)
`
`Contact in resist (tam)
`
`(.‘tmtaet aflereteit (m)
`Overiay
`
`CD controi (3 sigma) (nth)
`MPU
`
`45
`55
`50
`18
`5.5
`
`54
`MPU/ASCi Metal i (Mi) Vzpitch (tun)
`
`MPU 56 Pitch (um) (tincmttacred gate) 45
`
`MPU gate in resist (um) 25
`
`MPU gate ietrgth after etch (hm) 18
`
`C(intact in resist (mm 59
`
`Cunmet after etch {mm
`CD controi (3 sigma) inn!)
`ASiC/LP
`
`54
`1 .E
`
`45
`ASiC‘ V2 Pitch (um) (trim-mttactedgate)
`
`ASIC/LP gate in resist (Min) 32
`ASKYLP gate iertgth after etch mm)
`22
`Contaet in resist him)
`59
`
`Contact afiet‘ etch (hm)
`
`CD controi (3 sigma) (um)
`
`54
`2.0
`
`
`
`
`Chip size (mntz)
`
`DRA M. introduction
`533
`353
`550
`351
`464
`292
`
`DRAM. pnxittctioh
`83
`104
`83
`104
`138
`87
`
`230
`280
`230
`230
`280
`230
`me. high vnittme at intrrtduetian
`
`140
`140
`140
`1 40
`140
`140
`MPU. high vuintne ut prmittction
`
`MPU. high petfm'mance
`310
`310
`310
`310
`310
`310
`
`we
`m4
`704
`704
`m4
`m4
`704
`Minimtttnjiehi area
`704
`704
`704
`704
`704
`704
`
`went-m (mutter. mm)
`300
`450
`450
`450
`450
`450
`
`I
`|
`I
`|
`|
`I
`|
`
`Mantgfacmmhie .witttions exist. and are being nptimi1ed
`Mattttiitctttmbie .mhttiom are known
`interim saiutions are known
`Mamifuctut'ahie srtiutiwtx are NOT him u-‘n
`
`Notevjot' Rthies 77a and 77b:
`[1] The dates in this taiJie are the year qtjtitzst product shipment qt‘inngruteci cit‘mits firm: a mumgfitctttring site with vohmte exceeding 1‘0. 000 units:
`Erposzti'e trmis, resists, and ntasimjr'n- mamq'ctc‘tttt-ing must he avaiiairie one J-‘eat'eai'iiet'. Deveinpment atmthiiii]: mm! he cmaiiahie hurl—three years
`eat-tier.
`[2] Linen-faith mriutinns are based on iittewichh devitttirmsfi'atn target dimensions fithtii ct‘itimifeutttretfltr a given product. For exumpie. jitr
`mict‘rmt‘rx‘es‘sotn‘ these wattid he the gateféafltt‘m' (.‘i'tx‘icai in circuit petfitrtmtttce. This tntai' iitiewich‘h wtt'iatirm includes cantt'iiautirmsfi‘am errors within
`each atpoxut'ejieicifnrfi’attit'es qfvarirms orientationv and with l’fltj'iflg pitch. Variations aisn inciude ctmtt'ii'mtitmsfi'nm iinewidth changm acmss
`imiividttai thiet 15' andji'am wafer—to-n-‘afer. The variances rtfthefinai (hmetlximts after etr'h are assumed to remit 2/3‘ti'mn variance ty'the iinewidths in
`resist anti ifjjmm the etch pitteessjm' aii processes creep! MPU gates. where it is assumed that 30% nfthe variance rgf the linen-faiths mmesfinm
`resist and 20%fl‘om the etch process. it is ussmnm' that the aiiowabie mriatians' in iitteu'idth are 1.15 % (tfthefinai. etchfeattn-e sizeftn- DRA‘ M1 and
`ASICS and iit’i%fi)r MPUV
`
`THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS: 2003
`
`CARL ZEISS v. NIKON
`|PR2013-00362
`
`Ex.2003,p.7
`
`CARL ZEISS V. NIKON
`IPR2013-00362
`Ex. 2003, p. 7
`
`

`

`6 Lithography
`
`Tabk) 78a Resist RequiremenfsiNear-ferm
`Year qf'l’rrxfmvr'un
`701'}€
`.7004
`.7005
`2007
`2008
`3009
`
`—T-----
`
`100
`BRA M 55 Pink mm)
`
`MI’U/ASIC Mcm.’ 1' (MU xi» Pitch (Hm)
`120
`107
`
`unnu-
`MPU Garem raw.“ I9113!}! (mu)
`
`
`
`MPU Gare Lengrb aflcr arch (um)
`Rest-:1 Charudcrmmu' ‘
`
`Rea-Ev! meets requirenrema‘fiu' gale .Imohrrfrm and gate CD comm}
`(mu, 3 signm) "”"
`Rests! Hubble“ (mu. inmgmg fuvwr) ***
`Uhru {bin rush! mickm’m {Hm} ** **
`
`PER iemper'ufm't.’ .s't’nsim’m‘ {mu/Q
`
`1.6
`
`2—50-4110 220-350 200—320 170-250m
`120-150 120-150 120-150 100-150
`
`.
`
`.
`40
`
`.
`
`0.01
`35
`
`30-120
`
`1.5
`
`1 0:3 @
`
`0 .01
`30
`
`Backside purrr'dcs mm‘n'clcsfmz at ('rr'rin'uf size. mm
`
`Dcff {is in spin-mum! rtfivixrfffms?‘
`thz
`(size in mu}
`
`
`2010500@ 2010500@
`
`0.01
`55
`
`.
`
`.
`
`0.03
`0.03
`0.04
`.
`.
`.
`Wc'mz
`Dcffécfs in panel-med t'es‘u'tfifnm, gates, (unlock, era
`
`
`
` 40 35(sin- in mm 30
`Line Width ergknexs (nm. 3 sigma)
`<8% nf'CD “a...”
`
`.
`
`2.0
`
`1.8
`
`.
`
`.
`
`Mamfarmmble solutions exist and are being (imitated
`Marrufiu‘mmbfe .wfmiom are known
`Interim solutions are known
`Mamgfuc'mrahr'v mhrtiorlw are NOTkau-‘n
`
`THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS: 2003
`
`CARL ZEISS v. NIKON
`|PR2013-00362
`
`Ex.2003,p.8
`
`CARL ZEISS V. NIKON
`IPR2013-00362
`Ex. 2003, p. 8
`
`

`

`Lithography 7
`
`Tabfe 78b Resist RequiremenfsiLong-Icrm
`Yearrgf'Prixi’arcviwr 2er mm mm 20H | 2015 | 2er l
`
`
`
`
`
`
`
`
`
`Tcdiimfugv MMk’
`flu-£5
`hp32
`hp22
`DiMM V.» Pitch (Jim)
`
`MPH/1451C M'em.’ I (MU % Firth (mu)
`MPU/Asic ‘72 Pifl‘h' (mu)
`
`MPU Primed Gale Length (mm)
`MPU Physical Gale Lerrgih {Hm}
`Ream Chummerisrics *
`Ravi.“ meets- i'eqiiii'eiilemxjhr J'cln‘m'uimn and gate CD Crmiro.’
`(mu, 3M'gi1m) ”u“
`
`Ream ihickm’m (not. imaging iqwr} "" 50—30 120—160 30—140 60—1 00
`
`
`
`
`
`
`
` 80—120 60—100 40—80Uh‘m (bin rests: mickness {Hm} ** * 40—60
`FEB remmmiirrc .s'cnsr'iil-‘iu-' (mnfCi
`1 .5
`1 .5
`1
`1
`1
`1
`Hut-hide panic-M fprirricfc.s/m2mc'riiic'uf six. mm} 500 @ 50 1000 @ 50 1000 @ 50 1000 @ 50 1000 @ 50 500 @ 50
`
`
`
`
`
`
`Dckm‘s in.spin-muied rmisiflfms
`0.01
`0.01
`0-01
`0.01
`0.01
`0.01
` 30 20 20 1D 1 D{size in Jim} 10
`
`
`
`
`
`
`
`
`0.6
`
`0- 01
`0- 01
`0-01
`iii/(m2
`Dcffl’cm in {miter-fled i'c’j'isiji‘i'im fin- gaiat ('rmiafljz etc
`
`
`
`(st:- in mm 10 10 1 D
`
`Lint: Width Rflflgh'ilt’j'h‘ (mu. 3 Sigma} (8% riff!) “3““
`
`.
`
`.
`
`.
`
`Mamifimumbie .soiiiriuns mint. and are being optimised
`ibi'aniqfiicnrrubfe .mi‘miom are known
`
`Interim .mi’ufiimx are known
`
`Man iifudiri‘cihfe mimiom are NOT Rm) n-‘ri
`
`Tabfe 78!: Resist Sensirivifies
`
`Equure Tec'hniJIogl'
`Sam-iriviij:
`
`
`20—50 mJi cm2
`
`Din-(mi Dirac: Wriw :1! 5|? kl” * ****
`
`10—30 m” cm2
`15 7 um 5—1 5 mJI (:I'TI2
`
`
`
`Extreme Uiirm'im’er a! 13.5 mil!
`
`2—1 5 mJI (:I"I‘I2
`
`Hecmm Beam Pi'ry'eciirm (ii 101'} AV ‘*** '
`
`"‘ “"‘ ' Linked with J'amiiition
`
`THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS: 2003
`
`CARL ZEISS v. NIKON
`|PR2013-00362
`
`Ex.2003,p.9
`
`CARL ZEISS V. NIKON
`IPR2013-00362
`Ex. 2003, p. 9
`
`

`

`B Lithography
`
`Notesfor Tobias 780 and 78h:
`Etposttre Dependent Requirements
`*
`Resist setisitiuit1-' is treated sepamteiv in the second resist sensitivities tabie (separate sheetJ.
`* “
`imfimtes il’hether the resist has sttfiit'ient resuhnion. CD controi. and profiie to meet the resoitttion and gate CD eontroi mines.
`***
`Resist thickness is determined by the aspect ratio range o]'15.'i to 4.1, iimited bypattern coiiapse.
`****
`Resist thickness oftop imaging iayer ofa mniti-iayer resist determined by opacity to the mpowre source.
`*****
`Linked with tesoitttion.
`
`****** 1'. WR is 30'0fthe iinewidth over a range of.gtmtiaifrequencies given by % S spatiai frequences S 0 SIX'
`i
`iow-end-oflrange of the drain extensionfottnd in the Thermai and thin Fii'm, Doping and Etching Technoiogy Requitemenm Tobie.
`t. W)? =sgsm; ”LEE.
`1‘ Defects in coatedfilms are those detectahie as physicai oiy‘ects. such as pinhoies. that may he dittinguishedfmm the resistfiim by opticai detection
`methmis.
`Other requirements:
`[A] Needfor at positive tone resist and a negative tone resist wiii depend upon eritieaifegmre type and density.
`[3] Feature waif profile shottia' he 90 1‘2 degrees.
`1’C] Hernia? stabiiig! shonid be 2 130 "C.
`[D] Etching seiectivigt shouid he > that ofpoiy hydmxysgtrene {Pt-1031‘).
`[E] Upon remomi by stripping there shottid be no detectibie residues.
`[F] Sensitive to bowie airiwrne eommumdw such as amines and amides. Ciean handiing space .vhtmid have < i000pptM ofth‘ewe materiois.
`[G] Metai contaminants < 5 ppb.
`1’HI Otgonie materiai verges-ting (moiec'tties/c'mznseci fitr two minutes (under the iens}. Voiuefor i57 nm iithography too! is < ie t2, Vaittefitr EUV
`iithography tooi is <5ei3. Vaiuesfor eieetron projection are being determined
`[if Si containing matet'iai Otttgassing (moiectties/cm —.s'ec)_{br two minutes (tinder the hem). Vailtefor 15 7 nm iithography tooi is < ie8. Vahtejbr EUV
`iithography too! is (Se 1'3. Vainasjor eieetron projection are being determined.
`
`, where P is the pitch and X;-
`
`is the
`
`THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS: 2003
`
`CARL ZEISS v. NIKON
`|PR2013-00362
`
`Ex.2003,p.1o
`
`CARL ZEISS V. NIKON
`IPR2013-00362
`Ex. 2003, p. 10
`
`

`

`Lithography 9
`
`Table 799 Opir'cai Mask Requiremcnfs
`
`I Year rngimim‘iion .7009 21’103' 200-4 2005 2006 I .7007 I 2008
`
`
`
`
`
`
`
`
`Tcdmuiugv thi.’
`by9‘0
`#de
`BEAM 7.» Pitch fnnt)
`MPH/ASIC 93 Fifth (mu)
`
`MPU Pi'imed Cale Lengrh (my)
`
`MPU Pints-fad Gate Length {um}
`Wafer minimum imif'pircil r’nmi
`Wig/"er minimmn iinc (nm. in resisii [A]
`Wafi’r minimum Jim? (mn pm! (4:.i1)
`
`
`Wafi’r minimum cranium hoie (um. pm! etch}
`
`Magnification 1'B]
`Musk meinui' image size (nmJ [C]
`Musk minimum priming-[feature size [D]
`Musk OPCfi’umrc size mm) cimr
`Musk srib-Jmaimiortf'mnn'e size (Hm) opaque {E}
`
`
`
`
`
`
`
`CD unifin'miiy ai'z'rlc‘tmrm to mask (aunmpfirm)
`Miji’ isoiuicd iirm; binmjv [G]
`CD trni/in‘miiv (nm. 3 sigma) iwimcd iines
`(MPH gum), binary musk [H]
`MEF isoicned iinej', riiier'nuiing phm‘c shifl [6}
`CD trni/brmiiv (nm. 3 sigma) imiaicd iines
`(JWPU gates}, uiiermfling phm‘a xiii]! mask [1]
`MEI“ dens-c fines [G]
`CD (mi/hrmiflr (mu, 3 Sigma) dense iimw (DRA‘M half/finch),
`binary or um’mruwd pimsy .sirifl maxi: [J]
`MEF crmracis' {G}
`CD trni/brmig‘ (nm. 3 sigma; wanna/vim [K]
`Unearth: mm) [L]
`
`
`Dqfl’m .tizr.’ (nm) [N] *
`
`.S'uhxrl'mcfiu'mjimmy
`152 X 152 X 6.35
`
`Biankfiaim’sx (Hm. peak—vuiiqr} {0]
`Trum'misxirm Imifm'uufi‘ in mack
`fpcmch’ and c'icui‘jéumm) (1% 3 sigma}
`Dam x-wimm’ r03; [P]
`Mask design grid (mu) [Q]
`"i779 requirement? urcfin‘criiicai iql’ers a: dqfincdj'car. Emir vaiumes are assmm'd m be reialiveb‘ smuir’ umiI diffimir .ru produce.
`”30 degree pirate eight“ are 70% (Iflmmhw' shown.
`
`LT:
`'
`0‘: L'
`I} .‘r._'_'.u
`a Extra (.'
`M my! ur M’whmm ’m: m} Vimrrra mm 1d
`Mannfacmrrrhie A‘uimirmx are known
`interim .miminm are kmm-‘n
`Mamgfflflm‘ahie xniuiiwrx are N(}Tf(mJu-‘n
`
`THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS: 2003
`
`CARL ZEISS V. NIKON
`|PR2013-00362
`
`EX. 2003, p. 11
`
`CARL ZEISS V. NIKON
`IPR2013-00362
`Ex. 2003, p. 11
`
`

`

`10 Lithography
`
`Table 79a Optical Mask Requirements (continued?
`
`Year of'l’rtxluetion
`2003
`2004
`2005
`2006
`I
`200?
`2008
`June
`Teetumloxl' Node
`iip90
`ltp65
`DRAM ‘/_‘ Pitch lnm)
`MPU/ASIC 95 Pitch (Hm)
`
`MPU Printed Gate Length {nnt}
`
`MPU Pitvsidtl Gate lengthI {tun}
`Attenuated PSM transmission mean deviation
`flout target ti % {)fh’fl'gel) [it]
`Attenuated PSM transmission uni/ornate
`li% oftarget} [R]
`Attenuated PSM phase mean deviation
`ji'ont lh'U" {1" degree) [5]
`Alternating PSM phase mean deviationfrom
`nominal phase angle target l8 “ degrees (1‘ degree) [5]
`
`Alternating FEMphase unflin‘ntile (idegi'ee) [T]
`
`Nominal reflmttvitl‘ t%) {U}
`
`it.
`d. hi
`i.
`t’ '
`Mstl-
`m mu mu “m m i m H
`
`Strategyfor pmteetiug mashfl'nnt defilets
`
`Absorber on fused silica, except for 157 nm optical that will be absorber on fluorine
`..
`doped. low DH fused Slllca substrate.
`Modified fused silica pellicles
`have demonstrated feasibility for
`15'!- nm scanners, and removable
`pellicles might be useful for small
`lot
`production.
`Research
`continues on organic membrane
`pellicles materials in a search for
`viable solutions.
`
`Pellicle for optical masks down to 193 nm.
`
`Primary F'SM choices are attenuated shifter and alternating aperture
`(Exposure l00l dependent)
`The requirements areforeriticai layers at delinwllwar. Early volumes are assumed to he relutlveiv small and difl’ieult to produce.
`l8l) degtee phase defects are 70% ofnttmher shown
`
`Mantdacturahle solutions exist. and ate being optimized
`Manufactnrahle solutions are known
`interim solutions are known
`Man ufitettrraltle solutions are NO T known
`
`Notesfor Table 79a—Qitieal Mask requirements:
`[A] Wafer Minimum Line Size—Minimum lt-‘ufi’t‘ line size imaged in resists. Line size as drawn or printed to zero bias {Most commonly applied to
`isolated lines. Drives CD uniformitv and litteat‘lfl’.)
`[B] Minniticution—Lithography tool reduction ratio. Ml.
`[C] Mask Nominal i'mag ’ Size— Equivalent to 1I’afer tninintumfeature size in resist multiplied by the tnaslt reduction ratio iL'iiielt equals 4X
`[D] Mask Minimum Primarv i-‘eature SizeiMinimum printable flwure afier OPC application to he controlled on the ntasltfor Cl) placement and
`dq‘ects.
`[E] Mash Stilt-Resolution F(‘ature Sizeilite minimum width ofisolated Iton-printingjeatures on the mash such as sub-resolution assistfeattnes.
`[r] image Placementi The maximum component deviation (X or Y) ofthe array ofthe images centeriine relative to a defined rekrenee grid after
`removal of isotropic magnification error post pelliele mount. These values do not comprehend additional image placement ermr induced by pelliele
`mount and mash clamping in the esposure tool.
`[G] The CD ermr on the wafer is directly proportional to the CD error on the mast: where mash error actor (MEI-l is the constant ofproportionalitv.
`An MEF mine greater titan unity therefore inumses a more stringent CD uni/oimitv requirement on the mask to maintain the CD uniformity budget on
`the wit er.
`[Hf CD Unifitrmity—i‘he three-sigma deviation ofaetual image sizes on a mashfiira single size and tone criticalfeature. Applies tofeatures in X and Y
`and isolatedfeatures on a binaty mask.
`[t] CD Uniformittgthe three-sigma deviation ofactual image sizes on a musltjor a single site and tone eritiealfeattrre. Applies to_ eatures in X and Y
`and multiple pitch features on a quartz shiflrer phase mask.
`[J] CD Unilot‘mitv—The three-sigma deviation ofaetual image sizes on a tnashjiir a single size and tone erltlcalfeuture. Applies tojeatures in Xand Y
`and multiple pitehfi’atures on a lllnatji or attenuatedphase sitifl much.
`1"K} Ci) Uniformity—The three-sigma deviation ofsquare mot ofcontoct area on a mass thmugh multiple pitches.
`
`THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS: 2003
`
`CARL ZEISS V. NIKON
`|PR2013-00362
`
`EX. 2003, p. 12
`
`CARL ZEISS V. NIKON
`IPR2013-00362
`Ex. 2003, p. 12
`
`

`

`Lithography
`
`11
`
`1’L} Lineuritr—Maximum deviation between mask "Mean to lat‘get " [hr a range ot'ieurures ofthe same tone and (lilierent design sizes. This iueltttles
`features that are equal to the stttallest stthiresrfltttiott assist maskfeature and up to three titties the tttittt‘tmtttt mt er ltalf'pitclt tnultiplieaf by the
`tttagnijicatt'on.
`[M] CD Mean to Target—The tnta‘intttttt difference bent-wen tlte awrage ofthe tJi('Ct.\‘ttt‘(?£lfl£utttl‘€ si:es and the agreed tojeatttre size ldcsigtt six).
`Applies to rt singlejeatrtre size and tone. HAetual- Tammi/Number Qfmcrtsurements.
`[N] Defect Sise—A tttask defect is an)J unintended mask anomaly that prints or changes a printed image size by ”3% or tttore. The mask detect size listed
`in the madmap are the square root ot'the area attire smallest opaque arclear "defect " that is expected to pt‘lmfitt‘ the stated generation.
`[0} Blank flatness—Flames: is ttanometetts. peak-to-valley across the l if! not: Xi l0 ntttt central area itttttgefield on a 6-inch xii-inch square mask
`blank. i-‘latncss is derivedfrom wafer lithography DO!“ requiretnenafbr each nix/lei
`[P] Dara Volume—This is the expected ntmitmmtfile sizefiir ttttt'ompressecl elrtrrtfitra single layer as presented to rt raster write tool.
`[Q] Mask Design GridiWafi‘rdesign grid mttlthtlt'ecl by the mask magnification.
`[R] Transtttissittn—thtin, expressed in patent rtl'titefl'ctt'tiun (if-light passing thrmtglt an attenuated P5M ltt'l‘et' relative tr) the mask blank with no
`opaqttefilms.
`[5'] Phcmei-Utang J in optical path length henreen two regions on the mask erpressetl in dcgt‘ees.
`[T] All PSM ,tJhctse ttnifltrmilv is ct trtnge specification equal to the tmuitnttttt phase et'tnt'tleviatintt rtf'any {mintfi'om the tatget,
`[U} Optitttisation of mask t'efleetivitvfin‘ wavelengths usedfor optical (laser) mask patterning verses optical inspection vetstts h-‘afer arposure is a
`recrtgttizetl issue to he addressed in the fittttt'e.
`
`Table 79.5 EU VL Mask Requirements
`
`2008
`2309
`201‘ 0
`Mi}
`Year pri‘tlditt‘liut‘t
`Mi}
`20t5
`201‘6
`2M8
`Teehtmlqg: Node
`1:1145
`hp}2
`2
`
`
`Wakr tttinimum halfpiteh (nmt
`
`Water tttinitttttttt line (tan, in resist) [A]
`Wafer minimum line (mu, p as! etch)
`
`21
`
`45
`25
`18
`15
`
`35
`20
`14
`14
`
`32
`13
`1 3
`12.3
`
`25
`1 5
`10
`10
`
`22
`1 3
`9
`3.3
`
`1 8
`1 0
`7
`7.2
`
`
`
`
`1 8
`25
`3D
`35
`5D
`Wafer tttt'nt'muttt contact hole (nut. afier etch)
`
`Generic Mask Requirements
`Magnification [B]
`Mask nominal image size (rim) [C]
`Mask minimum primary feature size [D]
`
`Image placement (11m, multi-poillt) [E]
`
`CD Unifiu'mity (tan. 3 sigma) [F]
`Isolated lines (MPU gates)
`
`114
`
`Conlactlvias
`Linearity [nm] [(3]
`CD mean 10 largel (11m) [H]
`Defect sin: (nm) [1]
`Data volume (GB) [J]
`Mask design grid (mm) [K]
`
`40
`
`Matttfitt'fltflthle solutions exist, and are being optimiz'tl
`Mattutactttmhle solutions are knmrn
`ltttet'ittt solutions are lrtm Wt?
`Man ttfuctat‘ahle salutiotts are NOT lam wrt
`
`THE INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS: 2003
`
`CARL ZEISS v. NIKON
`|PR2013-00362
`
`Ex.2003,p.13
`
`CARL ZEISS V. NIKON
`IPR2013-00362
`Ex. 2003, p. 13
`
`

`

`12 Lithography
`
`Year ot'i’tuduetion
`
`
`Tobie 791) EU VL Mask Requirements (continued)
`2008
`2009
`20m
`JUL?
`zeta
`
`zutj
`
`Mid
`
`2018
`
`—---—----
`
`50
`45
`35
`32
`25
`22
`i8
`DRAM 93 Pitch {am}
`57
`
`
`
`
`
`30
`
`24
`
`23
`
`19
`
`18
`
`14
`
`20 Maximum aspect ratio of absorber stack
`
`E U VL-specific Mask Requirements
`Substrate defect size (um) [L]
`Mean peak reflectivity
`Peak reflectivity uniformity (“A 3 sigma absolute) U 42% 0.35% 0.30% 0.24% 0.48%
`Reflected centroid wavelength uni Family (nm 3 sigma) [M-mmmmmmm
`—nnmmmmnm
`0.5
`0.5
`0.5
`Absorber sidewall angle tolerance (1 degrees)
`0.62
`0.5
`Absorber LER (3 sigma nm) [N]
`2.5
`90
`Mask substrate flatness (nm peak—lo—valley) [O]
`45
`40
`
`3
`30
`
`2
`25
`
`2
`
`Mantif