`
`INNOLUX CORPORATION V. PATENT OF SEMlCONDUCTOR ENERGY
`
`LABORATORY CO., LTD.
`
`|PR2013-00066
`
`
`
`US005684555A
`5,684,555
`[11] Patent Number:
`[19]
`Ulllted States Patent
`Shiba et al.
`[45] Date of Patent:
`Nov. 4, 1997
`
`
`[54] LIQUID CRYSTAL DISPLAY PANEL
`
`FOREIGN PAFENT DOCUMENTS
`
`[75]
`
`Inventors: Kouichi Shiba, Himcji; Ryuji Thdn,
`H
`kc
`both f I
`y°go_ n’
`0
`apan
`[73] Assignce: Kabushiki Knish: Toshiba, Kawasaki,
`Japan
`
`“*"“3° M992 *9“-
`Pnma'ry Examme'r—Wi11iam L. S1kcs'
`A-‘Si-W0‘ Ex0W'fl€I'—Jl11i¢ N80
`Attorne); Agent, or Firm—Cushman, Darby & Cushman ]P
`Group of Pillsbury Madison & Sutro LLP
`
`[57]
`ABSTRACT
`[21] Appl. No.: 574,193
`panel in which
`The preselmt inwzention is to Provide an
`[22] Ffl°d‘
`Dec‘ 18’ 1995
`tlfe elfefdxve dnsplay arca 1s
`1-clatlvc to the outslde
`[30]
`1:-0m;gnAppficafi0n Priority Data
`d1mcns1o11.b':he LCD pafitélcompnses anlgrrayglbsu-ate, a
`6.314815
`Dec 19 1994
`UP]
`I
`countusu tratcanda‘
`tmodulatmg yer
`tainedby
`-
`s
`‘Pm ~~~~~~~~~~~~~~--~
`§l';g:°:;‘a%y“gl““dfigfféggmnfifsgmgi
`[511
`Im. Cl.‘ .............. Gmr 1/135; Go2F 1/1345;
`hm"
`,
`_
`, 1° °
`GOZF 1/1339
`f°‘m°f‘ “‘°““‘1 “.‘° “‘§P"’Y ““?’* '.“‘° "“?“‘V 3”“ “‘°"“°"‘
`[52] U.S. Cl. .........., 3491149; 349/42; 349/153;
`gum lmcg, S g ‘]i1m.:s,ls:lr1tch1°I;g6 devmcs conlrollsddfti
`349/154
`The sealmgfcflz iI1)1gfIdese§1:‘1rst 332:1; line ;)n?§mmd
`[581 “dd °‘ s°"’°" **************M 359'“ 3°’ 59‘
`by a plurality of narrow lines and arranged along the seal
`349/42’ 153’ 154’ 149
`New cm :2-
`U.S. PKFENT DOCUMENTS
`tween.The counter substrate is adhered to the array substrate
`,
`in the seal region. A voltage is supplied to the counter
`§:i1‘;§2é 21% §‘.;‘:‘7:“,if:‘::‘.;;:::::: 3323 Mode Web we first We Hm-
`5,S10,9l8
`4/1996 Malsunagactal.......... 359/88
`5,519,521
`5/1996 Okimoto at al.......... 359/59
`
`30 Claims, 4 Drawing Sheets
`
`:56]
`
`
`F“'F"!“Fi
`.
` “E'.i'EiF'
`
`
`'.5.‘l'§l'.-5'.l'.E'.lF'
`
`
`
`
`
`
`
`
`
`CMI Exhibit 1003
`1
`
`
`
` fii:‘:5%“”‘7vz=r-i'=rz7:i-n-E77125
`
`a@.i'5"E"E"E'i'.?:3.i'2'aE: 7.8%
`L
`
`
`
`7117'?
`
`713 744 7:5 746
`FIG.
`
`I
`
`717 748
`
`an
`
`CMI Exhibit 1003
`2
`
`
`
`U.S. Patent
`
`Nov. 4, 1997
`
`Sheet 2 of 4
`
`5,684,555
`
`CMI Exhibit 1003
`3
`
`
`
`U.S. Patent
`
`Nov. 4, 1997
`
`Sheet 3 of 4
`
`5,684,555
`
`CMI Exhibit 1003
`4
`
`
`
`
`
`5,684,555
`
`1
`LIQUID CRYSTAL DISPLAY PANEL
`
`BACKGROUND OF THE INVENTION
`
`1. Field of the Invention
`
`The present invention relates to a liquid crystal display
`panel for displaying an image in information equipment.
`2. Description of the Related Art
`In recent years, flat panel displays, represented by an LED
`panel (Liquid Oystal Display panel), are used for various
`purposes, for example, a display of a personal oomputq or
`a word processor, a TV display or a projection type display,
`making use of the characteristics of light weight,
`thin
`package size and low powa consumption.
`In particular, an active matrix LCD panel. in which a
`three—tcrminal non-linear element is used as a switching
`device of each pixel electrode, has been researched and
`devdoped actively, since a satisfactory image display can be
`achieved without a crosstalk between adjacent pixels.
`AstrucuneofanactivematrixLCDpanelofalight
`transmission type will be briefly described below.
`An active matrix LCD panel is Irma as follows. An
`array substrate and a counter substrate are arranged so as to
`face each other with a predetermined gap therebetween and
`sealedwithasealingmemberontlieperipheryofthe
`substrates. Liquid crystal material for forming a light modu—
`lating layer is injected into the gap thus fmned between the
`substrates. Osientation films have been coated in advance on
`those surfaces of the array substrate and the counter sub-
`strate which are in contact with the liquid crystal material.
`The array substrate is formed as follows. A plurality of
`datalines and aplurality ofscanning lines arearranged so
`as to cross each other on a glass substrate. A'l'FI‘(Thin Fil.m
`'lransistor)isformedneareachoftheintersectionsofthe
`datalinesandt:hescanninglines.Apluralityofpixel
`electrodes made of 1T0 (Indium Tin Oxide) are formed
`corresponding to the respecive regions defined by the data
`lines and the scanning lines. Each pixd electrode is con-
`nectedtothedatalinethnoughfl1ecorrespondingTFI‘
`serving as a switching device. Storage capacitor lines are
`arranged in parallel with the scanning lines on the glass
`substrate. An insulating layer is formed between the stcrage
`capacitrr lines and the pixel electrodes, so that storage
`capacitance is constituted between the storage capacitor
`lines and the pixel electrodes.
`The counter substrate is formed as follows. Alight shield-
`ing layer is formd on the glass substrate in order to shield
`the TFI's and the pixel electrodes and a region around them.
`Aoounterelectrodemade oflroisformcdabovethelight
`shielding lays with an insulating film intaposed therebe~
`tween. The counter electrode is connected to wiring lines
`formed on the array substrate through a transfer material
`made of resin in which conductive particles, such as S'i.i'V€1'
`particles, are dispased.
`A driver circuits board, for supplying driving voltages to
`the pixel electrodes and counter electrodes, is arranged
`adjacent to the array substrate. The driver circuits board and
`thearray substraneareconnectedto eachothu-withanFPC
`(flexible print circuit) or a TAB (tape automated bonding) in
`Whidl an active device is arranged on the FPC. Itis possible
`that driver circuits are formed directly on the array substrate.
`Intheact:ivematrixLCDpane1.itisrequiredthattherat:io
`ofanefiectivedisplayareatotbe outside dimension ofthe
`panel should be as great as possible. For example, Jpn. Pat.
`Appln. KOKAI Publication No. 4478630 discloses a tech-
`
`10
`
`25
`
`35
`
`45
`
`2
`nique for reducing the area, in which the sealing agent is
`flown out, by a sealing agent stopper having a step formed
`along the seal region provided between the etfective display
`area and the seal region. With this structure, the width of a
`boundary region between the etfective display area and the
`sealregion canbe setsmall, sothattheratioofthe elfective
`display area to the outside dimension of the panel can be as
`great as possible.
`Further, to satisfy the above requirement, it can be con-
`sideredtorednce the width ofthe seal regionortoreduce the
`area of a portion around the seal region. However, if the
`Width ofthesealregionisreduced, the strength ofadhesiou
`between the array substrate and the counter substrate is
`lowered. This causes various problems: for example,
`removal of the sealing agent itself or the sealing agent
`accompanied with a thin film deposited on the array sub-
`strate.
`
`SUMMARY OF THE INVENTION
`
`The present invention has been made in consideration of
`the above problems. Accordingly, an object of the present
`invention is to provide an LCD panel, in which the width of
`a seal region can be reduced without lowering the strength
`of adhesion between the two substrates. Another object of
`the present invention is to provide an LCD panel which is
`connectedtodrivcrcircuitson onlytwo sides oftheLCD
`panel, so that the ratio of the eifective display area to the
`outside dimension of the panel can be great.
`According to the present invention. thae is provided an
`LCD panel eomgrising:
`a first substrate including a display area, a seal region
`formed around the display area, and a peripheral region
`foanedaroundthe sealregion, the display areainclud-
`ing pixel electrodes, and the seal region including a first
`
`wiring’'
`linewhicl1isconst1tuted' byaplurality ofnarrow
`lines arranged along the seal region;
`a second substrate including a counter electrode, to which
`a voltage is applied through the first wiring line, the
`second substrate being arranged opposite to the lirst
`substrate with a gap interposed therebetween and
`adhered to the first substrate in the seal region; and
`a lightmodulafing laya held between the that and second
`substrates.
`In the present invention, the first wiring line arranged in
`thesealregioniscoustitutedby apluralityofuarrowlines
`to increase the elfective adhesion area between the sealing
`agent and the first substrate. Therefore, even if the width of
`the seal region is narrow, required adhesion strength am he
`ensured.As aresult, the outside dimension ofthe LCD panel
`can be small.
`In addition, since the first wiring line is formed along the
`seal region, a voltage can be applied to the counter electrode
`through the tirst wiringline fromaplurality of desired points
`of a paiphaal portion of the first substrate. For this reason,
`it is only necessary that a driving circuit for applying a
`voltage to the counter electrode is connected to at least one
`side of the LCD panel.As aresult, the outer dimension of the
`LCD panel can be small compared with the etfective display
`area.
`
`Ifthe iirstwiringlineis dividedintoatleastthree narrow
`'
`lines in me seal region,
`the advantage of increasing the
`eifective adhesion area can be obtained.
`Thecounterelectrode mnbe eonnectedto thetirst wiring
`line through connecting members arrangedbetween the first
`and second substrates outside or in the seal region.
`Further,par1:ofthe narrowlines ofthe firstwiring line can
`be arranged in a boundary region between the seal region
`
`CMI Exhibit 1003
`8
`
`
`
`5,684,555
`
`3
`andthedisplayarea, aswellasinthesea1region.Withthis
`structure, the sealing agent is prevented from flowing out of
`the seal region to the display area.As a result, the width of
`the boundary region between the seal region and the display
`area can be small.
`
`lhzrthuxnore, the second wiring line drawn out of the
`display area across the seal region may be constitumd by a
`plurality of narrow lines, like the first wiring line. In this
`case, the amount of the sealing agent flowing along the
`second wiring line can be reduced
`Instead of dividing the that wiring line into narrow lines,
`aplurality of openings maybef%d alongthe longitudinal
`direction of the first wiring line, so that the efieetive adhe-
`sion area between the sealing agent and the first substrate
`can be increased.
`Additional objects and advantages of the invention will be
`setforthin the description which follows, andin partwillbc
`obvious from the description, or may be learned by practice
`of the invention. The objects and advantages of the invention
`' may be realized and obtained by means of the instrumen-
`talities and combinations particularly pointed out in the
`appended claims.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`Theaccompanying drawings,whichareincorporatedin
`and constitute a part of the specification, illustrate 1:-esently
`pefaa-ed embodiments of the invention and, together with
`the general description given above and the detailed descrip-
`tion of the preferred embodiments given below, serve to
`explain the principles of the invention.
`FIG. 1isaplanviewofanac1ivematrixI.CDpane1
`awarding to an embodiment of the present invention;
`FIG.2is aplanview ofpartotthedisplayarea arranged
`on the array substrate of the active matrix LCD panel shown
`in FIG. 1:
`
`FIG. 3 is an enlargedvicwofpartofaregionAofthe
`active matrix MID panel shown in FIG. 1;
`FIG. 4 is a caoss-sectional view ofpart ofthe activematrix
`ILD panel shown in FIG. 3, taken along the line a—a';
`FIG. Sisanenlargedvicw ofpaztofaregionllofthe
`active matrix MID panel shown in FIG. 1;
`FIG. 6is a cross-sectional view ofpart ofthe adivematrix
`LCD panel shown in FIG. 5, taken along the line b—b';
`FIGS. 7A and 7B are schematic diagrams showing states
`of the flown-out sealing agent along connecting wires, in
`which FIG. 7A shows a conventional art and FIG. 7B shows
`the present invention; and
`FIG. 8 is adiagmmshowingawilinglineinwhicha
`plurality of openings are framed along the longitudinal
`direaion.
`
`DETAILED DESCRIPTION OF THE
` D EMBODIMEQH‘
`
`FIG. lis aplanview showing anactivematrixLCDpanel
`ofalight transmissiontypeaccoading to an embodiment of
`the present invention. An active matrix LCD panel 100 is
`comprised of an array substrate 200, a counter substratesfl,
`anXdriverci1'cuitsboard8O0,aYdrivercircuitsboard900,
`and so on. The panel 100 includes a display area 103 having
`a diagonal of 14 inches.
`FIG.2isaplanview showingpartofthedisplayareal03
`arrangedontheatray substra.te200.640)GdatalinesX,
`(i=1, 2, 3, . . . 1920) and 480 scanninglinesY,j (i=1, 2,3,
`. ..480)arean'angedperpendiu1lartoeachotha onaglass
`substrate 201. TFl‘s 221 are formd near the intersections of
`
`10
`
`15
`
`35
`
`45
`
`55
`
`65
`
`4
`the resptxtive data lines and the scanning lines. Each scan-
`ninglineY.isusedas thegate electrodeofa'l‘FI‘221. Each
`dataline
`is connectedtoapixelelectrode251viatheTFl‘
`221. Further, storage capacitor lines C1. are arranged parallel
`with the scanning lines Y, under the pixel electrodes 251
`with insulating film interposed therebetween, so that storage
`capacitance is constituted by the pixel electrodes 251 and the
`storage capacitor lines C,
`FIG. 3is an enlarged view ofpartofaregionA ofthe
`activematrixICDpanelshowninFIG. 1.PIG.4isa
`cross-sectional view taken along the line a—a' in FIG. 3.
`As shown in FIG. 4, the scanning line Y, and the storage
`capacitorline(;arefcrrnedontheg1ass substrate 2fi1.The
`scanning line Y, itself is used as the gate electrode of the
`TF1‘ 221.A gate dielectric 211, having a laminated structure
`of silicon oxide and silicon nitride. is formed on the gate
`electrode Y, A channel 213 made of amorphous silicon
`(a-Si:H) is formed on the gate dieledzic 211. A channel
`protecting layer 215 made of silicon nitride is fornmd in
`alignment with the gate electrodeY_,~ on the channel 213. A
`sotnoe electrode 231 is formed above one end portion of the
`channel 213, with a low—resisIance semiconductor layer
`217:: made of an n"-type amorphous silicon interposed
`therebetween. A drain electrode 233 is formed above the
`other end portion of the channel 213, with a low—resistance
`semiconductor layer 2171: made of an n*-type amorphous
`silicon interposed therebetween. The drain electrode 233 is
`aline dividingfromthe datalineX,andfonned as partof
`the data line X, (FIG. 2). A protective overcoat 241 made of
`silicon nitride is arranged on the TFI‘ 221 and around the
`pixel electrode 251. The array substrate 200 is formed in the
`manner as has been described above. Further, an orientation
`film281is coatedontheatray snbstratezoo.
`A light shielding mania layer 511, made of drrornitnn
`(Cr), is formed on the glass substrate 501. Colcrfilters 521,
`corresponding tothe threeprimary colors ofred, green and
`blue, are arranged in the light shielding layer 511. The light
`shielding laya 511 shields a region above the TF1‘ 221, a
`region betweenthedatalinex,-andthepixel electrode and
`a region between the scanning line Y) and the pixel elec-
`trode.Afilterprotecti.nglaycr531is fonmdon thelight
`shielding layer 511 and the color filtus 521. A counter
`electrode541madeofII‘0isformcd onthefiltrrpaobding
`layer531.'l‘hecountc.rsnbst:ate500isformedinthemanner
`as has been described above. Fnrtha, an orientation film 581
`is coated on the counter. substrate 500.
`Thealray substrate200andtheoounter substi-ate500are
`arrangedsoastofacecachotherwithaSnmgapthexebe-
`tween. The substrates are adhered to cad: other with a
`sealingagent113inasea1region(111 inFIG. l)intheir
`pefipheral portions. Anematic liquid crystalrnaterial60O is
`injectedintothegap thusformcdandservesasalight
`modulating layer. Polarizing filters 291 and 591arerespec-
`tivelyadheredtotheouta'surfacesofthea1raysubmte20O
`andtheoonnter snbsn-ateSOO.1n themanncras described
`above. the active matrix LCD panel is formed.
`To reduce the outer dimension ofthe overall adive matrix
`LCDpanelaccoi-dingto the present invention. thedatalines
`X, are drawn out fromonly afirstlonger side 291a, while the
`scanning lines Y} are drawn out from only afirst shortrr side
`201c. Further, as shown in the enlarged view of FIG. 3, the
`datalinesX,axeconnectedtodataliuepads761to764
`arranged along the first longer side 201a. Similafly, the
`scanninglinesY_,.m‘econnectedto scanninglinepads(not
`shown) arranged along the tirst shorter side 201a.
`AsshowninFIG.3,thedatalinepads761to764are
`exposedthroughas1it2A3formedintheprotectiveovercoat
`
`CM! Exhibit 1003
`7
`
`
`
`5,684,555
`
`5
`241. The data line pads 761 to 764 are electrically connected
`tooutputleads 821 ofawi1ingfilm711 viaanauisotropic
`conductive film 881 (FIG. 4). Input leads 831 of thewiring
`film711 are soldcredto theXdrivercircuits board800. In
`thismanner,allthedatalinesX,areconnectedtotheX
`driver circuits board 800 through the eight wiring films 711
`to 718, respectively.
`likewise, the scanning line pads (not shown) are exposed
`through a slit formed in the protective ovaccat 241. The
`scanning linepads are electrically eonnectedtooutputleads
`of wiring films 721 to 724 (FIG. 1) via an anisotropic
`conductive film881 (FIG. 4). Input leads 831 ofwiring films
`721 to 724 are solderedto theYdr1’ver circuitsboard900.
`Inthismanner, all thescanninglinesY,areconnectedtothe
`Ydriver cirurits board9tlOtlrroughthefourwir:ing films 721
`to 724, respectively.
`In the aforementioned LCD panel. to reduce the ampli-
`tude of the signal data voltage, it is necessary to perform
`frame inversion drive for inverting the polarity of the
`potential of the counter electrode with respect to the refer-
`ence potential in every frame period, or line inversion drive
`for inverting the polarity of the potential of the counter
`electrode with respect to the reference potential in every
`horizontal scanning period or pcriods. In fliis case, since the
`countere1ectrode541madeofl.'I‘Ohasarelat:ivelyhigh
`resistance, it is desirable that voltages are applied to the
`counter electrode 541 from a plurality of sources arranged
`around it.
`
`Forthis reason, according tothis embodiment,as shown
`inFIG. 1,fourpowersupplypads731 to734arear:ranged
`along the first longa side 201a and four power supply pads
`735 to 738 are arranged along a second longer side 2011:, in
`a region outside the seal region 111 on the array substrate
`200.The power supply pads 731 to 738 are exposed through
`slits245 (FIGS.3and5) fcrrmedintheprotectiveovercoat
`241. On the side of the counter electrode 541 foamed on the
`counts sutstr-ate 500, connecting projections 741 to 748
`corresponding to the power supply pads 731 to 738 are
`formed. As shown in FIG. 4, the power supply pads 731 to
`738 are electrically connected to the connecting projections
`74lto748viaa uansfermaterialllsmade ofrcsininwhich
`silver particles are dispersed.
`Avoltage is supplied to the power supply pads 731 to 734
`arranged along the first longer side 2912 from the X driver
`circuitsboard800lhroughwiringfi.lms 711,713,7l6and
`718 connected to the first longer side 201a, in the following
`manner. As shown in FIG. 3. an output lead 821:: of the
`wiring film 711 is connected to a common pad 751 on the
`arraysubstrate 200.'l‘he eommonpad751is oonueaedto
`the pawn supplypad 731 through a third wiring line 121-1.
`Thus, a voltage is supplied to the power supply pad 731
`through anoutennostinputlead831aofthewiringfilm711.
`Similarly, as shown in FIG. 1, a voltage is supplied to the
`power supply pad 732 from an outermostinput lead oftlre
`wiring film 713 through a third wiring line 121-2, to the
`power supply pad 733 from an outumost input lead of the
`wiriugfilm 716 through a
`line 121-3, andto the
`power supply pad 734 from an outermost input lead of the
`wiring film 718 through a third wiring line 121-4.
`Ontheotherhand, sinceadrivcrcircuitsboardisnot
`arranged near the second longer side 2011:, a voltage is
`suppliedtothepowersupplypads735 to738arrangedalong
`the second longer side 2011:, in the following manner. As
`shownin FIG. 3, the output lead 821a ofthe wiringfi.lm711
`is connected to the common pad751 on the array substrate
`200. A second wiring line 123-1 is drawn fromthe common
`
`5
`
`10
`
`15
`
`20
`
`35
`
`45
`
`55
`
`6
`pad 751 and divided into live narrow lines (width: 20 um,
`interval 20 pm) outside the seal region 111. The second
`wiring line 123-1 is guided across the sealregion 111 (width:
`1.5 mm) to an interconnecting pad 125a formed inside the
`seal region 111. A first wiring line 127 is drawn from the
`interconnecting pad 125a and divided into six narrow lines
`(width: 20 run, intaval: 20 pm). As shown in FIG. 1, the tirst
`wiringline 127isguided alongaseeondshorterside 201d
`to the second longer side 201b, and connected to the power
`supply pads 735 to 738 through a branch wiring line. Then,
`thefirstwiringline 127 is guidedalong thefirst shorter side
`201a to the first longer side 201a, and the narrow lines meet
`together at an interconnecting pad 1251;. Thereafta‘. the first
`
`v/mug’'
`line 127 is divided into five narrow lines, servrn‘g as
`second wiring lines 123-4, which are guided across the seal
`region 111 and connectedto outputleads offlre wiring film
`718 via the common pad. In this way, a voltage is supplied
`through the wiring films 711 and 718 to the power supply
`pads 735 to 738 ananged along the second longer side 201b
`from the X driver circuits board 800 locatedin proximity to
`the first longer side 20111.
`As shown in FIG. 3, four narrow lines of the first wiring
`line 127 are located in the seal region 111, the other two
`narrow lines thereof are located in a boundary region
`between the seal region 111 and the display area 103.
`InthecasewhereTI-Ts ofbottomgatetypeare usedas
`switchingdevices asinthe above embodiment,thepow¢:’
`sugply pads 731 to 738, the common pad 751, the flrird
`wiring lines 121-1 to 1214, the inter-connecting pad 125a,
`and 1251» the second wiring lines 123-1 to 123-4, and the
`fitstwiringlinel27canbef<x'medinthesamestep0f
`forming the data lines X,. The structure of the present
`invention, therefore, does not increase the number of manu-
`factming steps. Frnther, depending on the kind of the 'l'FI‘s,
`the afcrementioned wiring lines can be formed in the same
`step of forming the scanning lines Y’.
`Moreover, the first wiring lines 127 may be formed in the
`stepoffonningthescanninglinesY,andthedatalinesX,.,
`respectively, thereby constituting a two-layered structure. In
`this case, if the layers are partially connected to each other,
`the wiring defect can be prevented and the manufacturing
`yield can be improved.
`In the above embodiment, the voltage is supplied to the
`counter electrode 541 only from the X driver circuits board
`800throughthewiringfilmsandthedatalinepads.
`However, a voltage can be additionally supplied from the Y
`drive’ circuits board 900 to the counter electrode 541.
`Fruther, in the above embodiment, the first wiring line 127
`is arranged along the sealregion 11 on the three sides 201b,
`2014-: and 201d of the array substrate. Howeva, if the first
`wiringline 127isarrangedonatleast one side ofthe array
`substrate, the advantage of the present invention can be
`achieved to a certain extent.
`
`Furthermore, in the above embodiment, the X and Y
`drivercircuitsfill and911areprovidedontheboards800
`and900difl‘a*entfromtheLCDpane1100andtheboards are
`conneaed to the LCD panel 100 through the wiring films
`711 to 718 and 721 to 724. However, the driver circuits can
`be directly formed on the array substrate 200.
`In the above embodiment, the first wiring line 127 is
`constituted by a plurality of narrow lines. However, a
`plurality of openings 131 may be formed in the that wiring
`line along the longitudinal direction, as shown in FIG. 8, so
`that the effective adhesion area bdween the sealing agent
`113andthean-ay substrate200canbeincrcased.
`Advantages of the present invention will now be
`described.
`
`CMI Exhibit 1003
`8
`
`
`
`5,684,555
`
`7
`(:1) According to the present invention, the first wiring line
`127 is arranged along the seal region 111 and the
`voltage is supplied to the count: electrode 541 through
`a plurality of power supply pads 731 to 738 lranched
`fromthe wiringline. As aresult, ashas been described
`above, the voltage can be supplied frcrn the X driver
`cirerritsboardanangedinproximitytothefirstlongd’
`sidezolathroughtlreflrstwiringline 12‘7tothepower
`supply pads 735 to 738 arranged along the second
`longer side 201b. With this structure, the data lines X,
`are drawn out of the first longer side 201a of the array
`substrateandthe smnuinglinesY,are drawnoutofthe
`first shorter side 281e, so that the array substrate 200 is
`connectedtotheXorYdrivercireuits board800 or90O
`only at the first longer side 2011: and the first shorta
`side 201c of the array substrate. As a result,.the outside
`dimension ofthel£Dpanel lflcanbe stnallrelative
`to the display area 103.
`Since the first wiring line 127 is constituted by narrow
`lines and some of thetn are arranged in the seal regon 111,
`while the other are arranged in the boundary portion
`between the seal region 111 and the display area 103 (FIG.
`3).thefirstwiri.ng1ine127doesnotcauseaniner-easeofthe
`outside dimension of the LCD panel 100.
`In addition, since the voltage can be supplied to the
`count: electrodesflfirorndesiredpoints on thepen'plrery
`ofthe an-ay substratezflthrough thefirstwiringline 127
`and the power supply pads 731 to 738, various driving
`methods, such as frame invasion drive or line inversion
`drive, can be applied satisfactcnily.
`(b) Since the first wiring line 127 arranged along the seal
`reg'on 111 is constituted by a plurality of narrow lines
`(FIG. 3), the etfective adhesion area between the seal-
`ing agent 113 and the array substrate 200 is relatively
`large. For this reason, the width cfthe seal region 111
`can be reduced without a risk ofretnoval ofthe sealing
`agent 113 fronrthe array substrate 200. As aresult, the
`outside dimension of the LCD panel 100 can be
`reduced.
`
`Intlreaboveembodiment,thefirstwiringline127is
`constituted by six narrow lines having the 20 prnwidth and
`four of them are ananged in the seal region 111. However,
`ifatleasttirreenarrowlinesofttrefirstwiringlineare
`arranged in the seal region 111, the advantage of increasing
`the effective adhesion area can be obtained.
`
`10
`
`15
`
`35
`
`45
`
`(c) Since thefirstwiringline 127isconstitutedbya
`pltn-ality of narrow lines as shown in FIG. 6, the
`protective ovacoat 241 and the gate dielectric 211 are
`directlyconneetedtoeachothtrthroughthegap
`betweenthenarrcwlines.Asaresult,tlrerislrof
`remcvalofthetirstwiringline lzltogethcrwiththe
`sealing agent 113is reduced. Accordingly, the degee of
`freedomofselectingmaterialofflre sealing agent 113,
`depending on the adhesion capacity, can be increased.
`(d) Sincepartofthefirstwiringl.ine127isan'angedinthe
`boundary region between the seal region 111 and the
`display area 103 (FIG. 3), the scaling agent 113 is
`prevented from flowing toward the display area 103. As
`aresult, the width ofthe boundary pcttiorr between the
`sealregion 111 and the display area lI3 can be small,
`thereby reducing the outside dimension of the LCD
`panel 100.
`(e) Since the second wiring line 123 crossing the seal
`region lllisconstitutedbyapltn-alityofnan-owlines
`(FIG. 3), the amount of the sealing agent 113 which
`flows outside the seal region 111 along the lines can be
`reduced, for the following reason If the second wiring
`
`8
`
`line 123 is fornnd on one line as shown in FIG. ‘IA, a
`large amount of sealing agent 113 will tlow outside the
`seal region along the line, resulting in that adhesion
`between the array substrate 200 may be defective and
`the counter substrate 500, 11‘ a cracker breakage ofthe
`substrate may occur in the step of cutting oil’ the array
`substrate 200. On the other hand, if the second wiring
`line 123 is divided into aplurality of narrow lines as
`shown in FIG. 7B, the amount of the sealing agent 113
`which flows outside the seal region 111 along the lines
`can be reduced. The aforementioned defect, therefore,
`can be prevented.
`Additional advantages and modifications will readily
`ocarr to those skilled in the art. Tlrerefore, the invention in
`itsbroaderaspectsis notlimitedtothespecificdctails,and
`representative devices shown and described herein.
`Accordingly, various modifications may be made without
`departing from the spirit or scope of the general inventive
`concept as defined by the appended claims and their equiva-
`lents.
`What is claimed is:
`
`1. An LCD panel comprising: pixel electrodes;
`a first substrate including a display area inwhich the pixel
`electrodes are arranged and a seal region;
`a second substrate including a counter electrode, the
`second substrate being arranged opposite to the iirst
`substrate with a gap intqposed therebetween and being
`adhered to the first substrate in the seal region;
`power supplybcing arrangedoutside ofthescalregion;
`a wiring line, which supplies a voltage from the power
`supply pad to the counter electrode, comprising a.
`pltnality of narrow lines, the wiring line extending
`toward the display area and along the seal region; and
`a light modulating layer held between the first and second
`substrates.
`
`2.TheLCDpanel accm'dingtoclainr1,whereinpartof
`thepluralityofnamowlines ofthewidnglinethatare
`arranged alongthe sulregion areatranged in the sealregbn
`andtheotherpartofthepluralityofnarrowlinestlratare
`arrangedalongthesealregion arean-angedinaboundary
`region between the seal region and the display area.
`3.'I‘heLCDpanelaccordingtoclairn1,whcreinthe
`count: eleetrcdeis connectedtothe wiringlinethrougha
`connecting member arranged between the first and second
`substrates.
`
`4. The LCD panel acecrding to claim 3, whaein the
`connecting mernbu is arranged outside the seal region and
`between the first and second substrates, and the wiring line
`includesahrandrwiringlineconnededthroughtheseal
`region to the connecting member.
`'
`5.'I’heLCDpanelacc(xdingtocla.i1n4,Wha'einthe
`branch wiring line is constituted by a plurality of narrow
`lines.
`
`55
`
`6.TheLCDpanelaccordingtc clairnl, whtreintltefirst
`substr'ateincludesadataline,ascanninglineandaswitelr-
`ing element eonnectcdto the datalineandthe scanning line.
`and a pixel electrode connected to the switching element, the
`wiringlinebeingforrnedin a stepofproducingthedataline
`or the scanning line.
`7.T'hcLCDpane1accardingtoelaim1furtherconrprising
`V at least one additionalpower supplypad.
`8.'IheLCDpane1accordingtoclaim7,whereinthe
`power supply pads are ananged along opposite sides of the
`LCD pend.
`9. An LCD panel comprising:
`pixel electrodes;
`
`CMI Exhibit 1003
`9
`
`
`
`5,684,555
`
`9
`a first substrate including a display area in which the pixel
`electrodes are arranged and a seal region arranged
`around the display area’;
`the
`a second substrate including a counter electrode,
`second substrate being arranged opposite to the flrst
`substrate with a gap intaposed therebetween and being
`adhered to the first substrate in the seal region;
`a power supply pad arranged outside of the seal region;
`a wiring line. which supplies a voltage from the pawn‘
`supply pad to the counter electrode, comrrising a
`plrnality of narrow lines, the wiring line extending
`toward the display area and along the seal region; and
`a light modulating layer held between t:he first and second
`substrates.
`10. The LCD panel according to claim 9, wherein the
`counts electrode is connected to the wiring line
`a
`connecting member arranged between the first and second
`substrates.
`11.TheLDCpanel according to clainwwherein the first
`substrate includes a data line, a scanning line and a switch-
`ing element connected to the data line and the scanning line,
`a pixel electrode connected to the switching element, and a
`storage capacitor line arranged opposite to the pixel elec-
`trode with a dielectric film interposed thaebetween, and the
`wiring line is electrically connected to the storage capacitor
`line.
`12.'1‘heI£Dpane1accordingtoclaim9furthercornpris-
`ing at least one additional power supply pad.
`13. The LCD panel according to claim 12, wherein the
`pew: supply pads are arranged along opposite side of the
`
`10
`
`35
`
`45
`
`a first substrate including a display area, a seal region
`formed around the display area, and a peripheral region
`formed around the seal region, the display area includ-
`ing pixel electrodes, and the seal region including a
`Wiring line extending toward the display area and along
`the seal region;
`a second substrate including a counter electrode, to which
`a voltage is applied through the wiring line, the second
`substrate being arranged opposite to the first substrate
`with a gap interposed thercbaween and adhered to the
`first substrate in the seal region; and
`a light modulating laytr held between the first and second
`substrates.
`15. The LCD panel according to claim 14, wherein the
`wiring line is constituted by a plurality of narrow lines.
`16.'I‘heLCDpanelacctx‘dingtoclaim15,where:lnpartof
`thepluralityofnarrowlinescfthewiringlinethatare
`arranged along the seal region are arrangedinthe scalregion
`andtheotherpartofthepluralityofnarrowlinesthatare
`arranged along the seal region are arranged in a boundary
`region between the seal region and the display area.
`17.TlreLCDpanelaccordingtoclaim15,wh<n'einthe
`oounterelectrodeis connectedtothe wiring linethrough a
`plurality of connecting members arranged between the first
`and second substrates.
`18. The IED pane