United States Patent [19]
`Koden
`
`[11] Patent Number:
`[45] Date of Patent:
`
`4,862,234
`Aug. 29, 1989
`
`Primary Examiner-Martin H. Edlow
`Attorney, Agent, or Firm-Irell & Manella
`[57]
`ABSTRACf
`A thin-film transistor comprising an insulating sub(cid:173)
`strate; an opaque metal gate electrode disposed on a
`portion of said insulating substrate; a gate insulating
`layer disposed on said insulating substrate including said
`gate electrode; and a-Si semiconductor film disposed on
`the portion of said gate insulating layer, said a-Si semi(cid:173)
`conductor film having been formed to attain self-align(cid:173)
`ment with respect to said gate electrode; a-Si contact
`fIlms constituting source and drain regions, respec(cid:173)
`tively, with a gap therebetween disposed on said a-Si
`semiconductor fIlm,
`the outer end of each of said
`contact films being formed to attain self-alignment with
`respect to said gate electrode; source and drain elec(cid:173)
`trodes, respectively, disposed on said source and drain
`regions, the thickness of each of said a-Si semiconductor
`fIlm and said a-Si contact film being 100 Aor more and
`the total amount of thicknesses thereof being 1,000 Aor
`less.
`
`3 Claims, 6 Drawing Sheets
`
`I(
`
`[54] THIN-FILM TRANSISTOR
`Inventor: Mitsuhiro Kaden, Nara-shi, Japan
`[75]
`[73] Assignee:
`Sharp Kabushiki Kaisha, Osaka,
`Japan
`[21] Appl. No.: 125,961
`[22] Filed:
`Nov. 27, 1987
`[30]
`Foreign Application Priority Data
`Nov. 29, 1986 [JP]
`Japan
`Dec. 5, 1986 [JP]
`Japan
`Int. Cl.4
`[51]
`[52] U.S. Cl
`
`61-284950
`61-291222
`HOIL 29/78
`357/23.7; 357/4;
`357/2
`357/23.7,4,2
`
`[58] Field of Search
`References Cited
`[56]
`U.S. PATENT DOCUMENTS
`4,425,572
`1/1984 Takafuji
`4,609,930 9/1986 Yamazaki
`4,746,628
`5/1988 Takafuji
`4,752,814 6/1988 Tuan
`7/1988 Brodsky
`4,757,361
`
`357/23.7 X
`357/23.7
`357/2 X
`357/2 X
`357/2 X
`
`6
`
`Exhibit 1004, page 1
`
`

`

`u.s. Patent
`
`Aug. 29,1989
`
`Sheet 1 of 6
`
`4,862,234
`
`T)
`
`5
`
`7
`
`FIG.I
`
`FIG.2
`
`Exhibit 1004, page 2
`
`

`

`u.s. Patent
`
`Aug. 29, 1989
`
`Sheet 2 of 6
`
`4,862,234
`
`5
`
`4A
`
`I
`FIG3
`
`l7-7-r-h---n~1' ~L.f-L-.L.<f-L-~' /-+7""""7"""r-r-r-r-rL 4A
`
`3
`
`I
`
`FIG.4
`
`10
`
`'fT""""7""""-r-r--r---r/fri-r~--7'7-7'-;~-r,. /-~~7-r 4A
`
`3
`
`FIG.5
`
`Exhibit 1004, page 3
`
`

`

`u.s. Patent
`
`Aug. 29, 1989
`
`Sheet 3 of 6
`
`4,862,234
`
`5
`
`68
`
`FIG.7
`
`lOS
`-0
`10
`I
`--l
`I
`-12
`,j
`....
`10 =-~-_....:::...----
`
`fl
`- t - _ _
`
`~3
`
`C2
`
`---
`:5.
`
`~
`
`H
`
`-20
`
`-10
`
`10
`
`20
`
`Exhibit 1004, page 4
`
`

`

`u.s. Patent
`
`Aug. 29,1989
`
`Sheet 4 of 6
`
`4,862,234
`
`6
`
`I
`
`!
`
`3
`
`FIG.9
`
`FIG.IO
`
`Exhibit 1004, page 5
`
`

`

`u.s. Patent
`
`Aug. 29, 1989
`
`Sheet 5 of 6
`
`4,862,234
`
`lOA
`
`FIG.II
`
`FIG.12
`
`68
`
`4
`
`3
`
`FIG.13
`
`Exhibit 1004, page 6
`
`

`

`u.s. Patent
`
`Aug. 29, 1989
`
`Sheet 6 of 6
`
`4,862,234
`
`FIG.14
`
`933
`
`" ....
`
`"-
`
`-6
`10
`
`-8
`10
`
`--5
`
`~H
`
`-\0
`
`-20
`FIG.15
`
`VGO(V)
`
`0
`
`10
`
`20
`
`Tr
`
`5a T9a
`
`8a
`
`30
`
`la
`
`FIG.16
`
`Exhibit 1004, page 7
`
`

`

`1
`
`THIN·FILM TRANSISTOR
`
`4,862,234
`
`2
`ment of the surface area of the display device cannot be
`attained.
`
`5
`
`15
`
`BACKGROUND OF THE INVENTION
`1. Field of the Invention
`This invention relates to a thin-film transistor that
`uses a semiconductor film of amorphous silicon (a-Si).
`More particularly, it relates to a technology for the
`prevention of a decrease in the off-resistance of a thin- 10
`film transistor due to light from a back light positioned
`at the back of the thin-film transistor in the case where
`the thin-film transistor is used as a display device pro(cid:173)
`vided with liquid crystal panels.
`2. Description of the Prior rt
`In recent years, there has been a good potential mar(cid:173)
`ket for the active-matrix display devices, as large-scale
`display devices that use liquid crystals, etc., in which
`thin-film transistors made with the use of a semiconduc(cid:173)
`tor mm of a-Si are formed in a matrix on an insulating 20
`substrate such as glass, etc.
`FIG. 16 shows a conventional thin-film transistor Tr
`using a semicondctor film of a-Si wherein an active
`layer 40 disposed on a gate insulating film 3a is much
`broader than a gate electrode 2a positioned below the 25
`gate insulating film 3a, and moreover either the active
`layer 40 or an n+-a-Si semiconductor film forming both
`source and drain regions 6a and 7a is made without
`consideration of its thickness. A protective insulating
`film Sa is disposed on the active layer 40.
`In the case where the thin-film transistor Tr consti(cid:173)
`tutes a display device with liquid crystals, a back light is
`placed at the insulating substrate (glass plate la) side.
`When the thin-film transistor Tr is off (i.e., negative
`voltage is applied to the gate electrode 2a), carriers, 35
`(such as electrons and their related holes) are generated
`due to light from the back light, in the portion of the
`active layer 4a that is not in alignment with the gate
`electrode 2a, resulting in a decrease in the resistance of
`the thin-film transistor Tr at the time when the thin-film 40
`transistor Tr is off. Thus, the thin-film transistor Tr does
`not function as a switching device.
`In order to solve this problem, the thickness of the
`active layer 40 of an a-Si semiconductor film can be
`thinned. For example, when the thickness thereof is set 45
`to be 100 A or less, the influence of the back light on the
`active layer 40 is not observed. However, if the active
`layer 40 is made too thin, then the resistance of the
`thin-film transistor Tr becomes unacceptably high
`when the transistor Tr is turned on.
`The generation of carriers in the active layer 40 can
`be also prevented by the formation of an optical shield
`in the thin-film transistor Tr, which causes an increase
`in the number of production steps, making yields low
`and increasing the production cost.
`Moreover, the thin-film transistor Tr can be designed
`such that the active layer 40 is positioned at a portion of
`the gate insulating layer 3a corresponding to the gate
`electrode 2a and is formed into the same shape and size
`as the gate electrode 2a by a common mask-alignment 60
`technique. However, according to such a technique,
`alignment errors arise unavoidably and side-etchings
`must be carried out, which makes the size of the thin(cid:173)
`film transistor large, resulting in a decrease in the ratio
`of the surface area of the picture-element electrode to 65
`the surface area of the liquid-crystal display panel and
`an increase in the load capacity between the gate elec(cid:173)
`trode and the drain electrode. Accordingly, the enlarge-
`
`SUMMARY OF THE INVENTION
`The thin-film transistor of this invention, which over(cid:173)
`comes the above-discussed and numerous other disad(cid:173)
`vantages and deficiencies of the prior art, comprises a
`thin-film transistor comprising an insulating substrate;
`an opaque metal gate electrode disposed on a portion of
`said insulating substrate; a gate insulating layer disposed
`on said insulating substrate including said gate elec(cid:173)
`trode; an a-Si semiconductor film disposed on the por(cid:173)
`tion of said gate insulating layer, said a-Si semiconduc(cid:173)
`tor film having been formed to attain self-alignment
`with respect to said gate electrode; a-Si contact film
`constituting source and drain regions,
`respectively,
`with a gap therebetween disposed on said a-Si semicon(cid:173)
`ductor film, the outer end of each of said contact films
`being formed to attain self-alignment with respect to
`said gate electrode; source and drain electrodes, respec(cid:173)
`tively, disposed on said source and drain regions, the
`thickness of each of said a-Si semiconductor film and
`said a-Si contact film being 100 A or more and the total
`amount of thicknesses thereof being 1,000 A or less.
`In a preferred embodiment, a protective insulating
`film is positioned between the a-Si semiconductor film
`and each of the a-Si contact films. Alternatively, each of
`the a-Si contact films is directly positioned on said a-Si
`semiconductor film.
`Thus, the invention described herein makes possible
`the objectives of (1) providing a thin-film transistor that
`prevents the generation of carriers in the active layer
`even when negative voltage is applied to the gate elec(cid:173)
`trode (Le., the thin-film transistor is oft), thereby main(cid:173)
`taining the off-resistance at a fixed level, and moreover
`that maintains the on-resistance at a low level when the
`thin-film transistor is on; (2) providing a thin-film tran(cid:173)
`sistor that is simply produced at a low cost; and (3)
`providing a miniaturized thin-film transistor that attains
`the enlargement of the surface area of a display device
`using the thin-film transistor.
`
`30
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`This invention may be better understood and its nu(cid:173)
`merous objects and advantages will become apparent to
`those skilled in the art by reference to the accompany(cid:173)
`ing drawings as follows:
`FIG. 1 is a side sectional view showing a thin-film
`50 transistor of this invention.
`FIGS. 2 to 7 are diagrams showing a production
`process of the thin-film transistor shown in FIG. 1.
`FIG. 8 is of characteristic curves showing the rela(cid:173)
`tionship between the gate-drain voltage V GD and the
`55 current Id flowing to the drain region with regard to
`the thin-film transistor shown in FIG. 1 of this invention
`and a conventional thin-film transistor.
`FIG. 9 is a side sectional view showing another thin(cid:173)
`film transistor of this invention.
`FIGS. 10 to 14 are diagrams showing a production
`process of the thin-film transistor shown in FIG. 9.
`FIG. 15 is of characteristic curves showing the rela-
`tionships between the gate-drain voltage V GD and the
`current Id flowing to the drain region with regard to
`the thin-film transistor shown in FIG. 9 of this invention
`and a conventional thin-film transistor.
`FIG. 16 is a side sectional view showing a conven(cid:173)
`tional thin-film transistor.
`
`Exhibit 1004, page 8
`
`

`

`4,862,234
`
`3
`DESCRIPTION OF PREFERRED
`EMBODIMENTS
`This invention provides a thin-film transistor that
`comprises an active layer and source and drain regions,
`which are formed in a manner to attain self-alignment
`with respect to a gate electrode made of opaque metals.
`
`5
`
`4
`vents the active layer 4 from being etched when the
`metal layer 8A and the n+-a-Si layer 6B are etched.
`The thickness of the active layer 4 is set to be in the
`range of 200 to 300 A. The width of the protective
`insulating layer 5 disposed on the active layer 4 is
`smaller than that of the gate electrode 2. The protective
`insulating layer 5 is made of Si3N4 or Ah03 and has a
`thickness of 1,000 A-I )Lm, preferably 2,000 A. The
`n+-a-Si contact film constituting the source and drain
`regions 6 and 7 has a thickness of 100-500 A, preferably
`200-300 A. When the thickness of these layers and films
`are set to be the above-mentioned experimental values,
`the resistance of the thin-film transistor when the said
`transistor is on is maintained at a fixed level and more(cid:173)
`over, the positive photoresist lOA is effectively exposed
`to light from the insulating substrate side so as to form
`the active layer having a desired pattern. Despite the
`above-mentioned experimental thickness values, in fact,
`when the thickness of each of the active layer 4 and the
`n+-a-Si film 6A is 100 Aor more and the total amount
`of thickness of the active layer 4 and the n+-a-Si film
`6A is 1,000 A or less, a desired thin-film transistor is
`obtainable.
`The thin-film transistor is incorporated with liquid
`crystals to form a display device, wherein no carrier
`occurs in the active layer 4 even when the thin-film
`transistor is irradiated with light from the insulating
`substrate side, and accordingly the resistance of the
`thin-film transistor in the off-state does not decrease.
`This is indicated by the following experiments: A dis(cid:173)
`play device, which was constructed by the combination
`of a thin-film transistor (having the active layer 4 with
`a thickness of 200 A and a width of 10 )Lm and a length
`of 12 )Lm) and liquid cyrstals, was used. When the volt-
`35 age VSD between the source electrode and the drain
`electrode was 10 volts and the thin-film transistor was
`irradiated with light of 104 luxes, the relationship be(cid:173)
`tween the gate-drain voltage V GD and the current Id
`flowing to the drain region 6 is indicated by the Id-VGD
`characteristic curve Cl shown in FIG. 8. The Id-VGD
`characteristic curve C2 indicates the relationship there-
`between in the case where the thin-film transistor was
`not irradiated with light from the insulating substrate
`side. The Id-V GD characteristic curve C3 indicates the
`relationship therebetween in the case where a conven(cid:173)
`tional thin-film transistor was irradiated with light of
`104luxes from the insulating substrate side. FIG. 8 indi(cid:173)
`cates that the thin-film transistor of this example at(cid:173)
`tained an improvement of the off-characteristics in the
`V GD in the range of -20 to -3 volts.
`Moreover, since the thickness of the active layer 4 is
`over a fixed value, the resistance of the thin-film transis(cid:173)
`tor of this example at the time when the transistor is on
`does not rise over a fixed level. The formation of the
`active layer 4 is carried out using the resist 10 as a mask,
`which has been aligned with the gate electrode 2 in
`cooperation with light from the insulating substrate side
`and the positive photoresist lOA, so that the production
`of the thin-film transistor can be simplified and the size
`thereof can be minimized.
`
`EXAMPLE 1
`FIG. 1 shows a thin-film transistor of this invention, 10
`which comprises an insulating substrate 1 made of a
`glass plate having a thickness of about I mm, a gate
`electrode 2 of opaque metals such as Ta, Cr, Mo, Al or
`W, a gate insulating layer 3, an active layer 4 made of an
`a-Si mm, a protective insulating film 5, source and drain 15
`regions 6 and 7 made of a phosphorus-doped n+-a-Si
`film that attains an ohmic contact with source and drain
`electrode 8 and 9 made of a metal film.
`This thin-film transistor is produced as follows:
`On the insulating substrate 1 of a glass plate, the gate 20
`electrode 2 with a desired pattern made of metals such
`as Ta, etc., is disposed as shown in FIG. 2. Then, as
`shown in FIG. 3, on the entire surface of the insulating
`substrate 1 including the gate electrode 2, the gate insu(cid:173)
`lating layer 3 and the a-Si semiconductor layer 4A hav- 25
`ing a thickness of 200 A are successively disposed by
`plasma assisted chemical vapor deposition. Then, the
`protective insulating film 5 that has a width smaller than
`that of the gate electrode 2 is disposed on the portion of
`the said a-Si semiconductor layer 4A corresponding to 30
`the gate electrode 2. Then, as shown in FIG. 4, on the
`a-Si semiconductor layer 4A including the protective
`insulating film 5, the phosphorus-doped n+-a-Si layer
`6A having a thickness of 2,000 Aand a positive photo(cid:173)
`resist layer lOA are successively disposed.
`Thereafter, the wafer is exposed to light from the
`back face of the insulating substrate 1. The gate elec(cid:173)
`trode 2 that is opaque functions as a photomask, and the
`portions of the positive photoresist layer lOA except for
`the portion of the positive photoresist layer lOA corre- 40
`sponding to the gate electrode 2 are removed, as shown
`in FIG. 5, resulting in a resist 10 that is in alignment
`with the gate electrode 2. When the total amount of
`thicknesses of the n+-a-Si layer 6A and the a-Si semi(cid:173)
`conductor layer 4A is 1,000 A or less, light effectively 45
`passes through the positive photoresist layer lOA.
`Then, the n+-a-Si layer 6A and the a-Si semiconduc(cid:173)
`tor layer 4A are etched with the use of the resist 10 as
`a mask, as shown in FIG. 6, resulting in an n+-a-Si
`layer 6B and the active layer 4 that are in alignment 50
`with the gate electrode 2. The resist 10 is then removed.
`As shown in FIG. 7, on the entire surface of the wafer
`at the n+-a-Si layer side, a metal layer 8A is then dis(cid:173)
`posed and photoresisst 11 are disposed on the metal
`layer 8A except for the portion of the metal layer 8A 55
`corresponding to the center area of the n+-a-Si layer
`6B. Then, the metal layer 8A and the n+-a-Si layer 6B
`are etched with the use of the photoresists 11 as a mask,
`as shown in FIG. 1, resulting in the source and drain
`regions 6 and 7 and the source and drain electrodes 8 60
`and 9. The photoresists 11 are then removed, resulting
`in a desired thin-film transistor of this invention.
`The protective insulating film 5 functions to prevent
`the occurrence of interface charges at
`the interface
`between the active layer 4 and the protective insulating 65
`film 5, thereby attaining an improvement of the transis(cid:173)
`tor characteristics of the thin-film transistor in the off(cid:173)
`state. Moreover,
`the protective insulating film 5 pre-
`
`EXAMPLE 2
`This example provides a thin-film transistor, as shown
`in FIG. 9, having the same structure as that of Example
`1, except
`that
`there is no protective insulating film,
`wherein the source and drain regions 6 and 7 are di(cid:173)
`rectly disposed on the active layer 4.
`This thin-film transistor is produced as follows:
`
`Exhibit 1004, page 9
`
`

`

`5
`On the insulating substrate 1 of a glass plate, the gate
`electrode 2 with a desired pattern made of Ta is dis(cid:173)
`posed as shown in FIG. 10. Then, as shown in FIG. 11,
`on the entire surface of the insulating substrate 1 includ(cid:173)
`ing the gate electrode 2, the gate insulating layer 3 and 5
`the a-Si semiconductor layer 4A having a thickness of
`200 A are successively disposed by plasma assisted
`chemical vapor deposition. Then,
`the phosphorus(cid:173)
`doped n+-a-Si layer 6A having a thickness of 200-300
`A and the positive photoresist layer lOA are succes- 10
`sively disposed on the a-Si semiconductor layer 4A.
`Thereafter, the wafer is exposed to light from the
`back face of the insulating substrate 1. The gate elec(cid:173)
`trode 2 that is opaque functions as a photomask, and the
`portions of the positive photoresist layer lOA except for 15
`the portion of the positive photoresist layer lOA corre(cid:173)
`sponding to the gate electrode 2 are removed, as shown
`in FIG. 5, resulting in a resist 10 that is in alignment
`with the gate electrode 2. When the total amount of
`thicknesses of the n+-a-Si layer 6A and the a-Si semi- 20
`conductor layer 4A is 1,000 A or less, light effectively
`passes through the positive photoresist layer lOA.
`Then, the n+-a-Si layer 6A and the a-Si semiconduc(cid:173)
`tor layer 4A are etched with the use of the resist 10 as
`a mask, as shown in FIG. 6, resulting in an n+-a-Si 25
`layer 6B and the active layer 4 that are in alignment
`with the gate electrode 2. The resist 10 is then removed.
`As shown in FIG. 7, on the entire surface of the wafer
`at the n+-a-Si layer side, a metal layer SA is then dis(cid:173)
`posed and photoresists 11 are disposed on the metal 30
`layer SA except for the portion of the metal layer SA
`corresponding to the center area of the n+-a-Si layer
`6B. Then, the metal layer SA and the n+-a-Si layer 6B
`are etched with the use of the photoresists 11 as a mask,
`as shown in FIG. 1, resulting in the source and drain 35
`regions 6 and 7 and the source and drain electrodes S
`and 9. The photoresists 11 are then removed, resulting
`in a desired thin-film transistor of this invention.
`Since the protective insulating film mentioned in
`Example 1 is not used here, etching of the n+-a-Si layer 40
`6B is, of course, carried out under conditions where the
`active layer 4 is not etched but the n+-a-Si layer 6B is
`etched. This is, for example, attained by the regulation
`of the etching rate.
`The thickness of the active layer 4 is set to be in the 45
`range of 200 to 300 A. The n + -a-Si contact film consti(cid:173)
`tuting the source and drain regions 6 and 7 has a thick(cid:173)
`ness of 100-500 A, preferably 200-300 A. When the
`thickness of these layers and films are set to be the
`above-mentioned experimental values, the resistance of 50
`the thin-film transistor when the said transistor is on is
`maintained at a fixed level and moreover, the positive
`photoresist lOA is effectively exposed to light from the
`insulating substrate side so as to form the active layer
`having a desired pattern. Despite the above-mentioned 55
`experimental thickness values, in fact, when the thick(cid:173)
`ness of each of the active layer 4 and the n+-a-Si film
`6A is 100 A or more and the total amount of thickness
`of the active layer 4 and the n+-a-Si film 6A is 1,000 A
`or less, a desired thin-film transistor is obtainable.
`With a display device using the above-mentioned
`thin-film transistor and liquid crystals, the same experi(cid:173)
`ments as in Example 1 were carried out and the results
`
`60
`
`4,862,234
`
`6
`are shown in FIG. 15, wherein the Id-V GD characteris(cid:173)
`tic curves Cll indicates the relationship between the
`gate-drain voltage V GD and the current Id flowing to
`the drain region 6 in the case where the thin-film transis(cid:173)
`tor of this example is irradiated with light under the
`same conditions as in Example 1, the Id-V GD character(cid:173)
`istic curve C22 indicates the relationship therebetween
`in the case where the thin-film transistor of this example
`is not irradiated with light, and the Id-V GD characteris(cid:173)
`tic curve C33 is the same as the curve C3 shown in FIG.
`S in Example 1. It can be seen from FIG. 15 that the
`thin-film transistor of this example attained an improve(cid:173)
`ment of the off-characteristics in the V GD in the range of
`-20 to -3 volts.
`Moreover, the thickness of the active layer 4 is like(cid:173)
`wise over a fixed value, the resistance of the thin-film
`transistor of this example in the on-state does not rise
`over a fixed level. The active layer 4 and the n+-a-Si
`layer constituting the source and drain regions 6 and 7
`are formed by self-alignment with respect to the gate
`electrode 2 in cooperation with the light from the insu(cid:173)
`lating substrate side and the positive photoresist lOA,
`and thus the production of the thin-film transistor can
`be simplified and the size thereof can be minimized.
`It is understood that various other modifications will
`be apparent to and can be readily made by those skilled
`in the art without departing from the scope and spirit of
`this invention. Accordingly, it is not intended that the
`scope of the claims appended hereto be limited to the
`description as set forth herein, but rather that the claims
`be construed as encompassing all the features of patent(cid:173)
`able novelty that reside in the present invention, includ(cid:173)
`ing all features that would be treated as equivalents
`thereof by those skilled in the art to which this inven(cid:173)
`tion pertains.
`What is claimed is:
`1. A thin-film transistor compnsmg an insulating
`substrate; an opaque metal gate electrode disposed on a
`portion of said insulating substrate; a gate insulating
`layer disposed on said insulating substrate including said
`gate electrode; an a-Si semiconductor film disposed on
`the portion of said gate insulating layer, said a-Si semi(cid:173)
`conductor film having been formed to attain self-align(cid:173)
`ment with respect to said gate electrode; a-Si contact
`films constituting source and drain regions,
`respec(cid:173)
`tively, with a gap therebetween disposed on said a-Si
`semiconductor film,
`the outer end of each of said
`contact films being formed to attain self-alignment with
`respect to said gate electrode; souce and drain elec(cid:173)
`trodes, respectively, disposed on said source and drain
`regions, the thickness of each of said a-Si semiconductor
`film and said a-Si contact film being 100 A or more and
`the total amount of thicknesses thereof being 1,000 A or
`less.
`2. A thin-film transistor according to claim 1, wherein
`a protective insulating film is positioned between the
`a-Si semiconductor film and each of the a-Si contact
`films.
`3. A thin-film transistor according to claim 1, wherein
`each of the a-Si contact films is directly positioned on
`said a-Si semiconductor film.
`* * * *
`
`*
`
`65
`
`Exhibit 1004, page 10
`
`