FLAT-PANEL
`
`DISPLAYS
`
`AND CRTS
`
`Edited by
`
`Lawrence E. Tannas, Jr.
`
`= displays industry for
`us form with the color
`H and adapted as such
`5 an approximation of
`L. Lancaster, PA., and
`
`‘
`
`VAN NOSTRAND REINHOLD
`
`_ York
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`Copyright © 1985 by Van Nostrand Reinhold
`
`Library of Congress Catalog Card Number 84-11839
`ISBN 0-442-28250-8
`
`_
`All rights reserved. No part of this work covered by the copyright hereon may
`be reproduced or used in any form or by any means—graphic, electronic, or
`mechanical, including photocopying, recording, taping, or information storage
`and retrieval systems—without permission of the publisher.
`Manufactured in the United States of America
`
`Van Nostrand Reinhold
`ll5 Fifth Avenue
`New York. New York 10003
`
`Van Nostrand Reinhold lntemational Company Limited
`II New Fetter Lane
`London EC4P 4EE. England
`
`Van Nostrand Reinhold
`480 La Trobe Street
`Melbourne. Victoria 3000. Australia
`
`Nelson Canada
`1120 Birchmount Road
`Scarborough. Ontario MlK 5G4, Canada
`
`15
`
`14
`
`13
`
`12
`
`11 109876543
`
`Library of Congress Cataloging in Publication Data
`Main entry under title:
`
`Flat-panel displays and CRTs.
`
`
`
`‘.,...‘._;,wv-ri-I~i“b".“.!I‘.il\Fi||‘!‘l:lfil‘r..
`
`2. Cathode-ray tubes.
`
`Includes index.
`1‘. Information display systems.
`I. Tannas, Jr., Lawrence E.
`TK7882.I6F53 1984
`ISBN 0-442-28250-8
`
`381.3819'532
`
`84-11839
`
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`5 2E
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`If an acronym is needed in the paper, the phe-
`nomenon need only be abbreviated, such as
`LED for light-emitting diode, LC for liquid
`crystallinity, or GD for gas discharge. The
`reader has been informed of the other features
`
`such as ac or dc, memory or refresh, thin film
`or powder. Trademarks could be used in place
`of the abbreviations where it
`is necessary to
`refer
`to specific manufacturer’s product or
`approach.
`it makes for easier reading if the
`Further,
`letter “D” for display is left out of the acronym.
`It
`is easier to read “The EL display uses less
`power .
`. .” than “The ELD uses less power. . .”
`and there is more information in “an EL dis-
`
`the unfamiliar reader. Addi-
`play” to assist
`tionally, the acronym can be used as an adjec-
`tive, such as in EL powder, EL light, etc.
`
`1.6
`
`PICTURE ELEMENT OR PIXEL
`
`The basic building block for all displays is the
`picture element as shown in Fig. 1-10. The
`noun “pixel” is formed from the contraction
`of “picture element” and is almost universally
`used in its place. The pixel is the smallest re-
`solvable spatial-information element as seen by
`the viewer. There is no spatial information in a
`display below the resolution of the pixel area.
`Some authors, particularly in the word-pro-
`cessing industry use the contraction “pel.” By
`consensus, “pixel” is preferred. Pixel has been
`directly translated into French, German, Japa-
`nese, and other languages with the same meaning.
`The pixel may be further subdivided to
`achieve color (see Fig. 1-11) or gray shades
`(Fig. 1-12). The key point is that the pixel is
`the lowest resolvable spatial incremental quan-
`turn. The other display dimensions of hue
`(color), saturation (color purity),
`luminance
`(gray shades), and time are all independent of
`the spatial dimension.
`As an example of pixel subdivision, color is
`often achieved using three dots per pixel, one
`red, one green, and one blue within the spatial
`area. A clever geometric arrangement can be
`used with matrix-addressed displays, as depicted
`in Fig.
`l-llb. Neighboring pixels can share
`color dots if properly programmed. In this case,
`the active area is much larger than the pixel
`spatial area.
`
` 18
`
`FLAT-PANEL DISPLAYS AND CRTs
`
`1.5 CLASSIFICATION NOMENCLATURE
`
`In any field of endeavor, it is desirable to use
`standard classification nomenclature.
`In the
`
`display industry, there has been a rush to form
`new acronyms. Without denying inventors the
`right
`to name their new display, a standard
`generic classification of displays can be used.
`The outline for such a classification is shown in
`
`Table 1-3. The table lists the key words which
`can be used to categorize any display device. As
`an example of the use of this scheme, one of
`the first liquid-crystal displays is classified as:
`
`o Phenomenon: Liquid crystallinity (LC)
`o Material: MBBA and EBBA with dopant
`o Contrast: Dynamic scattering with back
`lighting
`a Addressing: Direct with ac refresh
`o Application: Numeric
`
`This generic classification could be reduced
`to key words to describe display devices in
`technical
`reports, papers, and dissertations.
`
`Table 1-3 Generic Classification for
`
`Flat-Panel Displays
`
`Phenomenon
`
`Material
`
`Contrast
`
`Addressing
`
`The primary physical phenomenon
`used to create a particular visual
`effect. Examples: liquid crystal-
`linity, electrophoresis, light-
`emitting diodes.
`
`The chemical name and physical
`state of the display material. Ex-
`amples: Mn activated ZnS thin-
`film phosphor, doped MBBA/
`EBBA.
`
`The electrically alterable medium
`used to create contrast between
`picture elements. Examples: bi-
`refringence, absorption, green
`luminance on a black background.
`
`The method for controlling an array
`of picture elements. Examples:
`direct, scan, grid shift, or matrix
`addressing, with memory or re-
`fresh, ac or dc, intrinsic or
`extrinsic.
`
`Application
`
`The display category most suited.
`Examples: analog, alphanumeric,
`vectorgraphic, or video.
`
`Page 3 of 21
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`r. the phe-
`1. such as
`
`for liquid
`arge. The
`rr features
`. thin film
`
`d in place
`.:essary to
`’oduct or
`
`ing if the
`acronym.
`1 uses less
`ower. . .”
`n EL dis-
`er. Addi-
`
`an adjec-
`tc.
`
`[VI L
`
`ays is the
`-10. The
`ntraction
`
`1iversally
`tallest re-
`
`; seen by
`ition in a
`:1 area.
`
`;ord-pro-
`pel." By
`has been
`
`an, Japa-
`neaning.
`r'ld€Cl
`IO
`.- shades
`
`- pixel is
`al quan-
`of hue
`minance
`ident of
`
`color is
`
`xel, one
`2 spatial
`can be
`
`lepicted
`n share
`
`his case,
`ie pixel
`
`INTRODUCTION 19
`
`Columns
`
`
`
`Pixel active area
`
`Off—pixel
`
`On-pixel
`
`Inactive area
`
`Fig. 1-10. Nomenclature of a flat-panel display pixel array.
`
`Several resolution lines in the rows or col-
`
`.llT'lI'1S or both can be used for gray shades. For
`example, the intersection of two row and two
`;o1umn electric leads in matrix addressing can
`be used to define a single pixel. The pixel is
`then made up of four dots, and the excitation
`of different numbers of dots can be used for
`
`gray shades. In Fig. 1-12 the dots are of dif-
`ferent size so that fairly uniform steps of sixteen
`gray shades can be portrayed using all combina-
`tions of the four dots.
`
`The pixel spatial dimensions can be defined
`by their pitch. The resolution is the reciprocal
`of pitch and is quoted as display lines per inch
`or millimeter. Display lines do not have spaces
`
`1
`r —*
`
`Pixel Column Lines
`2
`J‘
`
`r
`
`3
`wrk
`
`
`
`Pixellluwl,um.-2.
`
`_.
`
`in the sense that optical lines have spaces. For
`example,
`it
`takes a minimum of two display
`lines to represent an optical line and its space.
`An optical line space is represented by a display
`line turned off.
`
`To display 20 optical lines per inch, for ex-
`ample, requires 40 display lines (TV lines) times
`the Kell factor of 1.4 for a total of 56 display
`lines per inch. The Kell factor is used to deter-
`mine the number of TV raster lines needed to
`
`reproduce a resolution test chart. Other meth-
`ods are used today, as discussed in Chap. 4.
`The active area may be less than the pixel
`area, as shown in Fig. 1-10. The checkerboard
`pattern in Fig. 1-10 is useful as a test pattern
`
`Pixel Column Lines
`
`4
`3
`2
`1
`(4% T*‘*‘\ r—&fi r—’*'
`Pixel
`Spatial Area
`
`131 3
`
`P12
`
`Pixel P11
`
`Area % 9
`.|{
`l \
`l /
`2 { P21
`{ P31
`3 44
`
`PixelRowLines
`
`(a) Conventional Pixel Subdivision
`for Three~Color Display
`
`(b) Shared Pixel Subdivision For More Efficient
`Active Area at Higher Resolution
`
`Fig. 1-11. Pixel subdivision for color.
`
`
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`Page 4 of 21
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`
`20
`
`FLAT-PANEL DISPLAYS AND CRTs
`
`Pixel Column Lines
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`r
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`
`(b) Gray Shade Table
`
`Yet there are many SL
`
`“lay applications prir
`ziower and sunlight re.
`
`1.7 D|SPLAY ARR
`
`\ display is simply 3
`. Introllable pixels. Tl
`;:_*>ends upon the ap
`.;.en pixels is need-:.
`\. four-digit watch d
`".163 seven plus one :
`' ta colon is only 01
`.
`‘.5 are not independ
`:;on System Comm:
`: evision requires up;
`-:0 rows by 320 cc
`,-;xel array (digital c"
`The total pixel cc
`:3}: time, color. etc.
`'5. instantaneous i
`_t.=re.
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`_
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`The array is norm
`_:-.ms. The addres
`. number and .
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`_”.'.ing from the
`.:=.
`in Fig. 1-10.
`X
`the state of ti
`-. 3;-ss.
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`Pixel Active Area = A+B+C+D
`A = 2B = 4C = 8D
`
`(a) Graph of Pixel Subdivision
`
`Fig. 1-12. Pixel subdivision for gray shades.
`
`for measuring contrast ratio between on-pixel
`and off-pixel. Using this test pattern would lead
`to a conservative measure of contrast ratio, since
`
`each off-pixel is surrounded by on-pixels which
`can indirectly contribute to the brightness of
`the off-pixel by light piping or scattering. Studies
`have shown that the readability of an emissive
`display is not adversely affected with pixel-
`active areas as low as 50% or less. Diffusers can
`
`be used to spread out the pixel luminance to fill
`the pixel spatial area.
`Except for CRTs and some flat CRTs, the
`invention of a display begins with the pixel. It
`must be electronically alterable and reversible.
`The contrast ratio must be high, the speed of
`response fast, and the power consumption low.
`Additionally, it must be operable over a wide
`temperature range with long life. It is not im-
`portant whether it is an emissive or nonemissive
`technique. There are thousands of ways to create
`a pixel. Only a few are worthy of pursuit. In
`general, the pixel must have the following prop-
`erties to be suitable for a general-purpose display
`(500 rows by 500 columns):
`
`a Resolution: 64 lines/in.
`o Pixel contrast
`ratio: 10: 1
`ambient illumination range)
`o Directionality: Lambertian over 60-deg
`cone from normal
`
`(over a wide
`
`o Operating temperature range:
`80°C
`
`-40°C to
`
`a Life (maintenance): Memory—lO6 cycles
`Refresh—104 hours
`
`a Dwell time: 20 Izsec
`
`a Power (less than 25 W total): 0.1 mW per
`pixel
`o Duty cycle: Memory—l0O%
`Refresh (100 Hz)—O.2%
`o Discrimination ratio (luminance of on-pixel
`to off-pixel at one-third voltage): 104 : 1
`
`is necessary but not sufficient that a pixel
`It
`have all these properties. If it does not, then it
`may be suitable as a smaller display or special-
`purpose display depending upon the limita-
`tions. There are no liquid-crystal materials which
`possess all these pixel properties, and there are
`no successful 500 by 500-line LC displays either.
`
`
`
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`Page 5 of 21
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`XLNX-1019
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`overPixelArea)Q00NmmJ)uM__9RelativeLumlug-sm;u-*(Average
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`wide
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`.')-deg
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`C to
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`cles
`irs
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`V per
`
`pixel
`
`pixel
`l6fl it
`ecial-
`mita-
`shich
`e are
`
`ther.
`
`'2 :1 there are many successful liquid-crystal dis-
`1.-y applications primarily because of the low
`wer and sunlight readability properties.
`
`1.7 DISPLAY ARRAY
`
`\ display is simply an array of independently
`. r.-zrollable pixels. The number of pixels needed
`.
`;:;wends upon the application. A minimum of
`._~.cn pixels is needed for a numeric character.
`\ four-digit watch display would require four
`'.".".€S
`seven plus one for the colon, or 29 pixels.
`The colon is only one pixel if the two colon
`:
`‘.5 are not independent. NTSC (National Tele-
`-.s:on System Committee) standard commercial
`':Zevision requires approximately 150,000 pixels
`-'50 rows by 320 columns) when displayed in
`2 rzxel array (digital equivalent).
`The total pixel count is independent of re-
`-2311 time, color, etc. The pixel count limits the
`.231 instantaneous information content of the
`:._*.ure.
`
`The array is normally organized in rows and
`..lJmns. The address of a pixel is defined by its
`as number and column number, normally
`lnting from the upper left—hand corner as
`,
`.-. wn in Fig. 1-10. The electronic drive con-
`his the state of the pixels according to their
`..'.‘ress.
`
`In matrix-addressed displays, all the columns
`ir: normally addressed in parallel to save time.
`The complete array is addressed one row at a
`‘.7716, and the time to address the complete array
`2 then set by the number of rows multiplied by
`‘:2 time per row. The rows are kept to a mini-
`-..nn in order to minimize frame time and
`
`‘.3.\'.lIT1lZC duty factor. The duty factor is the
`:-ercent of the total time spent on each row or
`.‘;\‘Cl and is
`therefore the reciprocal of the
`- gmber of rows, a key point. The duty factor
`> very critical for slowly responding display
`-taterial such as in liquid-crystal displays. Liq-
`..J-crystal displays are so slow that only 64 to
`:8 rows can be addressed per frame directly.
`However, the display can be made to have more
`;:splay rows than it has addressed rows. Tech-
`aques for doing this are shown in Fig. 1-13. In
`.-xample Fig. 1-13d, every set of four addressed
`. -lumn lines are rotated to appear as row lines.
`This complicates the data signal and electrode
`
`INTRODUCTION 21
`
`lines, but it increases the useful display row lines
`by a factor of 4 or more. Since the columns are
`addressed in parallel, the number of addressed
`column lines is of no consequence, time-wise.
`
`A flat-panel display array is normally a fixed-
`digital set due to its construction; the excep-
`tions are the flat-CRT Aiken Tube, the Gabor
`Tube, and others that use the scan addressing
`techniques which will be discussed in the next
`section. The number of rows and columns is
`
`constrained by the electrode configuration. The
`number of rows and columns is discrete. To
`make the best use of electronic counters in the
`
`electronic drive, and of memory locations in a
`picture memory map, the number or rows and
`columns is often a power of two, such as 256
`rows by 512 columns.
`The CRT, Aiken Tube, and Gabor Tube are
`analog displays. The pixel locations are defined
`by an analog Voltage on the vertical and hori-
`zontal deflection amplifiers. The display array
`is called a raster scanning pattern or Lissajous
`pattern. The pixel size, called a spot size (diam-
`eter at 50% luminance), is principally defined
`by the electron beam focus, the video amplifier
`bandwidth, and the phosphor light diffusion.
`The number of rows and columns possible in a
`CRT corresponds to the raster vertical dimen-
`sion divided by the spot vertical dimension and
`the raster horizontal dimension divided by the
`spot horizontal dimension, respectively.
`The CRT display phosphor screen is usually
`continuous and without electrode definition.
`
`The deflection and Video amplifiers are external
`to the tube itself. These analog amplifiers can
`be adjusted or modified to greatly alter the
`pixel size and raster size of a CRT display with-
`out changing the tube. This capability is used
`in the zoom feature of some commercial TV
`sets.
`
`The number of row lines greatly impacts
`upon the display media performance require-
`ments in the following way:
`
`1. Refresh duty factor is inversely propor-
`tional
`to the number of electronic row
`
`lines, and
`2. Pixel contrast ratio is inversely propor-
`tional
`to the number of electronic row
`lines.
`
`
`
`Page 6 of 21
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`22
`
`FLAT-PANEL DISPLAYS AND CRTs
`
`Addressed Columns
`Pixel P11
`. C
`Spatial Area\¥
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`
`
`Addressed
`Rows
`
`Address Upper Columns, Set
`r-4%
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`(Address12 by 6;Disp|ay12 by 6)
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`Two-to-One Reduction in Addressed Rows
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`pixels and is called the duty factor. For an array
`The requirements on the display media can
`be reduced if the electronically addressed row of 500 by 500 the duty factor becomes 4 parts
`lines can be reduced. The first and obvious
`per million, or .0O04%, which is quite small.
`thing is to simply skew the presentation by Only CRT phosphors and LEDs can operate
`increasing the column lines and reducing the
`satisfactorily with a duty factor this small.
`row lines. This distorts the display presentation
`The duty factor can be greatly increased by
`
`and can only be used within limits. The next
`step is to reduce the electronic rows without
`reducing the displayed rows by using tech-
`niques such as those shown in Fig. 1-13.
`..
`1.7.1 Duty Factor. A display is addressed
`or strobed sequentially. The time spent on each
`pixel is inversely proportional to the number of
`
`using line-at-a-time addressing. That is to say,
`a complete row is addressed in parallel, and the
`rows are then commutated sequentially. For an
`array of 500 by 500 the duty factor becomes 2
`parts per thousand, or .2%, which is a signifi-
`cant
`improvement. This is why line-at-a-time
`addressing is used whenever it is at all practical
`and why the number of addressed rows is kept
`
`%
`1:
`
`‘era
`Addressed Columns
`of Lower Set
`
`(b) Parallel Array
`Two-to-one Increase in How Dwell Time
`(Address 2 sets of 6 by 6; Display 12 by 6)
`
`\
`(d) Distorted Column Array
`Four-to-One Reduction in Addressed Rows
`(Address 3 by 24;Disp|av12 bv 6)
`
`Fig. 1-13. Techniques for reducing row addressing time.
`
`Page 7 of 21
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`24
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`FLAT-PANEL DISPLAYS AND CRTs
`
`Most display technologies in combination with
`the addressing techniques have a limited dis-
`crimination ratio.
`
`1.8 ADDRESSING
`
`For the uninitiated, the least understood and
`most underestimated task in flat-panel displays
`is that of addressing the hundreds of thousands
`of pixels. It is the single most difficult problem.
`The solution chosen has a great impact on the
`display cost. The problem is to convert a serial
`electrical data sequence into a rectilinear pixel
`array in real time.
`The success of the CRT is directly attributable
`to the simplicity of its scan-addressing technique
`used to generate the raster or Lissajous patterns.
`Scan addressing is possible because of highly
`efficient,
`fast-responding cathodoluminescent
`phosphors. Scan addressing is further unique
`and ideal in that it can directly accept data in
`real
`time at video speeds from a single serial
`data channel without the need for intermediate
`
`data storage or shift registers.
`In flat-panel displays, the addressing problem
`is similar in many ways to that in randomly ad-
`dressable digital memories and solid-state imag-
`ing devices. The cross-coupling anomaly of a
`partial selection of nonselected pixels is identi-
`cal. However, with displays the array must be
`of a size appropriate for viewing. It must be
`planar, with the proper linearity, size, shape,
`and percent active area. The viewing signa1-to-
`noise ratio and power must be appropriate for
`human interpretation. There is no opportunity
`for noise filtering or error correction once the
`information is displayed.
`All electronic displays are addressed by one
`of five basic techniques as summarized in Table
`1-4. Normally, power is applied at
`the same
`time the pixels are addressed. In some flat-panel
`displays, the information is applied by one ad-
`dressing scheme and the power is applied by
`another. The pixels in the array must effectively
`have three or four electrical leads when infor-
`
`mation and power are applied separately.
`Addressing becomes more and more difficult
`as the humber of pixels in the array becomes
`larger and larger. A successful addressing solu-
`tion“for an array of 64 rows by 128 columns
`may not work at all for an array of 128 rows by
`128 columns using the same display media. The
`
`reason for this is that the requirements of dis-
`crimination ratio (nonlinearity), speed of re-
`sponse, duty factor, dwell
`time, and power
`increase in proportion to the number of rows in
`the array. Typically, one axis is used for timing
`and the other is used for data input. It does not
`matter which one is used for which, except that
`there is some economy in the overall device if
`
`the smaller of the two is used for timing. For
`purposes of this book, the timing axis lines are
`called the rows and the data axis lines are called
`
`the columns. The addressing techniques are dis-
`cussed in more detail in Chap. 5.
`
`addressing
`1.8.1 Direct Addressing. Direct
`applies to the hard wiring of each pixel to a
`driver amplifier. It is only used with discretes
`and a few alphanumeric characters. Direct ad-
`dressing becomes unacceptable for five or more
`numeric character displays. For example, for
`five seven-segment numeric displays with deci-
`mal, direct addressing would require 40 leads
`plus power return (8 for the seven segments
`plus decimal
`times 5 characters). If an inte-
`grated circuit were used to drive the display,
`40 pins in the package would be dedicated to
`drive the display which greatly impacts the cost
`of the integrated circuit. Additional pins would
`be required for data-in, clock, and power. With
`matrix addressing, the number of leads could be
`reduced to 8 for the seven segments and deci-
`mal plus 5 for the five characters, making 8
`column lines plus 5 row lines for a total of 13
`leads. The array can be visualized as five rows
`and eight columns, and would be wired accord-
`ingly for matrix addressing. Direct addressing is
`sometimes used on large signs where there is
`adequate space and large amounts of power are
`required.
`
`1.8.2 Scan Addressing. The addressing prob-
`lem can best be understood by studying an
`array of pixels such as would be required for
`a commercial TV picture. There are approxi-
`mately 480 rows (controlled by the raster sync
`signals) and 320 columns (limited by the video
`amplifier bandwidth)
`for a total of 153,600
`usable addressable pixels in NTSC standard TV.
`To use an individual lead as in the direct-ad-
`
`dressing technique would require 153,600 leads.
`This is virtually impossible except for a direct-
`view display the size of a billboard. Also, the
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`tnts of dis-
`eed of re-
`
`tnd power
`of rows in
`
`for timing
`lt does not
`
`.-xcept that
`11 device if
`
`iming. For
`is lines are
`5 are called
`ues are dis-
`
`addressing
`pixel to a
`h discretes
`Direct ad-
`ve or more
`
`ample, for
`with deci-
`e 40 leads
`
`‘. segments
`.t‘ an inte-
`
`ie display,
`-dicated to
`:ts the cost
`
`pins would
`Jwer. With
`ls could be
`5 and deci-
`
`making 8
`otal of 13
`; five rows
`‘ed accord-
`
`ldressing is
`re there is
`
`power are
`
`sing prob-
`udying an
`quired for
`e approxi-
`raster sync
`the video
`
`t‘ 153,600
`ndard TV.
`direct-ad-
`.600 leads.
`r a direct-
`
`Also, the
`
`INTRODUCTION 25
`
`Addressing
`Technique Name
`
`Direct
`
`S can
`
`Grid
`
`Shift
`
`Matrix
`
`Table 1-4 Classifition of All Known Addressing Techniques
`
`Typical Pixel
`Electrode
`
`One lead to each pixel
`with a common signal
`return for power or a
`pair of leads to each
`pixel
`
`Each pixel defined by
`beam size focused on
`continuous screen of
`pixel media
`
`Each pixel defined by
`the grid hole geom-
`etry; one to four grids
`typically
`
`Each pixel electrically
`connected between
`one row channel and
`a pair of column leads
`
`Each pixel electronically
`connected between
`one row lead and one
`column lead
`
`Number of Amplifiers
`
`Display Applications
`
`Number of rows multiplied
`by the number of columns
`
`Four or fewer alphanumeric
`characters
`
`One for horizontal scan de-
`flection; one for vertical
`scan deflection; one for
`beam intensity control
`
`Variable, dependent upon
`number of grids and sub-
`division of each grid but
`fewer than in matrix
`addressing
`
`Number of rows plus num-
`ber of columns divided
`typically by four for shift
`articulation (assume shift
`is along the rows only)
`
`Number of rows plus number
`of columns
`
`Cathode-ray tube and some
`flat CRT’s
`
`Vacuum fluorescence, some
`flat CRT’s, and some gas
`discharge technqiues
`
`Uniquely used with some gas
`discharge and plasma panels
`
`Possible with all flat—panel
`technologies with high dis-
`crimination ratio (large
`nonlinearity)
`
`.ost of completing all the connections, routing
`Ll the wires, and assembling all the amplifiers
`.s prohibitive. The best
`technique is scan ad-
`iressing, which unfortunately adds depth to the
`izsplay. Scan addressing is uniquely integral to
`the CRT and to date has not been successfully
`rpplied to a flat-panel display except
`in flat
`C RTS.
`
`1.8.3 Grid Addressing. The number of line
`irivers in matrix-addressing display arrays is a
`significant cost factor. Grid addressing is used
`‘.3 reduce the number of line drivers even further
`
`2’. the cost of increasing the physical structural
`;omplexity. The grids must all be electroded
`znd constructed with holes. The display media
`need not possess a nonlinearity when grid
`addressing is used. However, the media must be
`sensitive to charged particles which can be
`;ontrolled with a grid, such as gas discharge
`priming particles, electrons, or ions. Grid ad-
`dressing does not have the partial-selection
`problem that matrix addressing has. Each grid
`effectively adds another electrode to each pixel.
`However,
`the array must be addressed pixel-
`at-a-time or
`row-at-a-time to prevent direct
`
`cross-coupling as with matrix addressing. The
`name “grid” is used because the grid structure
`function is analogous to the grid of a triode
`vacuum tube.
`
`1.8.4 Shift Addressing. Another way to re-
`duce the number of line drivers even further is
`
`with the shift-addressing technique. Typically,
`the data are introduced in parallel
`in all the
`columns of one row at the left side of the dis-
`
`play and shifted to the right. The gas-discharge-
`controlled switching characteristics are particu-
`larly suited for
`this approach. It
`is not the
`nonlinearity but
`the gas switching or priming
`properties that permit shifting of the input
`information. Channels may be constructed along
`each column to contain the discharge and pre-
`vent column-to-column crosstalk. After a gas
`discharge has been started in a gas-filled column
`channel, priming particles drift and diffuse
`along the column (data) channel to the next
`row (timing), lowering its firing voltage. When
`the scanning voltage is applied to a row, the
`pixel that has been primed turns on, and the
`pixel
`that has not been primed remains off.
`In this manner, the gas discharge can be articu-
`
`
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`26
`
`FLAT-PANEL DISPLAYS AND CRTs
`
`lated along the channel by means of four inter-
`laced and interconnected row-line drivers. With
`
`the shift-addressing technique, additional time
`is needed to shift
`the data into the display.
`Minimizing columns saves on the number of
`amplif1ers—minimizing rows
`saves addressing
`time. Here the rows run vertically and the col-
`umns run horizontally.
`
`1.8.5 Matrix Addressing. Matrix addressing is
`the most commonly used method for flat-panel
`displays. In comparison with direct addressing,
`the number of leads is reduced from the product
`of the number of rows and columns to the sum
`of the number of rows and columns. The over-
`
`all physical construction is quite simple. How-
`ever,
`the display media must possess a strong
`nonlinear characteristic to prevent partial selec-
`tion of the nonaddressed pixels, and the array
`must be addressed pixel—at-a-time or line-at-a-
`time to prevent direct cross-coupling. Examples
`of display media that inherently possess a strong
`nonlinearity found to be most suitable for
`matrix addressing are light-emitting diodes,
`ac
`thin-film electroluminescence,
`and
`gas
`discharge.
`inherently possess
`If
`the media does not
`sufficient intrinsic nonlinearity, as for example
`with liquid crystallinity and electrochromism,
`active electronic components must be added at
`each pixel. This has been successfully accom-
`plished using transistors and/or diodes. How-
`ever, complexity has now been added at each
`pixel. The necessary nonlinearity has also been
`achieved by introducing another material such
`as nonlinear resistor films of ZnO or ferroelec—
`
`in concert with the display
`tric wafers to act
`media to render a net nonlinear response. Mild
`nonlinear characteristics are
`realizable with
`
`liquid-crystal materials, permitting matrix ad-
`dressing for small arrays.
`When something is added to the display media
`to achieve matrix addressability,
`it provides
`“extrinsic matrix addressing.” Otherwise it is
`simply matrix addressing or intrinsic matrix
`addressing. The
`adjectives
`“extrinsic”
`and
`“intrinsic” are analogous to extrinsic and intrin-
`sic semiconductor materials. An extrinsic semi-
`
`conductor is one where a dopant has been added
`to get the desired semiconductor properties. An
`intrinsic
`semiconductor
`inherently has
`the
`desired properties without adding a dopant.
`
`1.9 DISPLAY DEVICE DEVELOPMENT
`
`Display device development requires a sustained
`effort of advanced technical talent over an ex-
`
`tended period of time. The effort requires the
`appropriate balance of research, engineering,
`manufacturing, marketing, finance, and manage-
`ment. A single organization with a grasp of the
`total technical problem, the stability for a pro-
`longed development cycle, and the proper blend
`of corporate functions is indeed rare.
`Moreover, a display is only a component.
`Production orders for displays come only after
`production of the product using the display has
`been committed to. After the display prototype
`is
`released for product application,
`it
`takes
`three years at a minimum until production
`quantities are ordered. The reasons for this are
`imbedded in corporate annual planning and
`budgeting procedures. There are three phases
`in new-product development, each of which
`takes a significant increase in commitment of
`company resources and financial support. The
`first year or phase is spent by the company, or
`organization responsible for the product, in eval-
`uating the display and designing the product and
`making breadboards of the product or critical
`parts of the product. The second year or phase
`is spent making several engineering prototypes
`meeting functional requirements and evaluating
`them internally. The third year or phase is spent
`making pilot line units to form,fit,and function
`for limited sales and evaluation by product cus-
`tomers and users, planning production, and
`making marketing evaluations for prodution
`recommendations. Production could commence
`
`the fourth year. The production order for the
`display component comes only after the com-
`mitment
`to production and sales have been
`made.
`
`The three-or-more-year delay from display
`prototype delivery to receipt of production
`order is a real negative aspect in any business
`plan for display development or in any present-
`value analysis or return-on-investment analysis.
`If a large investment is needed during the display
`prototype phase, the aspect of not getting pro-
`duction orders until three years after the first
`prototypes are delivered turns most investors
`away to greener pastures.
`The development of a new display technology
`is often very long and financially and technically
`
`
`
`Page