Paper No.
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`__________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`___________________
`
`INTELLECTUAL VENTURES MANAGEMENT, LLC
`Petitioner
`
`v.
`
`Patent of XILINX, INC.
`Patent Owner
`___________________
`
`Case IPR2012-00018
`Patent 7,566,960
`Title: INTERPOSING STRUCTURE
`_____________________
`
`Proposed Claim Amendments
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`
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`In accordance with 37 C.F.R. 42.121(b), the following claim listing shows
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`the proposed changes, with markings indicating changes in each proposed
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`substitute claim relative to its corresponding original claim. Congruent with the
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`Patent Trial and Appeal Board’s guidance, the amendments are presented
`
`following the example format provided in the Official Trial Practice Guide,
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`Section II.G.
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`
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`
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`–1–
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`XLNX-2009
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`
`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`__________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`___________________
`
`INTELLECTUAL VENTURES MANAGEMENT, LLC
`Petitioner
`
`v.
`
`Patent of XILINX, INC.
`Patent Owner
`___________________
`
`Case IPR2012-00018
`Patent 7,566,960
`Title: INTERPOSING STRUCTURE
`_____________________
`
`Proposed Claim Amendments
`
`
`
`In accordance with 37 C.F.R. 42.121(b), the following claim listing shows
`
`the proposed changes, with markings indicating changes in each proposed
`
`substitute claim relative to its corresponding original claim. Congruent with the
`
`Patent Trial and Appeal Board’s guidance, the amendments are presented
`
`following the example format provided in the Official Trial Practice Guide,
`
`Section II.G.
`
`
`
`
`
`–1–
`
`XLNX-2009
`
`
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`Claim Listing
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`Claims 1-13 (replaced by proposed substitutes).
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`14.
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`(Proposed substitute for original claim 1) An assembly, comprising:
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`an integrated circuit die having an array of micro-bumps disposed on a
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`surface of the integrated circuit die in a first pattern;
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`an integrated circuit package having an array of landing pads disposed on an
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`inside surface of the integrated circuit package in a second pattern and an array of
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`solder balls disposed on an outside surface of the integrated circuit package,
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`wherein the first pattern and the second pattern are substantially identical
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`patterns; and
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`[[an]] a plurality of tiled interposing structure structures disposed inside the
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`integrated circuit package between the integrated circuit die and the inside surface
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`of the integrated circuit package, at least one of the interposer interposing
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`structures electrically coupling a respective first micro-bump in a first position in
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`the array of micro-bumps to a respective first landing pad located opposite to the
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`first position and to a second landing pad in the array of landing pads.
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`Claim 15 (Proposed substitute for original claim 2): The assembly of claim [[1]]
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`14, wherein the interposing structures are held together using an elastomer a line
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`extending through the first micro-bump in a direction orthogonal to the surface of
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`
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`
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`–2–
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`XLNX-2009
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`
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`the integrated circuit does not extend through the second landing pad of the
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`integrated circuit package.
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`Claim 16 (Proposed substitute for original claim 3): The assembly of claim [[2]]
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`14, wherein the surface of the integrated circuit die is a major surface of the
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`integrated circuit die, and wherein the interposing structure has structures have a
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`collective major surface, and wherein the major surface of the integrated circuit die
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`and the collective major surface of the interposing structure structures have
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`roughly identical surface areas.
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`Claim 17 (Proposed substitute for original claim 4): The assembly of claim [[3]]
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`14, wherein at least one of the interposing structure structures includes comprises a
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`first conductive layer corresponding to a first capacitor for a first power supply and
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`a second conductive layer corresponding to a second capacitor for a second power
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`supply different from the first power supply no transistor and no PN junction.
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`Claim 18 (Proposed substitute for original claim 5): The assembly of claim [[4]]
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`14, wherein at least one of the interposing structure includes structures comprises a
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`first conductive layer for a first ground and a second conductive layer for a second
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`ground different from the first ground an array of micro-bumps, wherein the array
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`of micro-bumps of the interposing structure has a pattern that is substantially
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`–3–
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`XLNX-2009
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`
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`identical to the second pattern of the landing pads on the inside surface of the
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`integrated circuit package.
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`Claim 19 (Proposed substitute for original claim 6): The assembly of claim [[5]]
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`14, wherein at least one of the interposing structure structures comprises an AC
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`load structure to match a characteristic impedance includes a layer comprising
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`epoxy and fiberglass.
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`Claim 20 (Proposed substitute for original claim 7): The assembly of claim [[5]]
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`14, wherein at least one of the interposing structure structures comprises a DC load
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`structure to match a characteristic impedance includes a bypass capacitor.
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`Claim 21 (Proposed substitute for original claim 8): The assembly of claim [[5]]
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`14, wherein the first micro-bump is coupled to the first second landing pad at least
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`in part by a conductor disposed in a corresponding interposing structure selected
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`from the interposing structure structures, wherein the conductor disposed in the
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`corresponding interposing structure extends in a direction parallel to the surface of
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`the integrated circuit.
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`Claim 22 (Proposed substitute for original claim 9): An assembly, comprising:
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`an integrated circuit die having an array of micro-bumps disposed on a
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`surface of the integrated circuit die in a first pattern;
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`–4–
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`XLNX-2009
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`
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`an integrated circuit package having an array of landing pads disposed on an
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`inside surface of the integrated circuit package in a second pattern and an array of
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`solder balls disposed on an outside surface of the integrated circuit package,
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`wherein the first pattern and the second pattern are substantially identical patterns;
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`and
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`a plurality of tiled means for electrically coupling the array of landing pads
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`and the array of solder balls, the plurality of means being disposed inside the
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`integrated circuit package between the integrated circuit die and the inside surface
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`of the integrated circuit package;
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`wherein at least one of the plurality of means for electrically coupling
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`couples a respective first micro-bump in a first position in the array of micro-
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`bumps to a respective first landing pad disposed opposite the first position and to a
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`second landing pad located in a different position in the array of landing pads, the
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`means being disposed inside the integrated circuit package between the integrated
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`circuit die and the inside surface of the integrated circuit package.
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`Claim 23 (Proposed substitute for original claim 10): The assembly of claim [[9]]
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`22, wherein the plurality of means are held together using an elastomer means is
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`also for providing a bypass current to the integrated circuit die.
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`–5–
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`XLNX-2009
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`
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`Claim 24 (Proposed substitute for original claim 11): The assembly of claim [[9]]
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`22, wherein the surface of the integrated circuit die is a major surface of the
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`integrated circuit die, and wherein the plurality of means has a collective major
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`surface, and wherein the major surface of the integrated circuit die and the
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`collective major surface of the plurality of means have roughly identical surface
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`areas.
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`Claim 25 (Proposed substitute for original claim 12): The assembly of claim [[9]]
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`22, wherein at least one of the plurality of means comprises a first conductive layer
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`corresponding to a first capacitor for a first power supply and a second conductive
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`layer corresponding to a second capacitor for a second power supply different from
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`the first power supply has a planar form and is less than 500 microns thick.
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`Claim 26 (Proposed substitute for original claim 13): The assembly of claim [[9]]
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`22, wherein at least one of the plurality of means comprises an AC load structure
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`to match a characteristic impedance the integrated circuit die is an application
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`specific integrated circuit (ASIC).
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`–6–
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`XLNX-2009
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