Exhibit 1029
`
`
`
`é Exhibit 1029
`,.._, _¥,_.#_...._.__. .ivfivh. -...._._.. W
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`Page OOOWO
`
`

`

`
`
`AUTOMOTIVE
`
`ELECTRONICS
`
`HANDBOOK
`
`
`Ronald K. Jurgen Editorin Chief
`
`McGraw-Hill, Inc.
`Neonrk SanFrancisco Washington,D‘C Auckland Bogota
`Caracas Lisbon London Madrid MexicoCity Milan
`Montreal NewDelhi SanJuan Singapore
`Sydney Tokyo Toronto
`
`Page 000002
`
`

`

`Library of Congress Cataloging-in-Publication Data
`
`Automotive electronics handbook / Ronald Jurgen, editor in chief.
`p.
`cm.
`Includes index.
`ISBN 0-07-033189-8
`l. AutomobilesiElectronic equipment.
`TL272.5.A982
`1994
`629.25'49—dc
`
`I. Jurgen. Ronald K.
`
`94739724
`CIP
`
`Copyright © 1995 by McGraw-Hill. Inc. All rights reserved. Printed in the
`United States of America. Except as permitted under the United States
`Copyright Act of 1976, no part of this publication may be reproduced or dis-
`tributed in any form or by any means, or stored in a data base or retrieval
`system, without the prior written permission of the publisher.
`
`1234567890 AGMI’AGM 90987654
`
`ISBN 0-O7«033I89-8
`
`The sponsoring editor for this book was Stephen S. Chapman, the editing
`supervisor was Virginia Carroll, and the production supervisor was
`Suzanne W B. Rapcavage. It was set in Times Roman by North Market
`Street Graphics.
`
`Printed and bound byArcata Graphics/Martinsburg.
`
`McGraW-Hill books are available at special quantity discounts to use as pre—
`miums and sales promotions, or for use in corporate training programs. For
`more information, please write to the Director of Special Sales, McGraw7
`Hill, Inc.. 11 West 19th Street, New York, NY 100! 1. Or contact your local
`bookstore.
`
`Information contained in this work has been obtained by McGraw-
`Hill, Inc. from sources believed to be reliable. However, neither
`McG raw—Hill nor its authors guarantee the accuracy or complete
`ness of any information published herein. and neither McGraWA
`Hill nor its authors shall be responsible for any errors, omissions,
`or damages arising out of use of this information. This work is
`published with the understanding that McGraw—Hill and its authors
`are supplying information, but are not attempting to render engi-
`neering or other professional
`services.
`If such services are
`required. the assistance of an appropriate professional should be
`
`sought.
`
`This book is printed on acidvfree paper.
`
`Page 000003
`
`

`

`11.24
`
`CONTROL SYSTEMS
`
`Ambient temperature under bias (TA) refers to the temperature range that the microcon—
`troller is guaranteed to operate at within a given application. While powered—up or operating,
`a microcontroller must not be subjected to temperatures that exceed its specified ambient
`temperature range.The most common ambient temperature ranges in industry are:
`Commercial
`0 to +70 °C
`Extended
`~40 to +85 OC
`Automotive
`740 to +125 OC
`
`11g MEMORYi
`
`Mierocontrollers execute customized programs that are written by the user. These programs
`are stored in either on—ehip or off—chip memory and are often referred to as the user’s code. On-
`ehip memory is actually integrated onto the same piece of silicon as the microcontroller and is
`accessed over the internal data bus. Off-chip memory exists on a separately packaged piece of
`silicon and is typically accessed by the microcontroller over an external address/data bus
`A memory map shows how memory addresses are arranged in a particular microcon-
`troller. Figure 11.19 shows a typical microcontroller memory map.
`
`Address
`
`1
`
`Memory Function
`
`External Memory
`
`2000h
`
`lntemal ROM/EPROM or Extemal Memory
`(lnten'upt vednre, 008's, Sammy Kay. Reeorved beetlone, etc.)
`
`1FFFh
`
`1‘
`lntemal Special Function Registers (SFR‘s)
`l
`1‘
`*_V,,1F9°,h_ .1 ,,,,,,,,,,,,,,,,,,,,,,,,,,
`‘
`iEFFh
`‘
`3
`’
`
`0600h
`
`External Memory
`
`05FFh """""""""""""""""
`
`
`03FFh
`
`_
`
`_
`
`‘
`
`‘
`
`Upper Register Flle (Address
`i with Indlrect or Indexed
`Reglster RAM
`, 91,09?! ____________ We? enough Wm).
`OOFFh
`Lower Reglster File
`Regls‘ter RAM
`(Mdms Wflh direct,
`.3319“. ,,,,,,,,,,,,, Indirect or indexed
`_
`,
`,
`1 h
`7
`CPU SFRs
`Md”)
`OOOOh
`
`Reglstor
`
`Flle
`
`FIGURE 11.19 Microcontroller memory map
`
`Page 000004
`
`

`

`AUTOMOTIVE MICROCONTROLLERS
`
`11.25
`
`Memory is commonly referred to in terms of Kbytes of memory. One Kbyte is defined as
`1024 bytes of data. Memory is most commonly arranged in bytes which consist of 8 bits of
`data. For instance, a common automotive EPROM is referred to as a “256k x 8 EPROM". This
`EPROM contains 256-Kbytes 8—bit memory locations or 2.097.152 bits of information.
`
`11.2.1 On-Chip Memory
`
`On—chip microcontroller memory consists of some mix of five basic types: random access mem—
`ory (RAM),read—only memory (ROM), erasable ROM (EPROM), electrically erasable ROM
`(EPROM). and flash memory. RAM is typically utilized for run—time variable storage and
`SFRs. The various types of ROM are generally used for code storage and fixed data tables.
`The advantages of on—chip memory are numerous, especially for automotive applications.
`which are very size and cost conscious. Utilizing on—chip memory eliminates the need for
`external memory and the “glue" logic necessary to implement an address/data bus system.
`External memory systems are also notorious generators of switching noise and RH due to
`their high clock rates and fast switching times. Providing sufficient on—chip memory helps to
`greatly reduce these concerns.
`
`RAM. RAM may be defined as memory that has both read and write capabilities so that the
`stored information can be retrieved (read) and changed by applying new information to the
`cell (write). RAM found on microeontrollers is that of the static type that uses transistor cells
`connected as flip—flops.A typical six—transistor CMOS RAM cell is shown in Fig. 11.20. lt con~
`sists of two cross—coupled CMOS inverters to store the data and two transmission gates, which
`provide the data path into or out of the cell.The most significant characteristic of static mem—
`ory is that it loses its memory contents once power is removed. After power is removed. and
`once it is reapplied, static microcontroller RAM locations will revert to their default state of
`a logic “0”. Because of the number of transistors used to construct a single cell, RAM mem—
`ory is typically larger per bit than EPROM or ROM memory.
`Although code typically cannot be executed from register RAM. a special type of RAM
`often referred to as code RAM is useful for downloading small segments of executable code.
`The difference between code and register RAM is that code RAM can be accessed via the
`
`Voc
`
`Vec
`
`as a:
`
`
`
`
`
`
`
`
` ll
`
`a
`
`In column
`
`
`
`l
`
`Transmlssb Gate
`n
`mww='0'.
`
`Page 000005
`
`
`
`Ineolumn
`
`
`
`
`
`Transmbsbn Gm
`mR/W='°'-
`
`’
`
`
`’
`
`9 E
`
`
`‘—
`
`FIGURE 11.20 CMOS RAM memory cell.
`
`V93
`
`V33
`
`

`

`11.26
`
`CONTROL SYSTEMS
`
`memory controller. thus allowing code to be executed from it. Code RAM is especially useful
`for end-of—line testing during ECU manufacturing by allowing test code to be downloaded via
`the serial port peripheral.
`
`ROM. Read-only memory (ROM), as the name implies. is memory that can be read but not
`written to. ROM is used for storage of user code or data that does not change since it is a non-
`volatile memory that retains its contents after power is removed. Code or data is either
`entered during the manufacturing process (masked ROM. or MROM) or by later program-
`ming (programmable ROM, or PROM); either way, once entered it is unalterable.
`A ROM cell by itself (Fig. 11.21) is nothing more than a transistor. ROM cells must be used
`in a matrix of word and bit lines (as shown in Fig. 11.22) in order to store information. The
`word lines are connected to the address decoder and the bit lilies are connected to output
`buffers.'l'he user‘s code is permanently stored by including or omitting individual cells at word
`anc bit line junctions within the ROM array. For MROMs, this is done during wafer fabrica-
`tion. For PROMs, this is done by blowing a fuse in the source/drain connection of each cell. To
`read an address within the array. the address decoder applies the address to the memory
`ma rix. For any given intersection of a word and bit line, the absence of a cell transistor allows
`no current to flow and causes the transistor to be off. This indicates an unprogrammed ROM
`cell, The presence of a complete cell conducts and is sensed as a logical 0, indicating a pro-
`grammed cell.The stored data on the bit lines is then driven to the output buffers.
`\1ROIV15 are typically used for applications whose code is stable and in volume produc-
`tion. After the development process is complete and the user's program has been verified, the
`user submits the ROM code to the microcontroller manufacturer.The microcontrollcr manu—
`fac urer then produces a mask that is used during manufacturing to permanently embed the
`program within the microcontroller. This mask layer either enables or disables individual
`ROM cells at the junctions of the word and bit lines. An advantage of MROM microcon-
`tro.lers is that they come with user code embedded. which saves time and money since post—
`production programming is not necessary. A disadvantage of MROM devices is that, since the
`mask with the user code has to be supplied early in the manufacturing process. throughput
`time (TPT) is longer.
`Some versions of ROM (such as Intel’s Quick«ROM) are actually not ROMS. but rather
`EPROMs. which are programmed at
`the factory. These devices are packaged in plastic
`devices. which prevents them from being erased since ultraviolet light cannot be applied to
`the actual EPROM array. Throughput time for QROMs is faster since the user code isn't
`required until after the actual manufacturing of the microcontroller is complete. As with
`
`
`
`W D
`
`RAIN
`
`GATE __’
`
`SOURCE
`
`Page 000006
`
`Diagram
`
`(GATE
`
`
`GATE OX]DE
`
`
`(SOURCE)
`(DRAIN)
`
`
`
`P SUBSTRATE
`
`FIGURE 11.21 ROM memory cell,
`
`

`

`AUTOMOTIVE MICROCONTROLLERS
`
`11.27
`
`WORD lines from address decoder
`
`0
`
`1
`
`2
`
`3
`
`
`
`
`
`
`
`BITlinestooutputbuffers
`
`FIGURE 11.22 Simplified ROM memory matrix.
`
`MROMS, the user supplies the ROM code to the microcontrollcr manufacturer. Instead of
`creating a mask with the ROM code, the manufacturer programs it into the device just prior
`to final test.
`
`EPROM. EPROM devices are typically used during application development since this is
`when user code is changed often. EPROMs are delivered to the user unprogrammed. This
`allows the user to program the code into memory just prior to installation into an ECU mod-
`ule. Many EPROM microcontrollers actually provide a mechanism for in—module program-
`ming. This feature allows the user to program the device via the serial port while it is installed
`in the module. EPROM devices come assembled in packages either with or without a trans-
`parent window. Windowed devices are true EPROM devices that allow the user to erase the
`memory contents by exposing the EPROM array to ultraviolet light. These devices may be
`reprogrammed over and over again and thus are ideally suited for system development and
`debug during which code is changed often. EPROM devices assembled in a package without a
`window are commonly referred to as one-time programmable devices or OTPs. OTPs may only
`be programmed once, since the absence of a transparent window prevents UV erasure. OTPs
`are suited for limited production validation (PV) builds in which the code will not be erased.
`A typical EPROM cell is shown in Fig. 11.23. It is basically an N-channel transistor that has
`an added polyl floating gate to store charge. This floating gate is not connectcd and is sur-
`rounded by insulating oxide that prevents electron flow. The mechanism used to program an
`EPROM cell is known as hot electron injection. Hot electron injection occurs when very high
`drain (9-V) and select gate (12-V) voltages are applied.This gives the negatively charged elec-
`trons enough encrgy to surmount the oxide barrier and allows them to be stored on the gate.
`
`Page 000007
`
`

`

`11.28
`
`CONTROL SYSTEMS
`
`This has the same effect as a negative applied gate voltage and turns the transistor off. When
`the cell is unprogrammed, it can be turned on like a normal transistor by applying 5 V to the
`poly2 select gate.When it is programmed. the 5 V will not turn on the cellThe state of the cell
`is determined by attempting to turn on the cell and detecting if it turns on, Erasure is per-
`formed through the application of ultraviolet (L‘ V) light, which gives just the right amount of
`energy necessary for negatively charged electrons to surmount the oxide barrier and leave the
`floating gate.
`
`Dhamm
`
`(GATE)
`
` . GATE OXIDE
`W (DRAIN)
`
`PSUBSTHATE
`
`FIGURE 11.23 EPROM memory cell.
`
`Whirl
`
`DRAIN
`
`am; ‘i H
`J
`
`”1%“
`
`SOURCE
`
`Flash memory is the newest nonvolatile memory technology and is very similar to
`Flash.
`EPROM. The key difference is that flash memory can be electrically erased. Once programmed,
`flash memory contents remain intact until an erase cycle is initiated via software. Like EEPROM.
`flash memory requires a programming and erase voltage of approximately 12.0 V. Since a clean.
`regulated llV reference is not readily available in automotive environments, this need is often
`provided for through the incorporation of an on—clrip charge pump. The charge pump produces
`the voltage and current necessary for programming and erasure from the standard S—V supply
`voltage. The advantage of flash is in its capability to be programmed and erased inimodule with-
`out having to be removed. ln—module reprogrammability is desirable since in-vehicle validation
`testing doesn't always allow for easy access to the microcontroller. Flash also allows for last-
`minute code changes. data table upgrades, and general code customization during ECU assem-
`bly. Since a flash cell is nearly identical in size to that of an EPROM cell, the high reliability and
`high device density capable with EPROM is retained.The main disadvantage of flash is the need
`for an on-chip charge pump and special program and erase circuitry, which adds cost.
`A flash memory cell is essentially the same as an EPROM cell, with the exception of the
`floating gate. The difference is a thin oxide layer which allows the cell to be electrically erased.
`The mechanism used to erase data is known as Fowler-Nordheim tunneling, which allows the
`charge to be transferred from the floating gate when a large enough field is created. l-lot elec-
`tron injection is the mechanism used to program a cell, exactly as is done with EPROM cells.
`When the floating gate is positively charged, the cell will read a “1”. when negatively charged,
`the cell will read a “0”.
`
`EEPROM. EEPROM (electrically erasable and programmable ROM, commonly referred to
`as EZROM) is a ROM that can be electrically erased and programmed. Once programmed, EEP-
`ROM contents remain intact until an erase cycle is initiated via software. Like flash,programming
`and erase voltages of approximately 12 V are required. Since a clean. regulated lZ—V reference is
`not readily available in automotive environments, this requirement is satisfied using an on-chip
`charge pump as is done for flash memory arrays. Like flash, the advantage of EEPROM is its
`
`
`
`Page 000008
`
`

`

`AU'I‘OMO'l’lVl: MICROCONTROLLERS
`
`11.29
`
`capability to be programmed and erased inemodulefl'his allows the user to erase and program the
`device in the module without having to remove it. EEPROM‘s most significant disadvantage is
`the need for an on—chip charge pump. Special program and erase circuitry also adds cost.
`An EEPROM cell is essentially the same as an EPROM cell with the exception of the
`floating gate being isolated by a thin oxide layer. The main difference from flash is that
`Fowler-Nordheim electron tunneling is used for both programming and erasure. This mecha-
`nism allows charge to be transferred to or from the floating gate (depending upon the polar-
`ity of the field) when a large enough field is created. When the floating gate is positively
`charged, the cell will read a “1”:when negatively charged, the cell will read a “()“t
`
`11.2.2 Off-Chip Memory
`
`Off—chip memory offers the most flexibility to the system designer. but at a price; it takes up
`additional PCB real estate as well as additional [/0 pins. In cost- and size-conscience applica-
`tions, such as automotive ABS, system designers almost exclusively use on-ehip memory.
`However, when memory requirements grow to sizes in excess ofwhat is offered on-chip (such
`as is common in electronic engine control), the system designer must implement an ()l‘fechip
`memory system. Off-chip memory is flexible because the user can implement various memory
`devices in the configuration of his choice. Most microcontrollers on the market today offer a
`wide variety of control pins and timing modes to allow the system designer flexibility when
`interfacing to a wide range of external memory systems.
`
`If circuit designers must use external memory in their tipplii
`Accessing External Memory.
`cations, the type of external address/data bus incorporated onto the microcontroller should be
`considered. If external memory is not used, this will have, if any, impact upon the application.
`There are two basic types of interfaces used in external memory systems. Both of these are
`parallel interfaces in which bits of data are moved in a parallel fashion and are referred to as
`multiplexed and demultiplexed address/data buses.
`
`Multiplexed Address/Data Buses. As the name implies, multiplexed address/data buses
`allow the address as well as the data to he passed over the same mierocontroller pins by mul-
`tiplexing the two in time. Figure 11.24 illustrates a typical multiplexed 16-bit address/data bus
`system as is implemented with Intel’s 8XC196KX family of microcontrollers.
`
`
`
`a
`
`EPROM
`
`DATA
`
`EPROM
`
`(High)
`
`LOW ADDRESS
`
`ALE / ADV
`
`
`=l
`
`ADO-7
`
`373
`
`
`
`II73?:II HIGHADDRESS I HIGHADDRESS
`
`(Low)
`
`
`9‘“
`
`
`LOW ADDRESS
`
`
`
`
`
`8XC196KX
`
`
`
`
`FIGURE 11.24 Multiplexed address/data bus system.
`
`Page 000009
`
`