Case 1:16-cv-00290-MN Document 75-1 Filed 06/29/18 Page 1 of 6 PageID #: 1703
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`Case 1:16-cv-00290-MN Document 75-1 Filed 06/29/18 Page 1 of 6 PageID #: 1703
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`EXHIBIT A
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`EXHIBIT A
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`Case 1:16-cv-00290-MN Document 75-1 Filed 06/29/18 Page 1 of 6 PageID #: 1703
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`EXHIBIT A
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`EXHIBIT A
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`US Patent
`(Claims)
`6,538,324
`(1, 5)
`
`6,709,950
`(12, 17)
`
`6,709,950
`(12, 17)
`
`6,709,950
`(12)
`
`6,709,950
`(12)
`
`6,709,950
`(12)
`
`Case 1:16-cv-00290-MN Document 75-1 Filed 06/29/18 Page 2 of 6 PageID #: 1704
`EXHIBIT A – JOINT CLAIM CONSTRUCTION CHART
`
`Claim Term
`
`IPB’s Construction
`
`OmniVision’s Construction
`
`multi-layered
`structure of first
`and second films
`
`trench isolation on
`the semiconductor
`substrate
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`
`insulating material filling a trench, which
`is etched into the semiconductor substrate
`
`forming . . . on
`
`formed directly or indirectly on
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`
`a sixth step of forming a laminated film
`made of a silicon oxide film and a silicon
`nitride film directly or indirectly on the
`entire top surface of the substrate
`
`first sidewalls on
`both side surfaces
`of the gate
`electrode
`second sidewalls on
`a side surface of a
`step portion
`
`a sixth step of
`forming a
`laminated film
`made of a silicon
`oxide film and a
`silicon nitride film
`on the entire top
`surface of the
`substrate
`
`1
`
`multi-layered structure of first and second
`films covering the entire bottom and sidewalls
`of the copper wiring layer
`
`This term has its plain and ordinary meaning
`and need not be construed.
`
`
`This term has its plain and ordinary meaning
`and need not be construed.
`
`first sidewalls substantially covering both side
`surfaces of the gate electrode
`
`
`second sidewalls substantially covering a side
`surface of a step portion
`
`
`a sixth step of forming a laminated film made
`of a layer of silicon oxide film over or under a
`layer of silicon nitride film on the entire top
`surface of the substrate
`
`
`
`
`
`US Patent
`(Claims)
`6,794,677
`(1, 4)
`
`6,794,677
`(1)
`
`6,794,677
`(4)
`
`6,794,677
`(1)
`
`Case 1:16-cv-00290-MN Document 75-1 Filed 06/29/18 Page 3 of 6 PageID #: 1705
`EXHIBIT A – JOINT CLAIM CONSTRUCTION CHART
`
`Claim Term
`
`IPB’s Construction
`
`OmniVision’s Construction
`
`sum perimeter . . .
`per unit area
`
`a sum perimeter of
`the first linear
`pattern, the second
`linear pattern, and
`the dummy pattern
`per unit area is
`equal to or less than
`a perimeter of the
`first linear pattern
`per unit area.
`a sum perimeter of
`the first gate
`electrode pattern,
`the second gate
`electrode pattern,
`and the dummy
`pattern per unit area
`is equal to or less
`than a perimeter of
`the first gate
`electrode pattern
`per unit area.
`
`a dummy pattern
`being inserted in
`the region in which
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`Indefinite
`
`
`Indefinite
`
`
`In the alternative only, this term may be
`construed as: a perimeter per unit area of
`the first pattern, second pattern, and the
`dummy pattern is equal to or less than the
`perimeter per unit area of the first linear
`pattern.
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`In the alternative only, this term may be
`construed as: a perimeter per unit area of
`the first gate electrode pattern, the second
`gate electrode pattern, and the dummy
`pattern is equal to or less than the
`perimeter per unit area of the first gate
`electrode pattern.
`
`
`Indefinite
`
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`
`Indefinite
`
`2
`
`
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`Case 1:16-cv-00290-MN Document 75-1 Filed 06/29/18 Page 4 of 6 PageID #: 1706
`EXHIBIT A – JOINT CLAIM CONSTRUCTION CHART
`
`US Patent
`(Claims)
`
`Claim Term
`
`IPB’s Construction
`
`OmniVision’s Construction
`
`In the alternative only, this term may be
`construed as: a dummy pattern being
`inserted in the logic region in which the
`second circuit pattern is placed.
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`
`
`Indefinite
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`Indefinite
`
`
`
`the second circuit
`pattern is placed
`
`
`a dummy pattern
`being inserted in
`the logic region in
`which the second
`circuit pattern is
`placed
`
`a plurality of read-
`out lines each being
`selectively
`connected to at
`least two of the
`[plurality of]
`transfer transistors
`
`photodiode
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`a photoelectric conversion section where
`incident light is converted to electric energy
`and where photoelectric converted charges are
`stored.
`
`’401, ’796 (claim
`1): a plurality of
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`Indefinite
`
`
`3
`
`6,794,677
`(4)
`
`8,378,401
`(1, 29)
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`8,084,796
`(1, 3)
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`8,106,431
`(1, 5, 9)
`8,378,401
`(1, 4, 29)
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`8,084,796
`(1, 3)
`
`8,106,431
`(1, 4, 5, 9, 12)
`8,378,401
`(1, 29)
`
`
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`US Patent
`(Claims)
`
`
`8,084,796
`(1, 3)
`
` 8,106,431
`(1, 4, 5, 9)
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`Case 1:16-cv-00290-MN Document 75-1 Filed 06/29/18 Page 5 of 6 PageID #: 1707
`EXHIBIT A – JOINT CLAIM CONSTRUCTION CHART
`
`Claim Term
`
`IPB’s Construction
`
`OmniVision’s Construction
`
`
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`floating diffusion
`sections each being
`connected to ones
`of the plurality of
`photodiodes via
`each of a plurality
`of transfer
`transistors
`
`’431 (claims 1, 5,
`9),’796 (claim 3): a
`plurality of floating
`diffusion sections
`each being
`connected to ones
`of the photodiodes
`via each of a
`plurality of transfer
`transistors
`
`‘431 (claim 4):
`wherein each of
`said plurality of
`floating diffusion
`sections is shared
`by said ones of the
`plurality of
`photodiodes which
`are adjacent to each
`other in the column
`direction
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`4
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`Case 1:16-cv-00290-MN Document 75-1 Filed 06/29/18 Page 6 of 6 PageID #: 1708
`EXHIBIT A – JOINT CLAIM CONSTRUCTION CHART
`
`Claim Term
`
`IPB’s Construction
`
`OmniVision’s Construction
`
`the plurality of
`read-out lines are
`disposed between
`the first and the
`second photodiodes
`the first read-out
`line and the second
`read-out line are
`disposed between
`the row n and the
`row n+1
`one of the plurality
`of reset pulse lines
`is disposed between
`the row n+1 and the
`row n+2
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`the first read-out
`line is adjacent to
`the second read-out
`line
`one of the column n
`and the column n+1
`is disposed between
`one of the plurality
`of signal lines and
`the other of the
`column n and the
`column n+1
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`Indefinite
`
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`This term has its plain and ordinary
`meaning and need not be construed.
`
`5
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`the first read-out line and the second read-out
`line are located within the space defined by
`the adjacent edges of the row n of photodiodes
`and the row n+1 of photodiodes
`
`
`one of the plurality of reset pulse lines is
`located within the space defined by the
`adjacent edges of the row n+1 of photodiodes
`and the row n+2 of photodiodes
`
`
`the first readout line is directly next to the
`second readout line
`
`one of the column n and the column n+1 is
`located within the space defined by the
`adjacent edges of one of the plurality of signal
`lines and the other of the column n and the
`column n+1, and wherein no signal lines are
`located within the space defined by the
`adjacent edges of the column n and the
`column n+1
`
`US Patent
`(Claims)
`8,084,796
`(1, 3)
`
`8,106,431
`(1, 5, 9)
`
`8,106,431
`(1, 5, 9)
`
`8,378,401
`(1, 29)
`
`8,378,401
`(1, 29)
`
`
`
`
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