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Displaying 219-233 of
251 results
2049 Exhibit: Patent Owners Demonstrative Exhibits
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IPR2020-01008, No. 2049 Exhibit - Patent Owners Demonstrative Exhibits (P.T.A.B. Sep. 10, 2021)
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1055 Exhibit: Ex 1055
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IPR2020-01008, No. 1055 Exhibit - Ex 1055 (P.T.A.B. May. 24, 2021)
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2005 Exhibit: Curriculum Vitae of Kelin Kuhn, PhD CV
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IPR2020-01008, No. 2005 Exhibit - Curriculum Vitae of Kelin Kuhn, PhD CV (P.T.A.B. Mar. 1, 2021)
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2036 Exhibit: US Patent No 6,107,125
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IPR2020-01008, No. 2036 Exhibit - US Patent No 6,107,125 (P.T.A.B. Mar. 1, 2021)
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2022 Exhibit: Divisional Standing Order Regarding Trials in Waco, August 18, 2020
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IPR2020-01008, No. 2022 Exhibit - Divisional Standing Order Regarding Trials in Waco, August 18, 2020 (P.T.A.B. Sep. 10, 2020)
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2030 Exhibit: Corrected Dennard et al, MOSFET Miniaturization From One Micron t...
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IPR2020-01008, No. 2030 Exhibit - Corrected Dennard et al, MOSFET Miniaturization From One Micron to the Limits 1985 Dennard (P.T.A.B. Jul. 22, 2021)
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2038 Exhibit: Corrected Skotnicki et al, A New Punchthrough Current Model Based...
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IPR2020-01008, No. 2038 Exhibit - Corrected Skotnicki et al, A New Punchthrough Current Model Based on the Voltage Doping Transformation, July 1988 Skotnicki (P.T.A.B. Jul. 22, 2021)
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2041 Exhibit: Corrected Vanstraelen al, New Concepts for Integrated Solid State D...
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IPR2020-01008, No. 2041 Exhibit - Corrected Vanstraelen al, New Concepts for Integrated Solid State Detector Electronics, December 1988 (P.T.A.B. Jul. 22, 2021)
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2029 Exhibit: Corrected Barnes et al, Short Channel MOSFETs in the Punchthroug...
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IPR2020-01008, No. 2029 Exhibit - Corrected Barnes et al, Short Channel MOSFETs in the Punchthrough Current Mode, April 1979 Barnes (P.T.A.B. Jul. 22, 2021)
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2048 Exhibit: Transcript of Deposition of Dr Bravman, July 9, 2021
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IPR2020-01008, No. 2048 Exhibit - Transcript of Deposition of Dr Bravman, July 9, 2021 (P.T.A.B. Jul. 19, 2021)
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2040 Exhibit: Corrected Simeonov et al, Punchthrough Limits in Conventional and G...
Document
IPR2020-01008, No. 2040 Exhibit - Corrected Simeonov et al, Punchthrough Limits in Conventional and Graded Drain MOS Device, February 1991Simeonov (P.T.A.B. Jul. 22, 2021)
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2039 Exhibit: Corrected Vanstraelen et al, Short Channel pMOSTs in a High Resist...
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IPR2020-01008, No. 2039 Exhibit - Corrected Vanstraelen et al, Short Channel pMOSTs in a High Resistivity Silicon Substrate I Analytical Model, October 1992 Vanstraelen 1992 (P.T.A.B. Jul. ...
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2032 Exhibit: Corrected Bohr et al, A High Performance 035 um Logic Technology f...
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IPR2020-01008, No. 2032 Exhibit - Corrected Bohr et al, A High Performance 035 um Logic Technology for 33V and 25V Operation 1994 (P.T.A.B. Jul. 22, 2021)
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2042 Exhibit: Ohzone et al, Electrical Characteristics of Scaled CMOSFET���s with S...
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IPR2020-01008, No. 2042 Exhibit - Ohzone et al, Electrical Characteristics of Scaled CMOSFET���s with SourceDrain Regions Fabricated by 7�� and 0�� Tilt Angle Implantations, January 1995 Oh...
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2028 Exhibit: Godo Kaisha IP Bridge 1 v Micron Technology, Inc et al, Claim Constr...
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IPR2020-01008, No. 2028 Exhibit - Godo Kaisha IP Bridge 1 v Micron Technology, Inc et al, Claim Construction Order December 9, 2020 (P.T.A.B. Mar. 1, 2021)
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