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`WHATIS CLAIMEDJS:
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`1. A system to provide a low-powerclock signal or a low-noise clock signal, comprising:
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`a low-dropout voltage regulator (LDO);
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`a low-power bandgap voltage reference generator coupled to the LDO and configured
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`to provide a low-powervoltage reference to the LDO;
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`a low-noise bandgap voltage reference generator coupled to the LDO and configured
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`to provide a low-noise voltage reference to the LDO;
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`a switch configured to switch a voltage reference input of the LDO to the low-noise
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`bandgap voltage reference or to the low-power bandgap voltage reference; and
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`a crystal oscillator coupled to the LDO and configured to provide a low-power clock
`signal or a low-noise clock signal based on whether a low-noise voltage reference or a low-power
`voltage reference is selected as a voltage reference input to the LDO.
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`2. The system of claim 1, further comprising:
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`a control unit configured to provide a control signal to switch the voltage reference
`input of the LDO to the low-noise bandgap voltage reference for low-noise mode of operation
`and to switch the voltage reference input of the LDO to the low-power bandgap voltage reference
`for low-power modeofoperation.
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`The system of claim 2, wherein the control unit generates a signal to power down
`3.
`the low-noise bandgap voltage reference generator upon switching the voltage reference input of
`the LDO tothe low-power bandgap voltage reference and to power down the low-power bandgap
`voltage reference generator upon switching the voltage reference input of the LDO to the low-
`noise bandgap voltage reference.
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`The system of claim 1, wherein a bandgap noise current of the low-power
`4.
`bandgap voltage reference generator is smaller than a bandgap noise current of the low-noise
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`bandgap voltage reference generator.
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`BU 20586
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`Atty. Dkt. No. 2875.3140000
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`-17-
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`5.
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`The system of claim 1, wherein an emitter resistance of the low-noise bandgap
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`voltage reference generator is smaller than an emitter resistance of the low-power bandgap
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`voltage reference generator.
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`6.
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`The system of claim 1, wherein transistor sizes of the low-noise bandgap voltage
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`reference generator are greater than transistor sizes of the low-power bandgap voltage reference
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`generator.
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`7. A-system to provide a low-poweror a low-noise clock signal, comprising:
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`a crystal oscillator configured to provide an input clock signal;
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`a low-powerlimiter configured to receive the input clock signal and configured to
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`limit the input clock signal and generate a low-power output clock signal;
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`a low-noise limiter coupled to the crystal oscillator and configured to limit the input
`clock signal and generate a low-noise output clock signal; and
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`a switch coupled to the low-poweroutput clock signal and the low-noise output clock
`signal and configured to select either the low-noise output clock signal or the low-power output
`clock signal to be an output clock signal.
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`8. The system of claim 7, further comprising:
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`a control unit configured to provide a control signal to the switch to select the low-
`noise output clock signal for low-noise mode of operation and to select the low-power output
`clock signal for low-power modeofoperation.
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`The system of claim 8, wherein the control unit is configured to generate a signal
`9.
`to power down the low-noise limiter if the low-power output clock signal is selected and to
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`power down the low-powerlimiter if the low-noise output clock signal is selected.
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`BU 20586
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`Atty. Dkt. No. 2875.3140000
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`10.
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`The system of claim 7, wherein the low-power limiter is configured to limit the
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`clock signal input using a low bias current resulting in the low-power outputclock signal.
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`11.
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`The system of claim 7, wherein the low-noise limiter is configured to limit the
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`clock signal input using a high bias current resulting in a low-noise output clock signal.
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`12.
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`The system of claim 1, wherein a bias current of the low-power limiter is smaller
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`than a bias current of the low-noise limiter.
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`13.
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`The system of claim 1, wherein a size transistors of the low-power limiter is
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`smaller than a size of transistors of the low-noise limiter.
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`14.
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`The system of claim 7, wherein the switch is a mux.
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`15. A system to provide a clock signal, comprising:
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`a low-dropoutvoltage regulator (LDO);
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`a low-power bandgap voltage reference generator coupled to the low-dropout
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`regulator and configured to provide a low-powervoltage reference to the LDO;
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`a low-noise bandgap voltage reference coupled to the low-dropout regulator and
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`configured to provide a low-noise voltage reference to the LDO;
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`a first switch configured to switch a voltage reference input of the LDO to the low-
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`noise bandgap voltage reference or to the low-power bandgap voltage reference;
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`a crystal oscillator coupled to the LDO and configured to provide an input clock
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`signal;
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`a low-power limiter circuit coupled to the input clock signal and configured to
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`generate a low-power output clock signal;
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`BU 20586
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`Atty. Dkt. No. 2875.3140000
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`-19-
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`a low-noise limiter circuit coupled to the input clock signal and configured to generate
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`a low-noise output clock signal; and
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`a second switch configured to select the low-noise output clock signal or the low-
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`poweroutput clock signal;
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`16. The system of claim 15, further comprising:
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`at least one control unit configured to provide a control signal to switch the
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`voltage reference input of the LDO to the low-noise bandgap voltage reference and select
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`the low-noise output clock signal for low-noise mode of operation and to switch the
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`voltage reference input of the LDO to the low-power bandgap voltage reference and
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`select the low-poweroutput clock signal for low-power modeofoperation.
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`17. A methodto provide a low-powerclock signal or a low-noise clock signal, comprising:
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`determining whether a low-power mode of operation or a low-noise mode of
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`operation is in use;
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`switching a voltage reference input of a low-dropout voltage regulator (LDO) to a
`low-power voltage referenceor to a low-noise voltage reference;
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`providing a constant voltage output using the LDO to a crystal oscillator,
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`generating an input clock signal using the crystal oscillator;
`limiting the input clock signal using a low-power limiter to generate a low-power
`output clock signalor limiting the clock signal using a low-noise limiter to generate a low-noise
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`output clock signal; and
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`selecting the low-poweroutput clock signal or the low-noise output clocksignal.
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`18. The method of claim 17, further comprising:
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`powering down the low-power bandgap voltage reference generator and the low-
`powerlimiter upon switching to the low-noise voltage reference and uponselecting the
`low-noise output clock signal; and
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`BU 20586
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`Atty. Dkt. No. 2875.3140000
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`powering down the low-noise bandgap voltage reference generator and the low-
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`noise limiter upon switching to the low-power voltage reference and uponselecting the
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`low-power output clock signal.
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`19.
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`A tangible computer-readable medium having stored thereon, computer-executable
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`instructions that, if executed by a computing device, cause the computing device to perform
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`the steps of:
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`determining whether a low-power mode of operation or a low-noise mode of
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`operation is in use;
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`generating a first contro] signal to switch a voltage reference input of a low-
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`dropout voltage regulator (LDO) to a low-power voltage reference or to a low-noise voltage
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`reference; and
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`generating a second control signal to select a low-poweroutput clock signal from
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`a low-powerlimiter or a low-noise output clock signal from a low-noise limiter.
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`20.
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`The tangible computer-readable medium of claim 19, further comprising computer-
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`executable instructions that, if executed by a computing device, cause the computing device
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`to perform the steps of:
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`generating a third control signal to power-down the low-power bandgap voltage
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`reference generator and a fourth control signal
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`to power-down a low-power limiter upon
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`selecting the low-noise voltage reference and the low-noise output clock signal; and
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`generating a fifth control signal to power-down the low-noise bandgap voltage
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`reference generator and a sixth control signal to power-down a low-noise limiter upon selecting
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`the low-power voltage reference and the low-poweroutputclock signal.
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`BU 20586
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`Atty. Dkt. No. 2875.3140000
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