-16-
`
`WHATIS CLAIMEDJS:
`
`1. A system to provide a low-powerclock signal or a low-noise clock signal, comprising:
`
`a low-dropout voltage regulator (LDO);
`
`a low-power bandgap voltage reference generator coupled to the LDO and configured
`
`to provide a low-powervoltage reference to the LDO;
`
`a low-noise bandgap voltage reference generator coupled to the LDO and configured
`
`to provide a low-noise voltage reference to the LDO;
`
`a switch configured to switch a voltage reference input of the LDO to the low-noise
`
`bandgap voltage reference or to the low-power bandgap voltage reference; and
`
`a crystal oscillator coupled to the LDO and configured to provide a low-power clock
`signal or a low-noise clock signal based on whether a low-noise voltage reference or a low-power
`voltage reference is selected as a voltage reference input to the LDO.
`
`2. The system of claim 1, further comprising:
`
`a control unit configured to provide a control signal to switch the voltage reference
`input of the LDO to the low-noise bandgap voltage reference for low-noise mode of operation
`and to switch the voltage reference input of the LDO to the low-power bandgap voltage reference
`for low-power modeofoperation.
`
`The system of claim 2, wherein the control unit generates a signal to power down
`3.
`the low-noise bandgap voltage reference generator upon switching the voltage reference input of
`the LDO tothe low-power bandgap voltage reference and to power down the low-power bandgap
`voltage reference generator upon switching the voltage reference input of the LDO to the low-
`noise bandgap voltage reference.
`
`The system of claim 1, wherein a bandgap noise current of the low-power
`4.
`bandgap voltage reference generator is smaller than a bandgap noise current of the low-noise
`
`bandgap voltage reference generator.
`
`BU 20586
`
`Atty. Dkt. No. 2875.3140000
`
`

`

`-17-
`
`5.
`
`The system of claim 1, wherein an emitter resistance of the low-noise bandgap
`
`voltage reference generator is smaller than an emitter resistance of the low-power bandgap
`
`voltage reference generator.
`
`6.
`
`The system of claim 1, wherein transistor sizes of the low-noise bandgap voltage
`
`reference generator are greater than transistor sizes of the low-power bandgap voltage reference
`
`generator.
`
`7. A-system to provide a low-poweror a low-noise clock signal, comprising:
`
`a crystal oscillator configured to provide an input clock signal;
`
`a low-powerlimiter configured to receive the input clock signal and configured to
`
`limit the input clock signal and generate a low-power output clock signal;
`
`a low-noise limiter coupled to the crystal oscillator and configured to limit the input
`clock signal and generate a low-noise output clock signal; and
`
`a switch coupled to the low-poweroutput clock signal and the low-noise output clock
`signal and configured to select either the low-noise output clock signal or the low-power output
`clock signal to be an output clock signal.
`
`8. The system of claim 7, further comprising:
`
`a control unit configured to provide a control signal to the switch to select the low-
`noise output clock signal for low-noise mode of operation and to select the low-power output
`clock signal for low-power modeofoperation.
`
`The system of claim 8, wherein the control unit is configured to generate a signal
`9.
`to power down the low-noise limiter if the low-power output clock signal is selected and to
`
`power down the low-powerlimiter if the low-noise output clock signal is selected.
`
`BU 20586
`
`Atty. Dkt. No. 2875.3140000
`
`

`

`-18-
`
`10.
`
`The system of claim 7, wherein the low-power limiter is configured to limit the
`
`clock signal input using a low bias current resulting in the low-power outputclock signal.
`
`11.
`
`The system of claim 7, wherein the low-noise limiter is configured to limit the
`
`clock signal input using a high bias current resulting in a low-noise output clock signal.
`
`12.
`
`The system of claim 1, wherein a bias current of the low-power limiter is smaller
`
`than a bias current of the low-noise limiter.
`
`13.
`
`The system of claim 1, wherein a size transistors of the low-power limiter is
`
`smaller than a size of transistors of the low-noise limiter.
`
`14.
`
`The system of claim 7, wherein the switch is a mux.
`
`15. A system to provide a clock signal, comprising:
`
`a low-dropoutvoltage regulator (LDO);
`
`a low-power bandgap voltage reference generator coupled to the low-dropout
`
`regulator and configured to provide a low-powervoltage reference to the LDO;
`
`a low-noise bandgap voltage reference coupled to the low-dropout regulator and
`
`configured to provide a low-noise voltage reference to the LDO;
`
`a first switch configured to switch a voltage reference input of the LDO to the low-
`
`noise bandgap voltage reference or to the low-power bandgap voltage reference;
`
`a crystal oscillator coupled to the LDO and configured to provide an input clock
`
`signal;
`
`a low-power limiter circuit coupled to the input clock signal and configured to
`
`generate a low-power output clock signal;
`
`BU 20586
`
`Atty. Dkt. No. 2875.3140000
`
`

`

`-19-
`
`a low-noise limiter circuit coupled to the input clock signal and configured to generate
`
`a low-noise output clock signal; and
`
`a second switch configured to select the low-noise output clock signal or the low-
`
`poweroutput clock signal;
`
`16. The system of claim 15, further comprising:
`
`at least one control unit configured to provide a control signal to switch the
`
`voltage reference input of the LDO to the low-noise bandgap voltage reference and select
`
`the low-noise output clock signal for low-noise mode of operation and to switch the
`
`voltage reference input of the LDO to the low-power bandgap voltage reference and
`
`select the low-poweroutput clock signal for low-power modeofoperation.
`
`17. A methodto provide a low-powerclock signal or a low-noise clock signal, comprising:
`
`determining whether a low-power mode of operation or a low-noise mode of
`
`operation is in use;
`
`switching a voltage reference input of a low-dropout voltage regulator (LDO) to a
`low-power voltage referenceor to a low-noise voltage reference;
`
`providing a constant voltage output using the LDO to a crystal oscillator,
`
`generating an input clock signal using the crystal oscillator;
`limiting the input clock signal using a low-power limiter to generate a low-power
`output clock signalor limiting the clock signal using a low-noise limiter to generate a low-noise
`
`output clock signal; and
`
`selecting the low-poweroutput clock signal or the low-noise output clocksignal.
`
`18. The method of claim 17, further comprising:
`
`powering down the low-power bandgap voltage reference generator and the low-
`powerlimiter upon switching to the low-noise voltage reference and uponselecting the
`low-noise output clock signal; and
`
`BU 20586
`
`Atty. Dkt. No. 2875.3140000
`
`

`

`-20-
`
`powering down the low-noise bandgap voltage reference generator and the low-
`
`noise limiter upon switching to the low-power voltage reference and uponselecting the
`
`low-power output clock signal.
`
`19.
`
`A tangible computer-readable medium having stored thereon, computer-executable
`
`instructions that, if executed by a computing device, cause the computing device to perform
`
`the steps of:
`
`determining whether a low-power mode of operation or a low-noise mode of
`
`operation is in use;
`
`generating a first contro] signal to switch a voltage reference input of a low-
`
`dropout voltage regulator (LDO) to a low-power voltage reference or to a low-noise voltage
`
`reference; and
`
`generating a second control signal to select a low-poweroutput clock signal from
`
`a low-powerlimiter or a low-noise output clock signal from a low-noise limiter.
`
`20.
`
`The tangible computer-readable medium of claim 19, further comprising computer-
`
`executable instructions that, if executed by a computing device, cause the computing device
`
`to perform the steps of:
`
`generating a third control signal to power-down the low-power bandgap voltage
`
`reference generator and a fourth control signal
`
`to power-down a low-power limiter upon
`
`selecting the low-noise voltage reference and the low-noise output clock signal; and
`
`generating a fifth control signal to power-down the low-noise bandgap voltage
`
`reference generator and a sixth control signal to power-down a low-noise limiter upon selecting
`
`the low-power voltage reference and the low-poweroutputclock signal.
`
`BU 20586
`
`Atty. Dkt. No. 2875.3140000
`
`

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