Attorney Docket No. SKYW00056-1C US
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`FRONT CONTACT SOLAR CELL WITH FORMED EMITTER
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`Inventor: Peter John Cousins
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`REFERENCE TO RELATED APPLICATIONS
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`This application is a continuation of U.S. Application No. 16/460,035, filed July 2,
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`2019, whichis a continuation of U.S. Application No. 14/504,771, filed on October2,
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`2014, whichis a continuation of U.S. Application No. 13/495,577, filed on June 13,
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`2012, now U.S. Patent No. 8,878,053, which is a divisional of U.S. Application No.
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`12/070,742, filed on February 20, 2008, now U.S. Patent No. 8,222,516. The just-
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`mentioned disclosures are incorporated herein by referencein their entirety.
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`BACKGROUND OF THE INVENTION
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`1.
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`Field of the Invention
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`The present invention relates generally to solar cells, and more particularly but
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`not exclusively to solar cell fabrication processes and structures.
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`2.
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`Description of the Background Art
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`Solar cells are well known devices for converting solar radiation to electrical
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`20
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`energy. They may befabricated on a semiconductor wafer using semiconductor
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`processing technology. A solar cell includes P-type and N-type diffusion regions that
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`form a junction. Solar radiation impinging on the solar cell creates electrons and holes
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`that migrate to the diffusion regions, thereby creating voltage differentials between the
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`FRONT CONTACT SOLAR CELL WITH FORMED EMITTER
`
`Inventor: Peter John Cousins
`
`REFERENCE TO RELATED APPLICATIONS
`
`This application is a continuation of U.S. Application No. 16/460,035, filed July 2,
`
`2019, whichis a continuation of U.S. Application No. 14/504,771, filed on October2,
`
`2014, whichis a continuation of U.S. Application No. 13/495,577, filed on June 13,
`
`2012, now U.S. Patent No. 8,878,053, which is a divisional of U.S. Application No.
`
`12/070,742, filed on February 20, 2008, now U.S. Patent No. 8,222,516. The just-
`
`mentioned disclosures are incorporated herein by referencein their entirety.
`
`BACKGROUND OF THE INVENTION
`
`1.
`
`Field of the Invention
`
`The present invention relates generally to solar cells, and more particularly but
`
`not exclusively to solar cell fabrication processes and structures.
`
`2.
`
`Description of the Background Art
`
`Solar cells are well known devices for converting solar radiation to electrical
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`20
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`energy. They may befabricated on a semiconductor wafer using semiconductor
`
`processing technology. A solar cell includes P-type and N-type diffusion regions that
`
`form a junction. Solar radiation impinging on the solar cell creates electrons and holes
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`that migrate to the diffusion regions, thereby creating voltage differentials between the
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`Attorney Docket No. SKYW00056-1C US
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`diffusion regions.
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`In a backside contact solar cell, both the diffusion regions and the
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`metal contacts coupled to them are on the backside of the solar cell. The metal
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`contacts allow an external electrical circuit to be coupled to and be poweredbythe solar
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`cell.
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`In a front contact solar cell, at least one of the metal contacts making an
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`electrical connection to a diffusion region is on the front side of the solar cell. The front
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`side of the solar cell, which is opposite the backside, faces the sun during normal
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`operation to collect solar radiation. While backside contact solar cells have an aesthetic
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`advantage over front contact solar cells due to the absence of metal contacts on the
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`10
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`front side, and are thus preferred for residential applications, aesthetics is not a major
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`requirement for power plants and other applications where power generation is the main
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`concern. Disclosed herein are structures for a relatively efficient and cost-effective front
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`contact solar cell and processes for manufacturing same.
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`SUMMARY
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`A bipolar solar cell includes a backside junction formed by an N-type silicon
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`substrate and a P-type polysilicon emitter formed on the backside of the solar cell. An
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`antireflection layer may be formed on a textured front surface of the silicon substrate. A
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`negative polarity metal contact on the front side of the solar cell makes an electrical
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`connection to the substrate, while a positive polarity metal contact on the backside of
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`the solar cell makes an electrical connection to the polysilicon emitter. An external
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`electrical circuit may be connected to the negative and positive metal contacts to be
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`Attorney Docket No. SKYW00056-1C US
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`poweredby the solar cell. The positive polarity metal contact may form an infrared
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`reflecting layer with an underlying dielectric layer for increased solar radiation collection.
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`These and other features of the presentinvention will be readily apparent to
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`persons ofordinary skill in the art upon reading the entirety of this disclosure, which
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`includes the accompanying drawings and claims.
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`DESCRIPTION OF THE DRAWINGS
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`FIG. 1 schematically shows a cross-section of a solar cell in accordance with an
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`embodimentof the present invention.
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`FIG. 2 is a plan view schematically showing the front side of the solar cell of FIG.
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`FIG. 3 is a plan view schematically showing the backside of the solar cell of FIG.
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`FIG. 4, which comprises FIGS. 4A-4M, schematically illustrates the fabrication of
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`the solar cell of FIG. 1
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`in accordance with an embodimentof the present invention.
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`The use of the same referencelabel in different figures indicates the same or like
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`components. The figures are not drawn to scale.
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`DETAILED DESCRIPTION
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`20
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`In the present disclosure, numerous specific details are provided, such as
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`examples of apparatus, process parameters, materials, process steps, and structures,
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`Attorney Docket No. SKYW00056-1C US
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`to provide a thorough understanding of embodiments of the invention. Persons of
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`ordinary skill in the art will recognize, however, that the invention can be practiced
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`without one or more of the specific details.
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`In other instances, well-known details are
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`not shownor described to avoid obscuring aspects of the invention.
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`FIG. 1 schematically showsa cross-section of a solar cell 100 in accordance with
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`an embodimentof the present invention. The solar cell 100 has a front side where a
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`metal contact 102 is located and a backside on a same side as the metal contact 110.
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`The front side faces the sun during normal operation to collect solar radiation.
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`In the example of FIG. 1, the solar cell 100 includes a backside junction formed
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`by a P-type dopedpolysilicon emitter 108 serving as a P-type diffusion region and an N-
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`type silicon substrate 101 servings as an N-typediffusion region. The N-typesilicon
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`substrate 101 may comprise a long lifetime (e.g., 2 to 5ms) N-type silicon wafer and
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`may have a thickness of about 100 to 250 um as measured from the backside surface
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`to a tip of the textured front side surface of the substrate. The front side surface of the
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`substrate 101 is randomly textured (labeled as 113) and includes N-type doped regions
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`105 and 106 formedin the substrate. The N-type doped region 105 provides low front
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`surface recombination and improveslateral conductivity whilst not compromising the
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`blue response ofthe solar cell. The region 106, which may be a phosphorus diffusion,
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`provides low contact resistance and minimizes contact recombination. The region 106
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`20
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`is also referred to as an "N-dot" because, in one embodiment, it forms a dot-shape to
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`minimize the area of heavily diffused regions on the front surface. The N-type doped
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`region 105 may have a sheet resistance of 100 to 500 Q/sq, whilst the n-type doped
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`region 106 may have a sheetresistance of 10 to 50 O/sq.
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`Attorney Docket No. SKYW00056-1C US
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`An antireflective coating (ARC) of silicon nitride layer 103 is formed on the
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`textured front side surface of the substrate 101. The texture front side surface and the
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`silicon nitride layer 103 help improve solar radiation collection efficiency. A passivating
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`oxide 124 may comprisesilicon dioxide thermally grown to a thickness of about 10 to
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`250 Angstroms on the front side surface of the substrate 101.
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`In one embodiment, the polysilicon emitter 108 is formed on a tunnel oxide layer
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`107. The polysilicon emitter 108 may be formed by forming a layer of polysilicon using
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`Chemical Vapor Deposition (CVD), such as Low Pressure CVD (LPCVD) or Plasma
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`Enhanced CVD (PECVD), and thermal anneal. The polysilicon emitter 108 may have a
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`sheet resistance of 100 O/sq, and a thickness of 1000 to 2000 Angstroms. The tunnel
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`oxide layer 107 may comprisesilicon dioxide thermally grown to a thickness of about 10
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`to 50 Angstroms on the backside surface of the substrate 101. A metal contact 110
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`electrically connects to the polysilicon emitter 108 through contact holes 123 formed
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`through a dielectric comprising a silicon dioxide layer 109. The metal contact 110
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`provides a positive polarity terminal to allow an external electrical circuit to be coupled
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`to and be powered by the solar cell 100. The silicon dioxide layer 109 provides
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`electrical isolation and allows the metal contact 110 to serve as an infrared reflecting
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`layer for increased solar radiation collection.
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`In one embodiment, the metal contact 110
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`comprisessilver having a conductance of about 5-25 mQ.cm anda thickness of about
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`20
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`15-35um.
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`On the front side of the solar cell 100, the metal contact 102 electrically connects
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`to the region 106 through a contact hole 120 formed through the silicon nitride layer
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`103. The metal contact 102 provides a negative polarity terminal to allow an external
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`Attorney Docket No. SKYW00056-1C US
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`electrical circuit to be coupled to and be poweredbythe solar cell 100.
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`In one
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`embodiment, the metal contact 102 comprisessilver having a sheet resistance of about
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`5mQ.cm and a thickness of about 15um. The pitch between adjacent metal contacts
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`102 may be about 1 to 4mm.
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`In one embodiment, the metal contacts 102 are spaced
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`at 400 to 1000 um along each metal contact 102 (see FIG. 2).
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`In the example of FIG. 1, the edge isolation trench 111 is formed through the
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`silicon dioxide layer 109, the polysilicon emitter 108, and a portion of the substrate 101
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`to provide edge electrical isolation.
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`FIG. 2 is a plan view schematically showing the front side of the solar cell 100.
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`In
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`the example of FIG. 2, two bus bars 201 run parallel on the front side of the substrate
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`101. The contact holes 120, in which the metal contacts 102 are formed, may each
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`have a diameter of about 50 to 200 um. A plurality of metal contacts 102 is formed
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`perpendicular to the bus bars 201. Each metal contact 102 may have a width of about
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`60-120um.
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`FIG. 3 is a plan view schematically showing the backside of the solar cell 100.
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`In
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`the example of FIG. 3, two bus bars 301, which are electrically coupled to metal
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`contacts 110, run parallel on the backside.
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`In practice, the bus bars 201 and 301 will be
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`electrically connected to corresponding bus bars of adjacent solar cells to form an array
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`of solar cells.
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`20
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`Solar cells have gained wide acceptance among energy consumers asa viable
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`renewable energy source. Still, to be competitive with other energy sources, a solar cell
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`manufacturer must be able to fabricate an efficient solar cell at relatively low cost. With
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`Attorney Docket No. SKYW00056-1C US
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`this goal in mind, a process for manufacturing the solar cell 100 is now discussed with
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`reference to FIGS. 4A-4M.
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`FIG. 4, which comprises FIGS. 4A-4M, schematically illustrates the fabrication of
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`the solar cell 100 in accordance with an embodiment of the present invention.
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`In FIG. 4A, an N-typesilicon substrate 101 is prepared for processing into a solar
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`cell by undergoing a damage etch step. The substrate 101 is in wafer form in this
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`example, and is thus typically received with damaged surfaces due to the sawing
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`process used by the wafer vendor to slice the substrate 101 from its ingot. The
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`substrate 101 may be about 100 to 200 microns thick as received from the wafer
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`vendor.
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`In one embodiment, the damage etch step involves removal of about 10 to 20
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`uum from eachside of the substrate 101 using a wet etch process comprising potassium
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`hydroxide. The damage etch step mayalsoinclude cleaning of the substrate 101 to
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`remove metal contamination.
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`In FIG. 4B, tunnel oxides 402 and 107 are formed on the front and back surfaces,
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`respectively, of the substrate 101. The tunnel oxides 402 and 107 may comprisesilicon
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`dioxide thermally grownto a thickness of about 10 to 50 Angstroms on the surfaces of
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`the N-typesilicon substrate 101. A layer of polysilicon is then formed on the tunnel
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`oxides 402 and 107 to form the polysilicon layer 401 and the polysilicon emitter 108,
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`respectively. Each of the polysilicon layer 401 and the polysilicon emitter 108 may be
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`20
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`formed to a thickness of about 1000 to 2000 Angstroms by CVD.
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`In FIG. 4C, a P-type dopant source 461 is formed on the polysilicon emitter 108.
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`Asits name implies, the P-type dopant source 461 provides a source of P-type dopants
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`for diffusion into the polysilicon emitter 108 in a subsequent dopant drive-in step. A
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`Attorney Docket No. SKYW00056-1C US
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`dielectric capping layer 462 is formed on the P-type dopant source 461 to prevent
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`dopants from escaping from the backside of the solar cell during the drive-in step.
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`In
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`one embodiment, the P-type dopant source comprises BSG (borosilicate glass)
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`deposited to a thickness of about 500 to 1000 Angstroms by atmospheric pressure CVD
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`(APCVD) and has a dopant concentration of 5 to 10% by weight, while the capping layer
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`462 comprises undopedsilicon dioxide formed to a thickness of about 2000 to 3000
`
`Angstroms also by APCVD.
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`In FIG. 4D, the edge isolation trench 111 is formed near the edge of the
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`substrate 101 on the backside. The trench 111 is relatively shallow (e.g., 10 um deep
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`into the substrate 101) and provides edge electrical isolation.
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`In one embodiment, the
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`trench 111 is formed by cutting through the capping layer 462, the P-type dopant source
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`461, the polysilicon emitter 108, the tunnel oxide 107, and into a shallow portion of the
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`substrate 101 using a laser.
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`In FIG. 4E, exposed regions on the front surface of the substrate 101 is randomly
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`textured to form the textured surface 113.
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`In one embodiment, the front surface of the
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`substrate 101 is textured with random pyramids using a wet etch process comprising
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`potassium hydroxide and isopropyl alcohol.
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`In FIG. 4F, an N-type dopant source 412 is formed on regions of the textured
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`surface 113 where contact holes 120 (see FIG. 1) will be subsequently formed to allow
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`20
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`subsequently formed metal contacts 102 to electrically connect to the substrate 101. As
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`its name implies, the N-type dopant source 412 provides a source of N-type dopants for
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`diffusion into the front side of the substrate 101.
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`In one embodiment, the N-type dopant
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`Attorney Docket No. SKYW00056-1C US
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`source 412 is formed byinkjet printing the dopant material directly onto the substrate
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`101.
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`In one embodiment, the N-type dopant source 412 comprisessilicon dioxide
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`doped with phosphorus. Only one N-type dopant source 412 is shown in FIG. 4F for
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`clarity of illustration.
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`In practice, there are several dot-shaped N-type dopant sources
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`412, one for each region where a contact hole 120 is to be formed (see FIG. 2). This
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`allows formation of several dot shaped N-type doped regions 106 (see FIG. 1) after a
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`subsequently performed drive-in step now discussed with reference to FIG. 4G.
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`In FIG. 4G, a dopant drive-in step is performedto diffuse N-type dopants from
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`the N-type dopant source 412 into the substrate 101 to form the N-type dope region
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`106, to diffuse P-type dopants from the P-type dopant source 461 to the polysilicon
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`emitter 108, and to diffuse N-type dopants into the front side of the substrate 101 to
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`form the N-type doped region 105. Silicon dioxide layer 109 represents layers 461 and
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`462 after the drive-in step. The polysilicon emitter 108 also becomes a P-type doped
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`layer after the drive-in step. The N-type doped region 105 may be formed by exposing
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`the sample of FIG. 4G to phosphorus in a diffusion furnace, for example. The use of the
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`N-type dopant source 412 allows for a more controlled and concentrated N-type
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`diffusion to the N-type doped region 106. The thin thermal silicon dioxide layer 124 may
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`be grown on the textured surface 113 during the drive-in process.
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`20
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`The drive-in step to dopethe polysilicon emitter 108 on the backside and to form
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`the N-type doped regions 105 and 106 on the front side may be formed in-situ, which in
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`the context of the present disclosure means a single manual (i.e., by fabrication
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`personnel) loading of the substrate 101 in a furnace or other single chamber or multi-
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`Attorney Docket No. SKYW00056-1C US
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`chamber processing tool.
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`In one embodiment, the drive-in step is performed in a
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`diffusion furnace. The preceding sequence of steps leading to the drive-in step allows
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`for in-situ diffusion, which advantageously helps in lowering fabrication cost.
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`It is to be noted that the step of using an N-type dopant source 412 to diffuse
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`dopants into the N-type doped region 106 may be omitted in some applications. Thatis,
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`in an alternative process, the formation of the N-type dopant source 412 in FIG. 4F may
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`be omitted.
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`In that case, the N-type doped regions 105 and 106 will be both doped by
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`introduction of an N-type dopantin the diffusion furnace during the drive-in step. All
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`other process steps disclosed herein remain essentially the same.
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`In FIG. 4H, the antireflective coating of silicon nitride layer 103 is formed over the
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`textured surface 113 after removal of the N-type dopant source 412. Besides being an
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`antireflective coating, the silicon nitride layer 103 also advantageously serves as a
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`dielectric, enabling the selective contacts to be formed on the front surface to reduce
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`front surface recombination. The silicon nitride layer 103 may be formedto a thickness
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`of about 450 Angstroms by PECVD, for example.
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`In FIG. 41, a front contact mask 420 is formed on thesilicon nitride layer 103 to
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`create a pattern 421 defining the contact holes 120 (see FIG. 1). The mask 420 may
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`comprise an acid resistance organic material, such as a resist, and formed using a
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`printing process, such as screen printing or inkjet printing.
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`20
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`In FIG. 4J, a back contact mask 422 is formed on the silicon dioxide layer 109 to
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`create patterns 423 defining the contact holes 123 (see FIG. 1). Similar to the mask
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`420, the mask 422 may comprise an organic material formed using a printing process.
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`Attorney Docket No. SKYW00056-1C US
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`In FIG. 4K, contact holes 120 and 123 are formed by removing exposed portions
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`of the silicon nitride layer 103 and the silicon dioxide 109 in a contact etch step.
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`In one
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`embodiment, the contact holes 120 are formed by using a selective etch process that
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`removes exposed portions of the silicon nitride layer 103 and stops on the substrate
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`101. The same etch process removes exposed portions of the silicon dioxide 109 and
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`stops on the polysilicon emitter 108.
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`In one embodiment, the etch process comprises a
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`BOE (buffered oxide etch).
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`In FIG. 4L, the metal contact 110 is formed on the silicon dioxide layer 109to fill
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`the contact holes 123 and makeelectrical connection to the polysilicon emitter 108.
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`The metal contact 110 may be formed using a printing process. The metal contact 110
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`may comprise silver, which, together with the silicon dioxide layer 109, makes an
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`excellent backside infrared reflector. Other metals may also be used as a metal contact
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`110, such as aluminum, for example.
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`In FIG. 4M, the metal contact 120 is formed onthe silicon nitride layer 103 tofill
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`the contact holes 120 and makeelectrical connection to the substrate 101. The metal
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`contact 120 may comprise silver and formed using a printing process.
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`Formation of the metal contacts 110 and 102 may be followed bya firing step.
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`Thefiring step is applicable when using screen printed silver paste as metal contacts,
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`but not when using other processes or metals. The solar cell 100 may then be visually
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`20
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`inspected and tested.
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`While specific embodiments of the present invention have been provided, it is to
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`be understood that these embodimentsarefor illustration purposes and notlimiting.
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`Attorney Docket No. SKYW00056-1C US
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`Many additional embodimentswill be apparent to persons of ordinary skill in the art
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`reading this disclosure.
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