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`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
`
`17/855,845
`
`07/01/2022
`
`Ling ZHU
`
`CHENP1344WOUS
`
`1081
`
`Cooper Legal Group , LLC
`1388 Ridge Road, Unit 1
`Hinckley, OH 44233
`
`PATEL, DHARTI HARIDAS
`
`ART UNIT
`
`2836
`
`PAPER NUMBER
`
`NOTIFICATION DATE
`
`DELIVERY MODE
`
`02/23/2024
`
`ELECTRONIC
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
`following e-mail address(es):
`
`docketing @cooperlegalgroup.com
`
`PTOL-90A (Rev. 04/07)
`
`

`

`Office Action Summary
`
`Application No.
`17/855,845
`Examiner
`DHARTI PATEL
`
`Applicant(s)
`ZHU et al.
`Art Unit
`2836
`
`AIA (FITF) Status
`Yes
`
`-- The MAILING DATEof this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`A SHORTENED STATUTORYPERIOD FOR REPLYIS SET TO EXPIRE 3 MONTHS FROM THE MAILING
`DATE OF THIS COMMUNICATION.
`Extensionsof time may be available underthe provisions of 37 CFR 1.136(a). In no event, however, may a reply betimely filed after SIX (6) MONTHSfrom the mailing
`date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHSfrom the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, evenif timely filed, may reduce any earned patent term
`adjustment. See 37 CFR 1.704(b).
`
`Status
`
`
`
`1) Responsive to communication(s) filed on 07/01/2022.
`C} A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/werefiled on
`
`2a)() This action is FINAL. 2b)¥)This action is non-final.
`3) An election was madeby the applicant in responseto a restriction requirement set forth during the interview
`on
`; the restriction requirement and election have been incorporated into this action.
`4)(2) Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
`closed in accordance with the practice under Exparte Quayle, 1935 C.D. 11, 453 O.G. 213.
`
`Disposition of Claims*
`1-13 is/are pending in the application.
`)
`Claim(s)
`5a) Of the above claim(s) _ is/are withdrawn from consideration.
`C) Claim(s)
`is/are allowed.
`Claim(s) 1-2 and 13 is/are rejected.
`Claim(s) 3-12 is/are objectedto.
`C) Claim(s
`are subject to restriction and/or election requirement
`)
`* If any claims have been determined allowable, you maybeeligible to benefit from the Patent Prosecution Highway program at a
`participating intellectual property office for the corresponding application. For more information, please see
`http:/Awww.uspto.gov/patents/init_events/pph/index.jsp or send an inquiry to PPHfeedback@uspto.gov.
`
`) ) ) )
`
`Application Papers
`10)( The specification is objected to by the Examiner.
`11)M The drawing(s) filed on 07/01/2022 is/are: a)¥) accepted or b)() objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121(d).
`
`Priority under 35 U.S.C. § 119
`12)(¥) Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d)or (f).
`Certified copies:
`c)() None ofthe:
`b)( Some**
`a) All
`1.@) Certified copies of the priority documents have been received.
`2.1.) Certified copies of the priority documents have been received in Application No.
`3.1.) Copies of the certified copies of the priority documents have been receivedin this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`*“ See the attached detailed Office action for a list of the certified copies not received.
`
`Attachment(s)
`
`1)
`
`Notice of References Cited (PTO-892)
`
`Information Disclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`2)
`Paper No(s)/Mail Date 07/01/2022.
`U.S. Patent and Trademark Office
`
`3)
`
`4)
`
`(LJ Interview Summary (PTO-413)
`Paper No(s)/Mail Date
`(Qj Other:
`
`PTOL-326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mail Date 20240216
`
`

`

`Application/Control Number: 17/855,845
`Art Unit: 2836
`
`Page 2
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`DETAILED ACTION
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`Notice of Pre-AlA or AIA Status
`
`1.
`
`The present application, filed on or after March 16, 2013,
`
`is being examined
`
`underthefirst inventor to file provisions of the AIA.
`
`Claim Rejections - 35 USC § 102
`
`2.
`
`The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that
`
`form the basis for the rejections under this section madein this Office action:
`
`A person shall be entitled to a patent unless —
`
`(a)(1) the claimed invention waspatented, described in a printed publication, orin public use,
`on sale, or otherwise available to the public beforethe effectivefiling date of the claimed
`invention.
`
`Claims 1 and 13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated
`
`by Chenet al. Publication No. US 2021/0257353.
`
`Regarding claims 1, 13, Chen discloses an electrostatic protection circuit for a
`
`chip comprising a ground pad and at least one probe pad, the electrostatic protection
`
`Circuit comprising:
`
`a monitoring unit [Fig. 2A, 210], a discharge unit [Fig. 2A, transistors Q6, Q7] anda
`
`controllable voltage dividing unit [Fig. 2A, R1, R2],
`
`wherein the monitoring unit is connected to the discharge unit, the controllable voltage
`
`dividing unit and the at least one probe pad [Fig. 2A, VDD; all connected as shown], and
`
`
`
`the monitoring unit is configured to generateafirst trigger signal in response to that an
`
`electrostatic pulse is present on any probe pad [Fig. 2A, signal at voltage node V1];
`
`the discharge unit is connected between the ground pad andthe at least one probe pad
`
`[Fig. 2A, Q6, Q7 connected between VDD and ground], and configured to form, under
`
`

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`Application/Control Number: 17/855,845
`Art Unit: 2836
`
`Page 3
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`control of thefirst trigger signal, at least one path for discharging electrostatic charges
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`to the ground pad; and
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`the controllable voltage dividing unit [Fig. 2A, R1, R2] is connected to the discharge unit
`
`and configured to share a part of voltage of thefirst trigger signal for the discharge unit
`
`[Fig. 2A, the output of the voltage divider is connected to 211, 221, and goes into the
`
`gate of the discharge unit Q7].
`
`
`Regarding claim 2, Chen discloses that the discharge unit comprises at least one
`
`transistor [Fig. 2A, Q7]; the controllable voltage dividing unit comprises: a first voltage
`
`dividing element [Fig. 2A, R1] having a first end and a second end, and a second
`
`voltage dividing element [Fig. 2A, R2] having a first end and a second end, thefirst
`
`voltage dividing element and the second voltage dividing element being configured to
`
`share the part of voltage of thefirst trigger signal for the at least one transistor [Fig. 2A,
`
`the output of the voltage divider goes into the gate of the transistor Q7],
`
`wherein the first ends of the first voltage dividing element and the second voltage
`
`dividing element are correspondingly connected to a gate of a respective oneofthe at
`
`least one transistor [Fig. 2A, the middle node of the R1 and R2 output goes into 221 and
`
`the gate of the transistor Q1], the second endofthefirst voltage dividing elementis
`
`connected to the monitoring unit [Fig. 2A, the top end of R1 is connected to 210], and
`
`the second end of the second voltage dividing element is connected to a ground
`
`terminal [Fig. 2A, the bottom end of R2 is connected to the ground].
`
`Claim Rejections - 35 USC § 103
`
`3.
`
`The following is a quotation of 35 U.S.C. 103 which forms the basis forall
`
`obviousness rejections set forth in this Office action:
`
`

`

`Application/Control Number: 17/855,845
`Art Unit: 2836
`
`Page 4
`
`A patent fora claimed invention may notbe obtained, notwithstanding thatthe claimed
`invention is not identically disclosed as set forth in section 102, if the differences between the
`claimed invention and the prior artare such that the claimed invention as a whole would have
`been obvious beforethe effective filing date of the claimed invention to a person having
`ordinary skill in the art to which the claimed invention pertains. Patentability shall notbe
`negated by the mannerin whichthe invention was made.
`
`Claims 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over
`
`Chenet al. Publication No. US 2021/0257353,
`
`in view of Xu, Patent No. US
`
`11,721,974.
`
`Regarding claim 14, Chen discloses an ESD protection circuit, but does not
`
`disclose an ESD protection circuit fora chip.
`
`Xu discloses an ESD protection circuit to protect a chip [col. 3 lines 15 — 43]. Xu
`
`discloses that the chip comprises at least a semiconductor memory [memorychip, col. 3
`
`lines 15-43].
`
`It would have been obvious to one of ordinary skill in the art at the time of
`
`the filing of the invention to incorporate an ESD protection circuit of Chen,
`
`into Xu, for
`
`the benefit of detecting whether an ESD event occurs in the protected chip, and
`
`triggering the ESD protection module in order to protect the chip.
`
`Regarding claim 15, Xu discloses that the semiconductor memory comprises at
`
`least a Dynamic Random Access Memory (DRAM) [col. 2 lines 48 — 67].
`
`Allowable Subject Matter
`
`4.
`
`Claims 3-12 are objected to as being dependent upon a rejected base claim, but
`
`would beallowable if rewritten in independent form including all of the limitations of the
`
`base claim and any intervening claims.
`
`The following is an examiner’s statement of reasons for allowanceof claim 3:
`
`The prior art does not disclose that the at least one transistor comprises a second
`
`transistor and a fourth transistor; the first voltage dividing element comprisesa first
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`

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`Application/Control Number: 17/855,845
`Art Unit: 2836
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`Page 5
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`resistor andathird resistor; and the second voltage dividing element comprises a
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`second resistor and a fourth resistor, wherein a first end of the first resistor andafirst
`
`end of the secondresistor are both connected to a gate of the secondtransistor, and a
`
`first end of the third resistor and a first end of the fourth resistor are both connected to a
`
`gate of the fourth transistor; and a second endofthefirst resistor and a second endof
`
`the third resistor are respectively connected to the monitoring unit, and a second end of
`
`the second resistor and a second end of the fourth resistor are both connected to the
`
`ground terminal. This feature in combination with the rest of the claim limitations is not
`
`anticipated or rendered obviousby the prior art of record.
`
`The following is an examiner’s statement of reasons for allowanceof claim 5:
`
`The prior art does not disclose that the monitoring unit comprises: a capacitor module
`
`configured to generate thefirst trigger signal by resistance-capacitance coupling,
`
`in
`
`response to that the electrostatic pulse is present on any probe pad, whereinafirst end
`
`of the capacitor module is connected to the at least one probe pad, a second end of the
`
`capacitor module is connected to the discharge unit, and a third end of the capacitor
`
`module is connected to the controllable voltage dividing unit. This feature in combination
`
`with the rest of the claim limitations is not anticipated or rendered obvious by the prior
`
`art of record.
`
`The following is an examiner’s statement of reasons for allowanceof claim 9:
`
`The prior art does not disclose that the chip further comprises a power supply pad,
`
`the monitoring unit is further connected to the power supply pad, and further configured
`
`to generate a secondtrigger signal in response to that an electrostatic pulse is present
`
`on the power supply pad; and the discharge unit is further connected between the
`
`

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`Application/Control Number: 17/855,845
`Art Unit: 2836
`
`Page 6
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`power supply pad and the ground pad, and further configured to be turned on under
`
`control of the second trigger signal, so as to discharge the electrostatic charges to the
`
`ground pad. This feature in combination with the rest of the claim limitations is not
`
`anticipated or rendered obviousby the prior art of record.
`
`Conclusion
`
`5.
`
`Anyinquiry concerning this communication or earlier communications from the
`
`examiner should be directed to DHARTI PATEL whose telephone numberis (571)272-
`
`8659. The examiner can normally be reached M- F 9 AM- 5PM.
`
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`
`in-person, and video
`
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`
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`
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`
`If attempts to reach the examiner by telephone are unsuccessful, the examiner's
`
`supervisor, JARED FUREMANcan be reached on 571-272-2391. The fax phone
`
`number for the organization where this application or proceeding is assigned is 571-
`
`273-8300.
`
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`

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`Application/Control Number: 17/855,845
`Art Unit: 2836
`
`Page 7
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`
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`
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`
`DHARTI PATEL
`Primary Examiner
`Art Unit 2836
`
`/DHARTIH PATEL/
`Primary Examiner, Art Unit 2836
`
`