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`PATENT
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`WHAT IS CLAIMED IS:
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`1.
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`A system for storing data comprising:
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`memory space containing volatile memory space and nonvolatile memory space,
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`wherein the nonvolatile memory space includes both multilevel cell (MLC) space and single
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`level cell (SLC) space;
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`at least one controller to operate memory elements and associated memory space;
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`at least one MLC nonvolatile memory element,
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`at least one SLC nonvolatile memory element,
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`at least one random access volatile memory element;
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`an FTL flash translation layer, wherein the at least one controller, or FTL, or a
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`combination of both maintain an address table in one or more of the memory elements; and
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`wherein the address table maps logical and physical addresses adaptable to the
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`system, wherein the mapping is performed as necessitated by the system to maximize
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`lifetime, and wherein the mapping maps blocks, pages, or bytes of data in either volatile or
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`nonvolatile, or both, memories.
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`2.
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`The system of Claim 1, wherein the memory elements are a module, standalone device, or
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`multi-chip package.
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`3.
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`The system of Claim 1, wherein at least one of the volatile or nonvolatile memories are
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`embedded in the at least one controller.
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`4.
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`5.
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`6.
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`The system of Claim 1, wherein the nonvolatile memory is flash memory.
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`The system of Claim 1, wherein the nonvolatile memory is phase-change memory.
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`The system of Claim 1, wherein the nonvolatile memory is magnetic random access
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`memory.
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`7.
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`The system of Claim 1, wherein the volatile memory is dynamic random access memory.
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`GRTD60-34 l 3 8
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`PATENT
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`8.
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`9.
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`The system of Claim 1, wherein the volatile memory is static random access memory.
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`The system of Claim 1, wherein the at least one SLC nonvolatile memory element
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`includes a hard disk drive (HDD).
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