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`ABSTRACT OF THE DISCLOSURE
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`A speech recognition circuit comprises an input buffer for receiving processed speech
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`parameters. A lexical memory contains lexical data for word recognition. The lexical
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`data comprises a plurality of lexical tree data structures. Each lexical tree data
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`structure comprises a model of words having common prefix components. An initial
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`component of each lexical tree structure is unique. A plUrality of lexical tree processors
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`are connected in parallel to. the input buffer for processing the speech parameters in
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`. parallel to perferm parallel lexical tree processing for word recognition by accessing. the
`lexical data in the lexical memory. A results memory is connected to the lexical tree
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`1O
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`processorsflfor storing processing results from the lexical tree processors and lexical
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`tree identifierseto identify lexical trees to be processed by the lexical tree processors. A
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`controller controls the, lexical tree processors to process lexical trees identified in the
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`results memory by performing parallel‘processing on a plurality of said lexical tree data
`structures.
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