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`18
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`l. A speech recognition circuit comprising:
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`one or more clusters of processors, each said cluster comprising:
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`one or more processors; and
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`an acoustic model memory storing acoustic model data;
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`wherein each said processor is configured to compute a probability using the said
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`acoustic model data in said acoustic mode] memory;
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`2. The speech recognition circuit of claim 1 where said probability is an input to an
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`evaluation of a state transition of a model of states.
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`3. The speech recognition circuit of claim 2 where said model is a Hidden Markov Model.
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`4. The speech recognition circuit of claim 2 where said probability is computed from a
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`Gaussian mixture model and one or more feature vectors.
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`5. The speech recognition circuit of claim 1 where the circuit further comprising:
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`a buffer for storing one or more feature vectors coupled to said processors.
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`6. The speech recognition circuit of claim 5 further comprising:
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`a search controller coupled to said processors and capable of controlling said processors to
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`initiate speech recognition processing in all said processors or in a subset of said processors.
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`7. The speech recognition circuit of claim 1 wherein the said acoustic model memory in each
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`said cluster of processors is a distinct and separate memory from the said acoustic model
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`memory is each other ones of said clusters of processors.
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`8. The speech recognition circuit of claim 1 where said acoustic model memory is coupled to
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`all of said processors in all of said clusters of processors.
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`200422.00643/117148823V.1
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