UNITED STATES PATENT APPLICATION
`
`OF
`
`Yeonkyung Kim,
`
`TaeWoong Moon,
`
`JungHyun Lee,
`
`And
`
`YongSeok Park
`
`FOR
`
`DISPLAY APPARATUS
`
`
`
`OF
`
`Yeonkyung Kim,
`
`TaeWoong Moon,
`
`JungHyun Lee,
`
`And
`
`YongSeok Park
`
`FOR
`
`DISPLAY APPARATUS
`
`
`
`CROSS-REFERENCE TO RELATED APPLICATIONS
`
`[0001]
`
`This application claims the benefit of the Korean Patent Application
`
`No. 10-2017-0135316 filed on October 18, 2017, which is hereby incorporated by
`
`reference as if fully set forth herein.
`
`BACKGROUND
`
`Field of the Invention
`
`[0002]
`
`The present disclosure relates to a display apparatus including a touch
`
`sensor.
`
`Discussion of the Related Art
`
`[0003]
`
`With the advancement of information-oriented society, various
`
`requirements for display apparatuses for displaying an image are increasing, and
`
`various types of display apparatuses such as liquid crystal display (LCD) apparatuses
`
`and light emitting display apparatuses are being practically used.
`
`In electronic
`
`devices including a display apparatus, mobile devices such as mobile phones,
`
`smartphones, smart watches, tablet personal computers (PCs), or watch phones and
`
`medium and large-sized devices
`
`such as
`
`smart
`
`televisions
`
`(TVs), notebook
`
`computers, or monitors provide a touch screen type user interface, for convenience of
`
`a user input. Display apparatuses capable of touch processing are being developed
`
`for providing a larger number of various functions, and requirements of users are
`
`being diversified.
`
`[0004]
`
`Display apparatuses including the touch screen type user interface are
`
`driven by a time division driving manner which time-divisionally divides a display
`
`driving operation of displaying an image on a display panel and a touch driving
`
`operation of sensing a touch position and/or a touch force based on a user touch.
`
`
`
`[0005]
`
`A time division driving type user interface may be classified into a
`
`vertical blanking manner, which time-divisionally drives one frame in a display
`
`period and a touch sensing period to perform a one-time touch report during the one
`
`frame, and a horizontal blanking manner which time-divisionally drives one frame in
`
`the display period and the touch sensing period a plurality of times to perform a
`
`touch report a plurality of times during the one frame. Thus, the horizontal blanking
`
`manner has a touch report rate of 120 Hz or higher, and thus, enhances touch
`
`sensitivity in comparison to the vertical blanking manner.
`
`[0006]
`
`A display apparatus based on the horizontal blanking manner includes
`
`a gate driving circuit including a shift register for time division driving. The shift
`
`register is embedded (or integrated) into a display panel and includes a plurality of
`
`driving stage blocks for display driving and a plurality of holding stage blocks for
`
`touch driving.
`
`[0007]
`
`Each of the driving stage blocks and the holding stage blocks is
`
`configured with a stage circuit including a plurality of oxide thin film transistors
`
`(TFTs) having mobility which is higher than that of amorphous TFTs, for realizing a
`
`thin bezel width of a display apparatus.
`
`In comparison with the amorphous TFTs,
`
`the oxide TFTs have a problem where deterioration is not recovered. Particularly,
`
`the stage circuit of each of the plurality of holding stage blocks holds an output
`
`signal of a front driving stage block during the touch sensing period, and due to this,
`
`deterioration of the oxide TFTs configuring the stage circuit of each of the plurality
`
`of holding stage blocks is accelerated. For this reason, an output signal is not stably
`
`held during the touch sensing period, causing a reduction in reliability.
`
`[0008]
`
`The above-described background is possessed by the inventor of the
`
`application for deriving the disclosure, or is technology information that has been
`
`
`
`acquired in deriving the disclosure.
`
`The above-described background is not
`
`necessarily known technology disclosed to the general public before the application
`
`of the disclosure.
`
`Accordingly, the present disclosure is directed to provide a display
`
`W [
`
`0009]
`
`apparatus that substantially obviates one or more problems due to limitations and
`
`disadvantages of the related art.
`
`[0010]
`
`An aspect of the present disclosure is directed to provide a display
`
`apparatus including a gate driving circuit, which stably holds an output signal during
`
`a touch sensing period.
`
`[0011]
`
`Additional advantages and features of the disclosure will be set forth
`
`in part in the description which follows and in part will become apparent to those
`
`having ordinary skill in the art upon examination of the following or may be learned
`
`from practice of the disclosure.
`
`The objectives and other advantages of the
`
`disclosure may be realized and attained by the structure particularly pointed out in
`
`the written description and claims hereof as well as the appended drawings.
`
`[0012]
`
`To achieve these and other advantages and in accordance with the
`
`purpose of the disclosure, as embodied and broadly described herein,
`
`there is
`
`provided a display apparatus including a display panel including a display area
`
`including a plurality of gate lines, a plurality of data lines, and a plurality of touch
`
`sensors, a gate driving circuit dividing the display area into a plurality of horizontal
`
`blocks and driving gate lines of a horizontal block by units of horizontal blocks at
`
`every display period in one frame, and a touch driving circuit sensing a touch
`
`through touch sensors of the horizontal block by units of horizontal blocks at every
`
`touch sensing period in the one frame. The gate driving circuit includes a plurality of
`
`
`
`driving stage groups each including a plurality of driving stages supplying a scan
`
`pulse to gate lines included in a corresponding horizontal block at every display
`
`period and a plurality of holding stage groups, each holding stage group between two
`
`driving stage groups, a holding stage group of the plurality of holding stage groups,
`
`between a rear driving stage group and a front driving stage group, including at least
`
`one holding stage supplying a carry signal to the rear driving stage group according
`
`to a voltage of a first control node and a voltage of a second control node based on
`
`first and second node control powers and an output signal supplied from the front
`
`driving stage group. Each of the first and second node control powers includes an
`
`alternating current (AC) voltage.
`
`[0013]
`
`It is to be understood that both the foregoing general description and
`
`the following detailed description of the present disclosure are exemplary and
`
`explanatory and are intended to provide further explanation of the disclosure as
`
`claimed.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`[0014]
`
`The accompanying drawings, which are included to provide a further
`
`understanding of the disclosure and are incorporated in and constitute a part of this
`
`application,
`
`illustrate embodiments of the disclosure and together with the
`
`description serve to explain the principle of the disclosure. In the drawings:
`
`[0015]
`
`FIG. 1 is a diagram for describing a display apparatus according to an
`
`embodiment of the present disclosure,
`
`[0016]
`
`FIG. 2 is a diagram for describing a display area illustrated in FIG. 1,
`
`[0017]
`
`FIG. 3 is a waveform diagram showing a time division driving signal
`
`and first and second node control voltages illustrated in FIG. 1,
`
`
`
`[0018]
`
`FIG. 4 is a diagram for describing a gate driving circuit according to
`
`an embodiment of the present disclosure;
`
`[0019]
`
`FIG. 5 is a diagram for describing a first driving stage group
`
`according to an embodiment illustrated in FIG. 4;
`
`[0020]
`
`FIG. 6 is a waveform diagram showing a plurality of gate start signals
`
`and a plurality of gate shift clocks illustrated in FIG. 4;
`
`[0021]
`
`FIG. 7 is a diagram for describing a first holding stage group
`
`according to an embodiment illustrated in FIG. 4;
`
`[0022]
`
`FIG. 8 is a diagram for describing an internal configuration of a first
`
`driving stage illustrated in FIG. 5;
`
`[0023]
`
`FIG. 9 is a diagram for describing an internal configuration of a first
`
`holding stage illustrated in FIG. 7;
`
`[0024]
`
`FIG. 10 is a driving waveform diagram of the first holding stage
`
`according to an embodiment illustrated in FIG. 9;
`
`[0025]
`
`FIG. 11 is a diagram for describing a gate driving circuit according to
`
`another embodiment of the present disclosure;
`
`[0026]
`
`FIG. 12 is a diagram for describing a display apparatus according to
`
`another embodiment of the present disclosure;
`
`[0027]
`
`FIG. 13 is a diagram for describing a gate driving circuit illustrated in
`
`FIG. 12;
`
`[0028]
`
`FIG. 14A illustrates waveform diagrams showing results obtained by
`
`measuring a voltage variation of a first control node during a touch sensing period in
`
`a holding stage according to an embodiment of the present disclosure;
`
`
`
`[0029]
`
`FIG. 14B illustrates waveform diagrams showing results obtained by
`
`measuring a voltage variation of a first control node during a touch sending period in
`
`a holding stage according to a comparative example;
`
`[0030]
`
`FIGS. 15Aillustrates waveform diagrams of a carry signal output from
`
`a holding stage according to an embodiment of the present disclosure; and
`
`[0031]
`
`FIG. 15B illustrates waveform diagrams of a carry signal output from
`
`a holding stage according to a comparative example.
`
`DETAILED DESCRIPTION OF THE DISCLOSURE
`
`[0032]
`
`Reference will now be made in detail to the embodiments of the
`
`present disclosure, examples of which are illustrated in the accompanying drawings.
`
`Wherever possible,
`
`the same reference numbers will be used throughout
`
`the
`
`drawings to refer to the same or like parts.
`
`[0033]
`
`Advantages
`
`and
`
`features
`
`of
`
`the
`
`present
`
`disclosure,
`
`and
`
`implementation methods thereof will be clarified through following embodiments
`
`described with reference to the accompanying drawings. The present disclosure may,
`
`however, be embodied in different forms and should not be construed as limited to
`
`the embodiments set forth herein. Rather, these embodiments are provided so that
`
`this disclosure will be thorough and complete, and will fully convey the scope of the
`
`present disclosure to those skilled in the art. Furthermore, the present disclosure is
`
`only defined by scopes of claims.
`
`[0034]
`
`A shape, a size, a ratio, an angle, and a number disclosed in the
`
`drawings for describing embodiments of the present disclosure are merely an
`
`example, and thus, the present disclosure is not limited to the illustrated details. Like
`
`reference numerals refer to like elements throughout.
`
`In the following description,
`
`when the detailed description of the relevant known technology is determined to
`
`
`
`unnecessarily obscure the important point of the present disclosure,
`
`the detailed
`
`description will be omitted.
`
`[0035]
`
`In a case where ‘comprise’, ‘have’, and ‘include’ described in the
`
`present specification are used, another part may be added unless ‘only~’ is used. The
`
`terms of a singular form may include plural forms unless referred to the contrary.
`
`[0036]
`
`In construing an element, the element is construed as including an
`
`error range although there is no explicit description.
`
`[0037]
`
`In describing a position relationship, for example, when a position
`
`relation between two parts is described as ‘on~’, ‘over~’, ‘under~’, and ‘next~’, one
`
`or more other parts may be disposed between the two parts unless ‘just’ or ‘direct’ is
`
`used.
`
`[0038]
`
`In describing a time relationship, for example, when the temporal
`
`order is described as ‘after~’, ‘subsequent~’, ‘next~’, and ‘before~’, a case which is
`
`not continuous may be included unless ‘just’ or ‘direct’ is used.
`
`[0039]
`
`It will be understood that, although the terms “first”, “second”, etc.
`
`may be used herein to describe various elements,
`
`these elements should not be
`
`limited by these terms. These terms are only used to distinguish one element from
`
`another.
`
`For example, a first element could be termed a second element, and,
`
`similarly, a second element could be termed a first element, without departing from
`
`the scope of the present disclosure.
`
`[0040]
`
`The term “at least one” should be understood as including any and all
`
`combinations of one or more of the associated listed items.
`
`For example,
`
`the
`
`meaning of “at least one of a first item, a second item, and a third item” denotes the
`
`combination of all items proposed from two or more of the first item, the second item,
`
`and the third item as well as the first item, the second item, or the third item.
`
`
`
`[0041]
`
`Features of various embodiments of the present disclosure may be
`
`partially or overall coupled to or combined with each other, and may be variously
`
`inter-operated with each other and driven technically as those skilled in the art can
`
`sufficiently understand. The embodiments of the present disclosure may be carried
`
`out independently from each other, or may be carried out together in co-dependent
`
`relationship.
`
`[0042]
`
`Hereinafter, embodiments of a display apparatus according to the
`
`present disclosure will be described in detail with reference to the accompanying
`
`drawings.
`
`In adding reference numerals to elements of each of the drawings,
`
`although the same elements are illustrated in other drawings, like reference numerals
`
`may refer to like elements.
`
`[0043]
`
`FIG. 1 is a diagram for describing a display apparatus according to an
`
`embodiment of the present disclosure. FIG. 2 is a diagram for describing a display
`
`area illustrated in FIG. 1. FIG. 3 is a waveform diagram showing a time division
`
`driving signal and first and second node control voltages illustrated in FIG. 1.
`
`[0044]
`
`Referring to FIGS.
`
`1
`
`to 3,
`
`the display apparatus according to an
`
`embodiment of the present disclosure may include a display panel 100, a display
`
`driving part, and a touch driving circuit 600.
`
`[0045]
`
`The display panel 100 may be a liquid crystal display panel having an
`
`in-cell touch type structure using a capacitive type. For example, the display panel
`
`100 may have an in-cell touch type structure using a self-capacitive type. The
`
`display panel 100 may operate in a display mode and a touch sensing mode. For
`
`example, the display panel 100 may display an image by using light irradiated from a
`
`backlight unit during the display mode and may act as a touch panel for touch
`
`sensing during the touch sensing mode. The display mode may be performed in each
`
`
`
`of a set plurality of display periods in one frame, and the touch sensing mode may be
`
`performed in each of a set plurality of touch sensing periods immediately before or
`
`after the plurality of display periods in one frame.
`
`[0046]
`
`The display panel 100 according to an embodiment may include a
`
`display area 101 provided on a substrate and a non-display area 102 provided in an
`
`edge of the substrate to surround the display area 101.
`
`[0047]
`
`The display area 101 may include a plurality of data lines DL, a
`
`plurality of gate lines GL, a plurality of subpixels SP, a plurality of touch electrodes
`
`TE, and a plurality of touch routing lines TL.
`
`[0048]
`
`Each of the plurality of data lines DL may receive a data signal in the
`
`display mode. Each of the plurality of gate lines GL may receive a scan pulse in the
`
`display mode. The plurality of data lines DL and the plurality of gate lines GL may
`
`be arranged on the substrate to intersect one another, thereby defining a plurality of
`
`subpixel areas.
`
`[0049]
`
`Each of the plurality of subpixels SP may include a thin film transistor
`
`(TFT) connected to a gate line GL and a data line DL adjacent thereto, a pixel
`
`electrode connected to the TFT, and a storage capacitor connected to the pixel
`
`electrode.
`
`[0050]
`
`The TFT may include a gate terminal, a semiconductor layer, a first
`
`terminal, and a second terminal. The first terminal and the second terminal of the
`
`TFT may each be defined as a source terminal or a drain terminal, based on the
`
`conductive type of the semiconductor layer. The TFT may have a bottom gate
`
`structure where the gate terminal is disposed under the semiconductor layer and/or a
`
`top gate structure where the gate terminal is disposed on the semiconductor layer.
`
`The TFT may be covered by a passivation layer (or a planarization layer).
`
`10
`
`
`
`[0051]
`
`The pixel electrode may be formed of a transparent conductive
`
`material on the passivation layer in a subpixel area and may be connected to the
`
`second terminal of the TFT through a via hole provided in the passivation layer.
`
`[0052]
`
`The storage capacitor may be provided between the second terminal
`
`of the TFT and a corresponding touch electrode TE, or may be provided between the
`
`pixel electrode and the touch electrode TE. The storage capacitor may be charged
`
`with the data signal supplied through the TFT, and when the TFT is turned off, the
`
`storage capacitor may hold an electric field generated between the pixel electrode
`
`and the touch electrode TE by using a charged voltage.
`
`[0053]
`
`Each of the plurality of touch electrodes TE may act as a touch sensor
`
`for sensing a touch performed by a touch object, or may act as a common electrode
`
`for generating an electric field along with the pixel electrode to drive a liquid crystal.
`
`That is, each of the plurality of touch electrodes TE may be used as the touch sensor
`
`in the touch sensing mode and may be used as the common electrode in the display
`
`mode. Also, since each of the plurality of touch electrodes TE is used as the
`
`common electrode for driving the liquid crystal, the plurality of touch electrodes TE
`
`may be formed of a transparent conductive material such as indium tin oxide (ITO).
`
`The touch object may be defined as a user finger or a touch pen such as an active pen.
`
`[0054]
`
`Since each of the plurality of touch electrodes TE is used as a self-
`
`capacitive touch sensor in the touch sensing mode, each of the plurality of touch
`
`electrodes TE may have a size which is larger than a minimum contact size between
`
`the touch object and the display panel 100. Therefore, each of the plurality of touch
`
`electrodes TE may have a size corresponding to a size of one or more subpixels SP.
`
`[0055]
`
`Each of the plurality of touch routing lines TL may be individually
`
`connected to a corresponding touch electrode of the plurality of touch electrodes TE.
`
`11
`
`
`
`Each of the plurality of touch routing lines TL may transfer a common voltage Vcom
`
`to a corresponding touch electrode TE in the display mode, and in the touch sensing
`
`mode, each of the plurality of touch routing lines TL may transfer a touch driving
`
`pulse to the corresponding touch electrode TE and may transfer a capacitance
`
`variation of the corresponding touch electrode TE to the display driving part.
`
`[0056]
`
`The display area 101 may be divided into n (where n is a natural
`
`number equal to or more than two) number of horizontal blocks (for example, first to
`
`nth horizontal blocks) HBl to HBn.
`
`In the display area 101, an image may be
`
`displayed or touch sensing may be performed by units of horizontal blocks, based on
`
`time division driving. Each of the n horizontal blocks HBl to HBn according to an
`
`embodiment may include i (where i is a natural number equal to or more than two)
`
`number of gate lines GL (or horizontal lines), and the i gate lines GL may overlap
`
`one touch electrode TE. For example, the first horizontal block HBl may include
`
`first to ith gate lines, and the second horizontal blocks HB2 may include i+lth to 2ith
`
`gate lines.
`
`[0057]
`
`The display driving part may time-divisionally drive the n horizontal
`
`blocks HBl to HBn of the display area 101 of the display panel 100 and may include
`
`a data driving circuit 200 and a gate driving circuit 300 to drive the subpixels SP by
`
`units of horizontal blocks at every first period DP of a time division driving signal
`
`TDS.
`
`[0058]
`
`In the touch mode, the data driving circuit 200 may convert pixel data
`
`WG/B into an analog data signal, based on a data control signal DCS and may supply
`
`the analog data signal to the plurality of data lines DL.
`
`12
`
`
`
`[0059]
`
`The data driving circuit 200 according to an embodiment may supply
`
`data signals to subpixels SP of a corresponding horizontal block through the plurality
`
`of data lines DL at every first period DP of the time division driving signal TDS.
`
`[0060]
`
`According to another embodiment, the data driving circuit 200 may
`
`supply data signals to subpixels SP of a corresponding horizontal block through the
`
`plurality of data lines DL at every first period DP of the time division driving signal
`
`TDS and may supply a data load free signal to each of the plurality of data lines DL
`
`at every second period TP of the time division driving signal TDS. Here, in the
`
`touch sensing mode, the data load free signal may have the same phase as that of the
`
`touch driving pulse supplied to the touch electrodes TE, and thus, may decrease loads
`
`of the touch electrodes TE caused by parasitic capacitances between the touch
`
`electrodes TE and the data lines DL, thereby enhancing touch sensitivity.
`
`[0061]
`
`In a process of forming TFTs provided in the subpixels SP, the gate
`
`driving circuit 300 may be embedded (or integrated) into one non-display area of the
`
`display panel 100 and may be connected to the plurality of gate lines GL in a one-to-
`
`one relationship. The gate driving circuit 300 may generate a scan pulse and may
`
`supply the scan pulse to a corresponding gate line GL in a predetermined order,
`
`based on a gate control signal GCS. The scan pulse supplied to each of the gate lines
`
`GL may be synchronized with a data signal supplied to a corresponding data line.
`
`[0062]
`
`The gate driving circuit 300 according to an embodiment may
`
`sequentially supply the scan pulse to the i gate lines included in a horizontal block
`
`group by units of horizontal blocks at every first period DP of the time division
`
`driving signal TDS.
`
`[0063]
`
`According to another embodiment, the gate driving circuit 300 may
`
`sequentially supply the scan pulse to the i gate lines included in the horizontal block
`
`13
`
`
`
`group by units of horizontal blocks at every first period DP of the time division
`
`driving signal TDS and may supply a gate load free signal to each of the plurality of
`
`gate lines GL in the touch sensing mode, for example, at every second period TP of
`
`the time division driving signal TDS. Here, in the touch sensing mode, the gate load
`
`free signal may have the same phase as that of the touch driving pulse supplied to the
`
`touch electrodes TE, and thus, may decrease loads of the touch electrodes TE caused
`
`by parasitic capacitances between the touch electrodes TE and the gate lines GL,
`
`thereby enhancing touch sensitivity.
`
`[0064]
`
`The display driving part according to the present disclosure may
`
`further include a timing control circuit 400 and a power generation circuit 500.
`
`[0065]
`
`The timing control circuit 400 may receive a timing synchronization
`
`signal T88 and input data Idata supplied from a host controller (or a host system) and
`
`may align the input data Idata to generate pixel data R/G/B suitable for the time
`
`division driving of the display panel 100, based on the timing synchronization signal
`
`T88 and may supply the pixel data R/G/B to the data driving circuit 200.
`
`[0066]
`
`The timing control circuit 400 may generate the time division driving
`
`signal TDS for time-divisionally driving the display panel 100 by units of horizontal
`
`blocks, based on the timing synchronization signal TSS. The time division driving
`
`signal TDS according to an embodiment may include the first period DP and the
`
`second period TP which are each performed twice or more during one frame, based
`
`on a vertical synchronization signal of the timing synchronization signal TSS. The
`
`time division driving signal TDS may be generated in order for the second period TP
`
`to start prior to the first period DP. Here, the first period DP of the time division
`
`driving signal TDS may be defined as a display period, and the second period TP of
`
`the time division driving signal TDS may be defined as a touch sensing period.
`
`14
`
`
`
`[0067]
`
`Moreover,
`
`the timing control circuit 400 may generate a power
`
`control signal PCS for controlling, in an alternating current (AC) form, first and
`
`second node control powers Vdd2 and Vss2 which are to be supplied to the gate
`
`driving circuit 300, based on the time division driving signal TDS and may supply
`
`the power control signal PCS to the power generation circuit 500. Also, the timing
`
`control circuit 400 may generate and output the data control signal DCS and the gate
`
`control signal GCS, based on the timing synchronization signal TSS and the time
`
`division driving signal TDS. Here, the data control signal DCS may include a source
`
`start signal, a source shift signal, a source enable signal, and a polarity control signal.
`
`Also, the gate control signal GCS may include first to fourth gate start signals, first to
`
`eighth gate shift clocks, first to fourth scan holding clocks, and first to fourth stage
`
`reset clocks.
`
`[0068]
`
`Optionally, the time division driving signal TDS may be generated by
`
`the host controller (or the host system) and may be provided to the timing control
`
`circuit 400.
`
`[0069]
`
`The power generation circuit 500 may generate and output various
`
`power signals such as a circuit driving voltage and a driving power necessary for
`
`driving of the display apparatus, based on an input power Vin. Particularly, the
`
`power generation circuit 500 according to the present disclosure may generate a first
`
`driving power Vddl having a first driving voltage and a second driving power Vssl
`
`having a second driving voltage, based on the input power Vin and may supply the
`
`first driving power Vddl and the second driving power Vssl to the gate driving
`
`circuit 300, and in response to the power control signal PCS supplied from the timing
`
`control circuit 400, the power generation circuit 500 may generate the first node
`
`control power Vdd2 corresponding to an AC voltage (or an AC form) and may
`
`15
`
`
`
`supply the first node control power Vdd2 to the gate driving circuit 300.
`
`Furthermore, in response to the power control signal PCS supplied from the timing
`
`control circuit 400,
`
`the power generation circuit 500 according to the present
`
`disclosure may generate the second node control power Vss2 corresponding to an
`
`AC voltage (or an AC form) and may supply the second node control power Vss2 to
`
`the gate driving circuit 300.
`
`[0070]
`
`The first driving power Vdd1 according to an embodiment may be set
`
`to a constant voltage level of 20V, but is not limited thereto.
`
`[0071]
`
`The second driving power Vss1 according to an embodiment may be
`
`set to a constant voltage level of -10V, but is not limited thereto. The second driving
`
`power Vss1 may be used as a gate-off voltage for turning off a TFT provided in each
`
`of the pixels.
`
`[0072]
`
`The first node control power Vdd2 according to an embodiment may
`
`have a first node control voltage having a first voltage level V1 during the first
`
`period DP of the time division driving signal TDS, and the first node control power
`
`Vdd2 may have a first node control voltage having a second voltage level V2 which
`
`is lower than the first voltage level V1 during the second period TP of the time
`
`division driving signal TDS. For example, the first voltage level V1 may be set to
`
`20V, and the second voltage level V2 may be set to -10V. However, the present
`
`embodiment is not limited thereto.
`
`[0073]
`
`The second node control power Vss2 according to an embodiment
`
`may have a second node control voltage having a third voltage level V3 during the
`
`first period DP of the time division driving signal TDS, and the second node control
`
`power Vss2 may have a second node control voltage having a fourth voltage level
`
`V4 which is higher than the third voltage level V3 during the second period TP of the
`
`16
`
`
`
`time division driving signal TDS. For example, the third voltage level V3 may be set
`
`to -10 V, and the fourth voltage level V4 may be set to 20 V. However, the present
`
`embodiment is not limited thereto.
`
`[0074]
`
`The power generation circuit 500 according to the present disclosure
`
`may be implemented with a power management integrated circuit (IC).
`
`[0075]
`
`Additionally,
`
`the power generation circuit 500 according to the
`
`present disclosure may further include a common voltage generation circuit which
`
`generates the common voltage Vcom, a touch driving pulse generation circuit which
`
`generates the touch driving pulse, a first load free signal generation circuit which
`
`generates the data load free signal, and a second load free signal generation circuit
`
`which generates the gate load free signal. Here, the common voltage generation
`
`circuit and the touch driving pulse generation circuit may be embedded into the touch
`
`driving circuit 600. The common voltage generation circuit, the touch driving pulse
`
`generation circuit, the first load free signal generation circuit, and the second load
`
`free signal generation circuit may be implemented as a touch power IC.
`
`[0076]
`
`The touch driving circuit 600 may be connected to the plurality of
`
`touch electrodes TE through the plurality of touch routing lines TL provided in the
`
`display panel 100.
`
`In the display mode based on the first period DP of the time
`
`division driving signal TDS supplied from the timing control circuit 400, the touch
`
`driving circuit 600 may supply the common voltage Vcom to the plurality of touch
`
`electrodes TE through the plurality of touch routing lines TL. Also, the touch
`
`driving circuit 400 may sense a touch, performed by the touch object, through touch
`
`electrodes TE of a horizontal block by units of horizontal blocks according to the
`
`second period TP of the time division driving signal TDS.
`
`17
`
`
`
`[0077]
`
`In the touch sensing mode based on the second period TP of the time
`
`division driving signal TDS,
`
`the touch driving circuit 600, according to an
`
`embodiment, may supply the touch driving pulse to the plurality of touch electrodes
`
`TE through the plurality of touch routing lines TL, and then, may sense a capacitance
`
`variation of a corresponding touch electrode TE through each of the plurality of
`
`touch routing lines TL to generate touch raw data and may provide the generated
`
`touch raw data to the host controller (or the host system).
`
`[0078]
`
`According to another embodiment, in the touch sensing mode based
`
`on the second period TP of the time division driving signal TDS, the touch driving
`
`circuit 600 may sense a pen touch in a pen sensing period and may sense a finger
`
`touch in a finger touch period. For example, the touch driving circuit 600 may
`
`supply an uplink signal
`
`including a touch pen synchronization signal
`
`to touch
`
`electrodes TE of a corresponding horizontal block at every pen sensing period set in
`
`some of a set plurality of second periods TP in one frame and may sense a signal
`
`transmitted from the touch pen through corresponding touch electrodes TE to
`
`generate touch raw data corresponding to a pen touch position. The touch pen may
`
`receive the touch pen synchronization signal through a conductive tip and may
`
`transmit a downlink signal including pen position data to the display panel 100,
`
`based on the received touch pen synchronization signal. Also, the touch driving
`
`circuit 600 may supply the touch driving pulse to touch electrodes TE of a
`
`corresponding horizontal block at every finger sensing period set in the other periods
`
`of the set plurality of second periods TP in one frame and may sense a capacitance
`
`variation of a corresponding touch electrode TE to generate touch raw data
`
`corresponding to a finger touch position.
`
`18
`
`
`
`[0079]
`
`The host controller may receive touch raw data supplied from the
`
`touch driving circuit 600, generate two-dimensional (2D) or three-dimensional (3D)
`
`touch coordinate information from the touch raw data by executing a predetermined
`
`algorithm, and execute an application corresponding to the touch coordinate
`
`information. Here, the host controller may be a micro controller unit (MCU) or an
`
`application processor.
`
`[0080]
`
`FIG. 4 is a diagram for describing a gate driving circuit 300 according
`
`to an embodiment of the present disclosure. FIG. 5 is a diagram for describing a first
`
`driving stage group according to an embodiment illustrated in FIG. 4. FIG. 6 is a
`
`waveform diagram showing a plurality of gate start signals and a plurality of gate
`
`shift clocks illustrated in FIG. 4. FIG. 7 is a diagram for describing a first holding
`
`stage group according to an embodiment illustrated in FIG. 4.
`
`[0081]
`
`Referring to FIGS. 4 to 7, the gate driving circuit 300 according to an
`
`embodiment of the present disclosure may include 11 number of driving stage groups
`
`DSGl to DSGn, k (where k is a natural number equal to “n-l”) number of holding
`
`stage groups HSGl to HSGk, a shift clock l
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