`
`Eurspfiisthes
`g Patentami
`2 European
`3 Patent Office
`0 :eeurope’en
`
`: rte; brevets (it)
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`
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`E? 3 389 36'? A2
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`(12)
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`EURGPEAN PATENT APPLECATEON
`
`(43) Date of publication:
`28.63.2518 Buiietin 2018!”!3
`
`{51)
`
`lntCi.:
`GOQG 3/3233 (2916.91)
`
`(21) Appiicaticn number: 171923514
`
`(22) Date of filing; 22.09.2317
`
`(84) Designated Contracting States:
`At. AT BE BG CH CY CZ DE DK EE ES Fi FR GB
`GR HR HU iE i3 ET i_.i LT LU LV MC MK MT M. NO
`PL PT RO RS SE Si SK SM TR
`
`Designated Extension States:
`BA ME
`
`Designated Veiidetion States:
`MA MD
`
`(30) Priority: 23.G9.2€316 KR 20169122426
`
`(71) Appiicant: 3amsung Bispiay (20., Ltd.
`Gyednggixdo 17113 (KR)
`
`9 Kwen, Sun Jan
`1Yonginusi, Gyecnggi-do (KR)
`» Kim, Byting Sun
`Yongin~si, Gyeonggi-dc (KR)
`-» Park, Hydra Ae
`‘i Yongin-ei, Gyeenggi-do (KR)
`a Park, Hyung Jun
`1 Yongin-ei, Gyecnggi-do (KR)
`v Lee, Jae Yang
`Yonginnsi, Gyeonggindo (KR)
`1’ Jean, YLi Jin
`Yonginnsi, Gyeonggindo (KR)
`
`inventors:
`(7’2)
`e Kim, Yang Wen
`’i Yongin—si, Gyeenggi-do (KR)
`e Lee, Sn .iin
`”i Yongin—ei, Gyeonggi-dd (KR)
`
`
`89522 Heidenneim (DE)
`
`{74) Representative: Dr. Weitzei 8: Partner
`Patent— and Rechteanwéite th
`Friedenstresse ”it)
`
`(54)
`
`DESPLAY DEVECE
`
`A display device includes: a substrate inoiuding
`(57)
`afirst pixei region, at leastone second pixel region having
`a smarter area than the first oixel region, the at least one
`second pixel region being disposed adjacent to the I“ St
`
`pixei region, and a peripheral region surrounding the first
`pixel region and the second pixel region; firstand second
`pixeis respectively provided in the first and second pixel
`regions; first and second iines respectively connected to
`the first and second pixeis; a dummy iine connected to
`one of the first and second "ties to extend to the periph-
`
`erei region, and a first dummy pert ii‘iCileii‘lg a dummy
`pixei connected to the dummy line in the peripheral re-
`gion.
`
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`EP 3 Edit {367 A2
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`2
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`Description
`
`BACKG RQUND
`
`1. Field
`
`{SOME An aspect of the present disclosure relates to a
`display device.
`
`2. Description of the Related Art
`
`[@1202] A display device includes a plurality of pixels
`each including a display element and each pixel includes
`lines and a plurality of transistors connected to the lines,
`the plurality of transistors driving the display element.
`
`
`The lin 9. may have dithrent load values according to
`their lengths. in a final image provided from t is display
`device, a difference in luminance may be caused by a
`difference in load value.
`
`SUM! MARY
`
`[0963} Embodiments provide a display device having
`uniform luminance regardless of regions.
`[coon According to an aspect of the present disclo-
`sure. there is provided a display device includi g: a sub--
`strate including a first pixel region, at least one second
`pixel region having a smaller area than the first pixel re--
`
`gion, the at least one second pixel region being dis csed
`adjacent to the first pixel region, and a peripheral region
`surrounding the first pixel region and the second pixel
`region; first and second pixels respectively provided in
`the firstand second pixel regions; first and second lines
`respectively connected to the first and second pixels; 3
`dumi 'iy line connected to one oithe firstand second lines
`to extend to the peripheral region; and a first dummy part
`including a dummy pixel connected to the dummy line in
`the peripheral region.
`[0065} A length of the first Zine may be greaterthan that
`of the second line, and the d'immy line is connected to
`the second line.
`
`{coast The display device may further include data
`lines providing a data signal to the first and second pixels.
`The first line may he one of a first. scan line providing a
`scan signal tolhe first pixel and a first light emitting control
`line providing a light emitting control signal to the first
`pixel. The second line may he one of a second scan line
`providing a scan signal to the second pixel and a second
`light emitting control line providing a iightemitting control
`signal to the second pixel.
`{Willi} Each of the iirst and second pixels may include
`a transistor connected to a corresponding one ofthe data
`lines and a corresponding one of the first and second
`scan lines, a protective layer covering the transistor, and
`an organic light emitting device connected to the transis-
`tor on the protective layer. The transistor may include:
`an active pattern provided on the substrate; a source
`electrode and a drain electrode, each connected to the
`
`or
`
`15
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`40
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`active pattern; a gate electrode provided on the active
`pattern with a gate insulating layer interposed therebe—
`tween; and an interlayer insulating layer including a first
`interlayer insulating layer, a second interlayer insulating
`layer, and a third interlayer insulating layer, which cover
`the gate electrode and are sequentially stacked. The or—
`ganic light emitting device may include: a first electrode
`connected to the transistor; 3 pixel defining layer expos-
`ing the first electrode. a light emitting layer provided on
`the first electrode; and a second electrode provided on
`the light emitting layer.
`[900:8] The dummy pixel may include: a dummy data
`line intersecting the dummy line; a dummy transistor con-
`nected to the dummy line and the dummy data line; the
`protective layer covering the dummy transistor; the pixel
`defining layer provided on the protective layer; an organic
`layer provided on the pixel d :finlng layer; and a second
`dummy electrode provided on the organic layer. The sec—
`ond dummy electrode may include the same material as
`the second electrode.
`
`[90993 The dummy transistor may include: a dummy
`active pattern provided on the substrate; a dummy source
`electrode and a dummy drain electrode, each connected
`to the dummy active pattern; and a dummy gate electrode
`provided on the dumrriy active pattern with the gate in--
`sulating layer interposed therehetween, the dummy gate
`electrode being connected to the dummy line.
`{core} The first dummy part may include a parasitic
`capacitor formed by the dummy active pattern and the
`dummy line and a parasitic capx cltorformed by the dum-
`my data line and the dummy line.
`{Still} The dummy pixel may include a first dummy
`pixel and a second dummy pixel, which re electrically
`connected to each other, and the first dumi iy pixel may
`be closer to the second pixel region than the second dun:-
`my pixel.
`{0912} The second dummy pixel may further comprise
`a first dummy electrode including the same material as
`the first electrode and provided between the protective
`layer and the pixel defining layer.
`{(3013} The first dumr iy electrode and the second dum—
`my electrode may be electrically connected to each othe :
`to be applied with the same power.
`[$014] The display device may further include a second
`dummy parl overlapping w'th the dummy line in the pe-
`ripheral region, the second dummy part being electrically
`contracted to the first dummy part and disposed to be
`spaced apart from the first dummy part.
`[6915} The display device may further include a power
`supply line disposed on the interlayer insulating layer in
`the peripheral region, the power supply line overlapping
`with the dummy line. The second dummy part may in-
`clude a parasitic capacitor formed by the dummy line and
`the power supply line.
`[@016] The dumt my line may be disposed in the same
`layer as the gate electrode.
`[@017] The first line may be a first scan line providing
`a scan signal to the first pixel. The second line may he a
`
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`3
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`EP 3 39C} (367 A2
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`4
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`m
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`15
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`25
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`40
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`second scan iine providing a scan signal to the second
`pixel.
`The first iine may be a iirst lig it emitting line
`[9018}
`providing a light emitting controi signal to the first pixel.
`The second line may be a second light emitting line pro—
`yiding a iight emitting control signal to the second pixei.
`{(3019} According to an aspect of the present disclo—
`sure, there is provided a display device including: a sub-
`strate including a first pixel region, a second pixel region
`and a third region spaced apart from each other, the sec-
`ond pixel region and the third pixel region having a small--
`or area than the first pixel region, the second pixel region
`and the third pixel region being disposed adjacent to the
`first pixel region, and a peripheral region surrounding the
`first to third pixel regions; first to third pixels respectively
`
`provided in the firstto third pixei regions;
`."stto third tines
`connected to thefirstto third pixels' firstand second dum—
`my lines connected to the second and third "
`'
`
`and second dummy tines extending to the peripheral re—
`gion; afirstdummy pert provided in the peripheral region,
`the firstdum my part con‘ipensatlng fora difference in load
`value between the first line and the second line; and a
`second dummy part provided in the peripheral region,
`the second dummy part compensating tor a difference in
`load value between thefirst line and the third line, wherein
`each of the first and second dummy parts includes a first
`sub-dummy part including a dummy pixel connected to
`the first and second dummy lines,
`
`BREEF DESCREPTEON CBF THE DRAWENGS
`
`{WES} Example embodiments wiii now be described
`more iuiiy hereinafter with reference to the accompany-
`ing drawings; however, they may be embodied in differ—
`ent forms and shouid not be construed as limited to the
`embodiments set forth herein. Rather, these embodi—
`ments are provided so that this disclosure will he thor—
`ough and complete, and will fuliy convey the scope or”
`the example embodiments to those skilled in the art.
`[0&21}
`in the dra'
`'ing figures, dimensions may be ex-
`aggerated for clarity of illustration.
`will be understood
`that when an element is referred to as being ”between"
`two elements, it can be the only element between the
`{.1}
`two elerrients, or one or more intervenin elements may
`(L
`also be present. Like reference l’itJf‘flEBt’ is refer to iike
`elements throughout.
`
`is a plan view iliustrating a display device ac-
`HQ. 1
`cording to an embodiment of the present disclosure.
`PEG. 2 is a block diagram illustrating pixels and a
`driver in a display device according to an embodi—
`ment of the present disclosure.
`FiG. 3 is an equivalent circuit diagram illustrating an
`embodiment of a first pixei shown in F'iG. 2.
`FiG. 4 is a plan view illustrating in detail the first pixel
`shown in FlG. 3.
`FiG. 5 is a sectional view take
`4.
`
`n along ine l--l‘ of FIG.
`
`FlG. 6 is a sectional view taken along line li-ll' of
`FlG. 4.
`
`FiG. 7 is a plan view illustrating a display device ac-
`cording to an embodiment of the present disciosure.
`FlG. 8 is an enlarged view of region EAt ol' FlG. 7.
`FlG. 9 is a pian view iiiustrating a dummy pixel of
`FlG. 8.
`
`FlG. ’10 is a sectional View taken along line ill-ili’ of
`FlG. 9.
`
`FlG. ii is a sectional view taken along line lVi-i'V" of
`HQ. 9.
`
`FiG. 1'2 is an enlarged view of region iii-X2 of HG. 7.
`FlG. 13 is a sectional view taken along line V-V’ of
`Fl 3212.
`
`FlG. 14 is a conceptual View illustrating a first sub-
`dumrny part of a display device according to an e.
`:—
`bodiment of the present disclosure
`FlG. iii is a partial sectional View ofa
`my pixei of the first sub—dum my part.
`FlG. 16 is a partial sectional view ot a second sub—
`dummy pixel of the tirst sub-dummy part.
`
` ' stsub—dum—
`
`DETAELED BESCREPTlGN
`
`[0022} The present disclosure may apply various
`changes and different shape, therefore only illustrate in
`details with r articular examples. However, the examples
`do not limit to certain shapes but apply to all the change
`and equivalent material and replacement. The drawings
`included are illustrated a fashion where the figures are
`expanded for the better understanding.
`[6923}
`Like numbers refer to iike elements throughout.
`In the drawings, the thickness of certain iines,
`layers,
`components, elements or features may be exaggerated
`for clarity.
`it will be understood that, although the terms
`"first”, "second", etc. may be used herein to describe var—
`ious elements, these elements should not be limited by
`these terms. These terms are only used to distinguish
`one eiement from another element. Thus, a “first" ele—
`ment discussed heloi, ' could also be termed a "second"
`
`element without departing from the teachings of the
`present disclosure. As used herein, the singular forms
` 3
`are intended to include the plural forms as well, unless
`
`the context clearly indicates otherwi
`[($243
`li wiii be further understood that the terms "in-
`cludes" and/or "including“, when used in this specifics»
`lion, specify the presence of stated features, integers,
`steps, operations, elements, and/or components, but do
`not preclude the presence and/or addition otone or more
`other features,
`integers, steps, operations, eiements,
`components, and/or groups thereof. Further, an expres—
`sion that an element such as a layer, region, substrate
`or piate is placed "on" or "above" another element indi—
`cates not only a case where the element is placed "di-
`"‘1
`ectiy on" or "just above" the other element but also a
`case where a further eienie it is interposed between the
`element and the other element. On the contrary, an ex--
`pressiori that an element such as a layer, region, subv—
`
`
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`Q1
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`EP 3 3th) {367 A2
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`C75
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`strete or plate is placed "beneath" or "below" another
`element indicates not only a case where the element is
`placed "directly beneath" or "just below" the other ele-
`ment but also a case where a further element is inter—
`
`posed between the element and the other eieme it.
`[0925} Hereinafter, exemplary embodiments of the
`present disclosure will be described in detail with refer—
`enoe to the accompanying drawings.
`[0026}
`FEG. ’ is a plan View illustrating a display device
`according to an embodiment of the present disciosure.
`[8027} Referring to PEG. t,the display device according
`to the embodiment of the present disclosure may include
`a substrate SUB, pixels PXL‘l, PXLZ, and PXL3 (herein--
`after, referred to as Wit), :3 driver that is provided on the
`substrate SUB and drives the pixels PXL, a power supply
`that. supplies power to the pixels Wit, and a line that
`connects the pixels PXL to the driver.
`[9928} The substrate SUB includes a plurality of re-
`gions, and at least two among the regions may have dif—
`ferent areas. As an example, the substrate SUB may
`have two regions, and the two regions may have areas
`different from each other. As another exampie, the sub—
`strate SUB may have three regions. in this case, all of
`the three regions may have areas different from one an—
`other. or two regions among the three regions may have
`same areas and the other one region may have an area
`different from the two regions. As still another example,
`the substrate SUB may have four or more regions.
`{@029}
`in lhe foilowing embodiment, for convenience
`of description, a case Where the substrate SUB includes
`three regions, is , first to third regions At, A2, and A3 is
`illustrated as an example.
`[9939} The first to third regions Al , A2, and A3 may be
`simultaneously driven, or may be driven independently
`from one another. The first to third regions A1,A2 and
`A3 may have various shapes. For example, the first to
`third regions A1, A12, and A3 may be provided in various
`shapes such as a closed-shape polygon including iinear
`sides, a circle, an ellipse, etc, including curved sides,
`and a semicircle, a semi- llipse, etc, including linearand
`curved sides.
`
`[mitt] The first to third regions A1, A2, and A3 may
`include pixel regions PXAl, PXAQ‘, and PXAS (hereinaf-
`ter, referred to as PXA) and peripheral regions PPM,
`PPA2, and PPA3 (hereinafter, referred to as PPA).
`re»-
`speclively. The pixel regions PXA are regions in which
`pixels F’Xl. for displaying images are provided. Each pixel
`PXL will be described later.
`
`in an embodiment ofthe present disclosure. the
`[@321
`first to third pixel regions PXA’l, PXAZ, and PXA3 may
`roughly have shapes corresponding to those of the first
`to third regions Al, A2, and A3, respectively.
`{(3933} The peripheral regions PPA are regions in
`which the pixels PXL are not provided, and any image is
`not displayed in the peripherai regions PPA. The driver
`for driving the pixels PXL, the power supply for soppiying
`powerto the pixels PXL, and a portion oflines (notshown)
`for connecting the pixels PXL to the driver may be pro--
`
`or
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`15
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`40
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`vided in the peripheral regions PPA. The peripheral re—
`gions PPA correspond to a bezel in the final display de—
`vice, and a width of the bezel may be determined based
`on widths of the peripheral regions.
`[90343 Afirst peripheral region l-‘PAT may be provided
`a at least one side of a first pixel region PXA‘i.
`in an
`em bodiment ofthe present disclosure, the first peripheral
`region PPAl surrounds the circumference ofthe first pimx
`el region PXAl, iout may he provided at a portion except
`portions at which the second region A2 and the third re--
`gion A3, which wili be described later, are disposed. in
`an embodiment of the present disclosure, the first pe--
`ripheral region PPA‘: mayi cluo‘e a lateral pertextending
`in a first direction DFtt and a longitudinal part extending
`in a second direction DRE. The longitudinal part of the
`first peripheral region PPA’: may be provided in a pair
`spaced apart from each other along the first direction
`DR”: with theflrst pixel region PXAl interposed therebe—
`tween.
`
`[03353 The second region A2 may have a smaiier area
`than the first region Al. The second region A2 may in—
`clude a second pixel region PXAQ in which an image is
`displayed and a second peripheral region PF‘AQZ sur—
`rounding at least a portion of the second pixel region
`PXAZ.
`
`[(39363 The second pixei region PXAZ may be provided
`in a shape corresponding to that of the second region
`A2. in an embodiment ofthe present. disclosure, the sec-
`ond pixei region PXA2 may have a second width W2
`smalier than a first width W'l of the first region A1. The
`second pixel region PXAZ may have a second length L2
`smaller than a first length Ll of the first region A1. The
`second pixel region PXA2 is provided in a shape protrud—
`ing from the first pixel region PXAl, and may be directly
`connected to the t'rst pixel region PXA’l. in other words,
`one side of the second pixel region PXA2 may contact
`one side of the first pixel region PXAt.
`[6037} The second peripheral region PPAZ may be
`provided at at least one side of the second pixei region
`PXA2.
`in an embodiment of the present disclosure, the
`second peripherai region PPAZ surrounds the second
`pixel region PXAZ, but may not be provided at a portion
`at which the first pixel region PX t and the second pixel
`region PXAE are connected to each other. in an ernhod»
`imeni. of the present disclosure, the second peripheral
`region PPAZ may also include a lateral part extending in
`the first direction DRl and a longitudinal part extending
`in the second direction DRZ. The longitudinal part of the
`second peripheral region F’PAP.‘ may be provided in a pair
`spaced apart from each other along the first direction
`DR”: with the second pixel region PXAZ interposed ther—
`ebe'm/eeh.
`
`{69383 The third region A3. may have a smaller area
`than the first region A’l. For example, the third region A3
`may have the same area as the second region A2. The
`third region A3 may inoiude a third pixel region PXAS in
`which an image is displayed and a third peripherai region
`PPAS surrounding at least a portion of the third pixel rev—
`
`
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`\l
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`EP 3 Edit {367 A2
`
`8
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`glon PXAS.
`[(393331 The third pixel region l'r‘XAB may be provided in
`a shape corresponding to that of the third region A3. in
`an embodiment of the present disclosure, the third pixel
`region PXA3 may have a third width W3 smaller than the
`firstwidth W‘: of the first region At. The third pixel region
`F’XAB may have a third length L3 smaller than the first
`length Li of the first region At. The second width W2
`and the third width WS may he equal to each other. in
`addition. the second length L2 and the third length L3
`may be equal to each other.
`[@1245] The third pixel region PXAB is provided in a
`shape protruding from the first pixel region PXAt, and
`may be directly connected to the first pixel region PXM.
`in other words, one side of the third pixel region PXAS
`may contact one side of the first pixel region PXAl
`room} The third peripheral region PPAS may be pro—
`vided at at least one side of the third pixel region PXAB.
`in an embodiment of the present disclosure, the third
`peripheral region l'v‘f’AL’: surrounds the third pixel region
`PXAEI, but may not he provided at a portion at which the
`first pixel region PXAl and the third pixel region PXAS
`are connected to each other.
`ln an embodiment of the
`
`presentdlsciosure, the third peripheral region Pl’A’d may
`also include a lateral part extending in the first direction
`DR’l and a longitudinal part extending in the second di-
`rection DRE. The longitudinal part of the third peripheral
`region PPAS may be provided in a pair spaced apart from
`each other along the first direction with the first pixel re-
`gion PXAl interposed therebetween.
`[GMZE
`in an embodiment ofthe present disclosure, the
`third region A3 may have a shape line symmetric to the
`second region A2 with respect to a center line of the f'rst
`region A1, in this case, the arrangement or' components
`provided in the third region A3. may be substantially iden-
`tical to that in the second region A2 except some lines
`[9043} Therefore,
`the substrate SUB may have a
`shape in which the second region A2 and the third region
`A3 protrude in the second direction [3R2 from the first
`region A’l.
`in addition, since the second region A2 and
`the third region A3 are disposed to be spaced apart from
`each other, the substrate SUB may have ashape in which
`it is depressed between the second region A2 and the
`third region A3. That is, the substrate SUB may have a
`notch between the second region A2 and the third regior
`'2
`
`in an embodiment ofthe present disclosure. the
`[9044}
`longitudinal parts ofthe first peripheral region PPM may
`be respectively connected to some of the longitudinal
`parts of the second peripheral region PPAZ and the third
`peripheral region PPAS. For example, a left longitudinal
`part oftheflrst peripheral region PPA’i may be connected
`to a left longitudinal part of the second peripheral region
`PPAE. A right longitudinal part or’ the first peripheral re-
`gion PPM may be connected to a right longitudinal part
`of the third peripheral region PPA3.
`in addition, the left
`longitudinal part of the first peripheral region PPA‘: and
`the left longitudinal part of the second peripheral region
`
`or
`
`15
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`40
`
`GPA?! may have the same width W4. The right longitudi—
`nal part otthe first peripheral region PPA‘l and the right
`longitudinal part of the third peripheral region PPAfj‘ may
`have the same width W5.
`
`[90453 The width W4 ofthe left longitudinal parts of the
`first peripheral region PPM and the second peripheral
`region l-"f-"AZ may be different from the width W5 of the
`right longitudinal parts ofthe first peripheral region PPM
`and the third peripheral region PPAS. For example, the
`width W4 ofthe left longitudinal parts ofthe first peripheral
`region PPAt and the second peripheral region PPAQ may
`be smaller than the width W5 of the right longitudinal
`parts of the first peripheral region PPA’: and the third
`peripheral region PPAE.
`reads}
`in an emhodl. tent of the presentdlsclosure, the
`substrate SUB may further include an additional periph—
`eral region APA. The additional peripheral region APA
`may he provided adjacent to the first pixel region PXAt,
`the second peripheral region PP‘AE, and the third periph—
`eral region PPAii. Forexample, the additional peripheral
`region APA may connect the second peripheral region
`PPAZ to the third peripheral region PPAE». For example,
`the additional peripheral region APA may connect a right
`longitudinal part of the second peripheral region Pit-7A2
`to a left longitudinal part of the third peripheral region
`PPAS. That is, the additional peripheral region APA may
`he provided at a side of the first pixel region PXAt be--
`tween the second region A2 and the third region A3.
`[MM] The pixels PXL may he provided in the pixel
`regions PXA, i.e., the first to third pixel regions PXAl,
`PXAZ, and PXAB, on the substrate SUB. E ch pixel PXl-
`is a minimum unit for displaying an image, and a plurality
`of pixels PXL may be provided in the first to third pixel
`regions PXAl, PXAZ, and PXA3, The pixels PXL may
`include a display element that emits light. For example,
`the display element may be any one of a liquid crystal
`display (LCD) element, an electrophoretic display (El-‘0)
`element, an eiectrowetting display (EWD) element, and
`an organic lig
`emitting display (OLE-D) element. Mean—
`while, for convenience of description, a case where the
`display element is an OLED element will be illustrated
`below as an example.
`light of one of red,
`[8948} The pixel PXL may ernlt
`green, and 'olue, but the present disclosure
`not limited
`thereto. For example, the pixel PXt. may emit light of a
`color such as cyan, magenta, yellow, or white.
`[9949} The pixels PXL may include first pixels PXL’:
`arranged in the first pier region PXAl, second pixels
`PXLZ arranged in the second pixel region PXAE, and
`third pixels PXLS arranged in the third pixel region PXAS.
`In an embodiment ofthe present disclosure, each of the
`first to third pixels PXLt, PXLZ, and PXLS may be pro-
`vided in plurality to he arranged in a matrix form along
`rows extending in the first direction Dl-‘t’l and columns
`extending in the second direction DRE. However, the ar—
`rangeme
`of the first to third pixels PXLt, PXL2, and
`PXLS is not particularly limited, and the first to third pixels
`PXLt, PXLZ. and PXLB may be arranged in various
`
`
`
`9
`
`EP 3 3&9 {367 A2
`
`__:. C)
`
`forms. For example, the first pixeis PXL’: may be ar-
`ranged such that the firstdireotion DRi becomes the row
`direction, but the second pixeis F’XLE may be arranged
`along a direction different from the first direction DR'l,
`e.g., a direction oblique to the first direction DRi may
`become the row direction. In addition, it t. 'iii be apparent
`that the third pixels FJXLS may be arranded in a dire .tion
`identical to or different from that of the first pixels PXLt
`and/or the second pixels PXLE. Alternatively, in another
`embodiment of the present disclosure, the row direction
`may become the second direction. 0R2. and the colurn n
`may become the first direction 0R1.
`[0050}
`lvieanwhii
`,
`in the second region A2 and the
`third region A3, the number of second pixeis PXLZ and
`third pixels PXLE may be changed depending on rows.
`More specifically, the second region A2 and the third re-
`gion A3 may include a first sub—region and a second sub—
`region, and in the second region A2 and the third region
`
`A3, the iength ofa row disposed in the second sub—region
`may be greater than that of a row disposed in the first
`sub—region. The number of second pixsis PXLZ? and third
`pixels PXLS, which are arranged on the row, may be de—
`creased as the length of the row is shortened. Therefore
`in the second region A2 and the third region A3, the
`number of second pixels PXL2 and third pixels PXLS.
`which are arranged on a row disposed in the second sub-
`region. may be smaller than that of second pixels PXL2
`and third pixeis PXLE, which are arranged on a row dis--
`posed in the first sub-region. in addition, as the length of
`the row is shortened, the iengths of lines for connecting
`the second pixels F’XLE and the third pixels PXL3 may
`be shortened.
`
`[9951} The driver provides a signal to each pixel PXL
`through the iine, and accordingly. can controi driving of
`each pixel PXL. ii HQ. 1, the line is omitted for conven-
`ience of description. The line wiii he described tater.
`{WEE}
`The driver may include scan drivers SDV’i,
`SDV2, and SEVE‘» (hereinafter, referred to as SDV) that
`provide a scan signal to each pixel f-‘XL through a scan
`line, tight emitting drivers ED‘v’i, EDVZ, and EDV3 (here-
`inafter, referred to as EDV) that provide a iight emitting
`controi signal to each pixei PXL along a light emitting
`
`control line, a data driver DDV that pro 'des 21 data signal
`to each PXL to a data iine, and a timing cont oiier (not
`shown). The timing controiier may control the scan driv-
`ers SUV, the iight emitting driv ars EDV, and the data
`driver DOV.
`[@531
`in an embodiment ofthe present disclosure. the
`scan drivers SD‘v’ may include a first scan driver SDV‘E
`connected to the first pixeis PXLi, a second scan driver
`SDVZ connected to the second pixeis PXLZ, and a third
`scan driver SDV3 connected to the third pixels PXLEE. in
`an embodiment of the .resent disciosure, the light emit—
`ting drivers EDV may inciude a first light emitting driver
`EDVt connected to the first pixels PXLi, a second light
`emitting driver EDVZ connected to the second pixels
`PXL2, and a third light emitting driver EDV3 connected
`to the third pixels PXLS.
`
`m
`
`15
`
`40
`
`[9054] The first scan driver SDVi may be disposed at
`the longitudinai part in the first peripherai region PPM.
`Since the peripheral part of the first peripheral region
`fJPAt
`is provided in pair spaced apart from each other
`along the first direction, the first scan driver SDV’] may
`be disposed at at least one side oi the iongitudinai part
`of the first peripheral region PPA’i. The first scan driver
`63th may extend long along the length direction of the
`first peripheral region PPM.
`[0055}
`in a similar manner the second scan driver
`SDVZ may be disposed in the second peripheral region
`PPAQ, and the third scan driver SDVS may be disposed
`in the third peripheral region PPAB.
`[9056}
`in an embodiment ofthe presentdisclosure, the
`scan drivers SDV may be directly mounted on the sub-
`strate SUB. When the. scan drivers SDV are directiy
`mounted on the substrate SUB, the scan drivers SDV
`may he formed togethert 'ith the pixeis PXL in a process
`of forming the pixels PXL. However. the mounting posi—
`tion and forming method of the scan drivers SUV are not
`limited thereto. For exampie, the scan drivers SDV may
`be an integrated circuit (i0) chip and the lC chip may be
`provided in a chip on glass form on the substrate SUB.
`Aiternativeiy, the scan drivers SDV may be mounted on
`a printed circuit board to be connected to the substrate
`SUB through a connection member.
`[@657]
`Similar to the first scan driver SDVi, the first
`iight emitting driver EDVi may also be disposed at the
`longitudinai part in the first peripheral region PPAi. The
`tirstiight emitting driver EDVi may hedi posed at r t least
`one side of the iongittidinai part of the first peripheral
`region PPAi. The first iight emitting driver EDVi may
`extend aiong the length direction of the first peripheral
`region PPA’l.
`{0953}
`in a similar manner, the second iight emitting
`driver EDV2 may be disposed in the second peripheral
`region PPAZE, and the third light at iitting driver EDV3 may
`be disposed in the third peripherai region PPAS.
`{0059}
`in an embodiment of the presentdisclosure, the
`light emitting drivers EDV may be directiy mounted on
`the substrate SUB. When the light emitting drivers EDV
`are directly mounted on the substrate SUB, the light emit—
`ting driv are EDV may be formed together with the pixeis
`PXi.
`in the process of forming the pixels PXL. l-lovvever,
`the mounting position and forming method of the light
`em itting drivers EDV are not limited thereto. Forexampie,
`the iight er .itting drivers EDV may be an it? chip and the
`i0 chip may be provided in a chip on glass form on the
`substrate SUB. Alternatively, the light emitting drivers
`EDV may be mounted on a printed Circuit board to be
`connected to the substrate SUB through a connection
`member.
`
`in the embodiment of the present disciosure, a
`{60663
`case where the scan drivers SDV and the light emitting
`drivers EDV are adjacent to each other and formed at
`only one side of the pair of longitudinai parts of the pe—
`ripheral regions PPA has been illustrated as an exampie:
`but tie present disclosure is not limited thereto. The at
`
`
`
`11
`
`EP 3 3G9 (367 A2
`
`..r.
`
`in.)
`
`rangement of the scan drivers SUV and the tight emitting
`drivers EDV may be changed in various manners. For
`exampie, the first scan driver SDV‘i may he provided at
`one side of the longitudinal part of the first peripheral
`region PPAi, and the first tight emitting driver EDV": may
`be provided at the other side of the longitudinal part of
`the first peripheral region PPM. Alternatively, the first
`scan driver SDVf may be provided at both the sides of
`the iongitudinal part of the first peripheral region PPM,
`and the first Eight emitting driver EDV’: may be provided
`at oriiy one side of the tongitudinai part of the first periph-
`rai region PPM.
`[0061} The data driv

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