`571-272-7822
`
`Paper: 7
`Entered: October 20, 2015
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`NVIDIA CORPORATION,
`Petitioner,
`
`V.
`
`SAMSUNG ELECTRONICS CoO., LTD,
`Patent Owner.
`
`Case IPR2015-01135
`Patent 7,804,734 B2
`
`Before KEVIN F. TURNER, BEVERLY M. BUNTING,and
`JON B. TORNQUIST,Administrative Patent Judges.
`
`TORNQUIST,Administrative Patent Judge.
`
`DECISION
`DenyingInstitution of Inter Partes Review
`37 CER. § 42.108
`
`
`
`IPR2015-01135
`Patent 7,804,734 B2
`
`A. Background
`
`I. INTRODUCTION
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`NVIDIA Corporation (“Petitioner”) filed a Petition (Paper2, “Pet.”’)
`
`requesting inter partes review ofclaims 1, 7-9, 12, 13, 17, and 19 of US.
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`Patent No. 7,804,734 B2 (Ex. 1101, “the ’734 patent”). Samsung
`
`Electronics Co., Ltd. (“Patent Owner’) filed a Preliminary Response (Paper
`6, “Prelim. Resp.”) to the Petition.
`|
`Wehavejurisdiction under 35 U.S.C. § 314(a), which providesthat an
`inter partes review maynot beinstituted “unless .
`.
`. there 1s a reasonable
`
`likelihood that the petitioner would prevail with respect to at least 1 of the
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`claims challenged in the petition.” For the reasons set forth below, we do
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`not institute an inter partes review for the challenged claims.
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`B. Related Proceedings
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`The parties inform usthat the ’734 patent is the subject of a Petition
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`for inter partes review in IPR2015-01068 and an investigation before the
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`International Trade Commission: Certain Graphics Processing Chips,
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`Systems on a Chip, and Products Containing the Same, 337-TA-941
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`(USITC). Pet. 4-5; Paper 5, 2. Patent Owneralso identifies
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`IPR2015-01062 and IPR2015-01065as related to the current proceeding.
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`Pet. 5.
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`C. The ’734 Patent
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`The ’734 patent discloses a data strobe buffer, and a memory system
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`containing the same,that can be interfaced to different types of
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`semiconductor memory devices. Ex. 1101, 1:15-19. In one embodiment of
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`the ’734 patent, during a read operation inafirst mode, the data strobe
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`buffer receives a data strobe signal, comparesthis signal with a reference
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`
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`IPR2015-01135
`Patent 7,804,734 B2
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`voltage Vref, and outputs a new data strobe signal based on the results of the
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`comparison. Jd. at 4:32-37. During a read operation in a second mode,the
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`data strobe buffer receives a data strobe signal and passesthis signal without
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`comparing it with the reference voltage Vref. Id. at 4:44-48. According to
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`the ’734 patent, the first mode may be an operating modeof the data strobe
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`buffer when the data strobe buffer interfaces with Double-Data-Rate (DDR)
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`Synchronous Dynamic Random Access Memory (SDRAM)and the second
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`mode maybe an operating modeofthe data strobe buffer when the data
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`strobe buffer interfaces with Mobile Double-Data-Rate (MDDR) SDRAM.
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`Id. at 1:21-27, 4:37-39, 4:48-51, 5:13-16, 5:25-30, Figs. 3A, 3B.
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`D. Illustrative Claim
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`Ofthe challenged claims, claims | and 17 are independent. Claim|is
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`illustrative of the challenged claims and is reproduced below:
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`1. A data strobe buffer comprising:
`
`a first input/output node;
`a first driver coupled to the first input/output node, the first
`driver configured to output a first data strobe signal to the
`first input/output node during a write operation; and
`a first receiver coupled to receive a second data strobe signal
`from the first
`input/output node and output a third data
`strobe signal during a read operation when the data strobe
`buffer
`is
`in a first or second mode,
`the first receiver
`configured to compare the second data strobe signal with a
`first reference voltage and output a result of the comparison
`as the third data strobe signal when the data strobe buffer is
`in the first mode,
`the receiver further configured to not
`compare the second data strobe signal with the first
`reference voltage when the data strobe buffer is in the
`second mode.
`
`Ex. 1101, 8:27-42.
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`
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`IPR2015-01135
`Patent 7,804,734 B2
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`E. The Asserted Ground of Unpatentability
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`Petitioner asserts the following ground of unpatentability (Pet. 5):
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`Whetherclaims 1, 7-9, 12, 13, 17, and 19 are unpatentable under 35
`U.S.C. § 103 as having been obvious over Seo! and Kong.’
`
`II. ANALYSIS
`
`A. Claim Construction
`
`In an inter partes review,“[a] claim in an unexpired patent shall be
`given its broadest reasonable construction in light of the specification of the
`patent in which it appears.” 37 C.F.R. § 42.100(b); Jn re Cuozzo Speed
`Tech., LLC, 793 F.3d 1268, 1275-79 (Fed. Cir. 2015). In determining the
`
`broadest reasonable construction, we presumethat claim termscarry their
`ordinary and customary meaning. See In re Translogic Tech., Inc., 504 F.3d
`1249, 1257 (Fed. Cir. 2007). This presumption may be rebutted when a
`patentee, acting as a lexicographer, sets forth an alternate definition of a
`term in the specification with reasonable clarity, deliberateness, and
`precision. In re Paulsen, 30 F.3d 1475, 1480 (Fed. Cir. 1994).
`Petitioner proffers claim constructions for four terms: “coupled,”
`“data strobe signal,” “data strobe bar signal,” and “input/output node.” Pet.
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`13-14. Patent Ownerproposesconstructions for the terms “mode” and
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`“input/output node.” Prelim. Resp. 8-14.
`Uponreview of the record, we determine that no claim terms need be
`construed for purposesofthis decision.’ See Vivid Techs., Inc. v. Am. Sci. &
`
`'U.S. Patent No. 6,819,602 B2, issued Nov. 16, 2004 (Ex. 1103).
`* US. Patent No. 7,173,871 B2, issued Feb. 6, 2007 (Ex. 1104).
`3 We discuss below the terms “read” and “write,” as used in the context of
`the ’734 patent.
`
`
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`IPR2015-01135
`Patent 7,804,734 B2
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`Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999) (“only those terms need be
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`construed that are in controversy and only to the extent necessary to resolve
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`the controversy.”’)
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`B. Obviousness Based on Seo and Kong
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`Petitioner contends that claims 1, 7-9, 12, 13, 17, and 19 of the 734
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`patent are unpatentable under 35 U.S.C. § 103 in view ofSeo and Kong.
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`Pet. 32-55. In support ofits contentions, Petitioner relies on the declaration
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`testimony of Dr. Bruce Jacob (Ex. 1107). For the reasonsthat follow, we
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`determine Petitioner has not demonstrated a reasonable likelihood of
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`prevailing as to claims 1, 7—9; 12, 13, 17, and 19 of the ’734 patent.
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`I. Seo
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`Seo is directed to a multimode data buffer and a method for
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`controlling propagation time delay for a semiconductor memory device. Ex.
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`1103, 1:15-17. Figure 2 of Seo is reproduced below:
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`FIG. 2
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`
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`Figure 2 a block diagram of a data strobe input buffer of Seo.
`Seo discloses that data strobe input buffer 13 of Figure 2 may be a
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`single mode/dual mode (SM/DM)double-use data strobe input bufferthat, in
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`5
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`
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`IPR2015-01135
`Patent 7,804,734 B2
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`response to a control signal (CNT/CNTB), differentially amplifies data
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`strobe signal (DQS) and reference voltage (VREF) whenin single mode
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`(SM)and differentially amplifies data strobe signal (DQS) and inverse data
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`strobe signal (DQSB) when in dual mode (DM). Jd. at 7:48-54, 7:63-67,
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`8:4-8.
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`2. Kong
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`“Kong discloses a semiconductor memory device containing a circuit
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`for inputting and outputting a bi-directional data strobe signal.” Ex. 1107
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`{ 84 (citing Ex. 1104, 1:14-18, Abstract). Figure 3 of Kong 1s reproduced
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`below:
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`FIG. 3
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`DQS
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`Figure 3 illustrates circuit diagrams of a data strobe input and output buffer
`and a controlcircuit contained in a semiconductor memory device.
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`IPR2015-01135
`Patent 7,804,734 B2
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`Dr. Jacobtestifies that, although the process of driving the data strobe
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`signal is not disclosed in Seo, including whether the data strobe bufferis
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`uni-directional or bi-directional, circuits for driving a bi-directional data
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`strobe are disclosed in Kong. Ex. 1107 999. Specifically, Dr. Jacob
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`testifies that element 32 of Kongts a data-strobe input buffer and element 34
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`of Kongis a data-strobe output buffer. Jd. ¥ 100.
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`3. Analysis
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`Independent claims 1 and 17 both require a driver “configured to
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`output a first data strobe signal to the first input/output node during a write
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`operation”and a “receiver coupled to receive a second data strobe signal
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`from the first input/output node and output a third data strobe signal during a
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`read operation.” Ex. 1101, 8:30-34, 10:26-31. Both parties agree that, as
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`used in the claims of the ’734 patent, the term “read” meansto read data
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`from a memory device and the term “write” meansto write data to a
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`memory device. Pet. 11 (noting that in the ’734 patent “a driver is used to
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`drive a data strobe signal to the memory device during a write operation”),
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`25; Ex. 1107 J 32; Prelim. Resp. 15-16; see also Ex. 1101, 3:52—56, 3:65—
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`4:2 (noting thatthe “data strobe buffer 190 providesafirst data strobe signal
`DQS_1 to the memory device 200 during a write operation, and 1s provided
`with a second data strobe signal DOS_2 by the memory device 200 during a
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`read operation’).
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`Petitioner argues, however, that a write operation from the perspective
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`of a memory controller is the equivalent of a read operation from the
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`perspective of the memory device. Likewise, Petitioner argues that a read
`_ operation from the perspective of a memory controller is the equivalent of a
`write operation from the perspective of the memory device. Pet. 25 (citing
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`IPR2015-01135
`Patent 7,804,734 B2
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`Ex. 1107 Jf 89-92), 35 (citing Ex. 1107 J] 127-128), 37 (citing Ex. 1107
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`q 133). According to Petitioner, the situation is akin to cars that drive on the
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`left or right side of the road, but have the same components and work the
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`same way. Id. at 24. Petitioner concludes, therefore, that the “location and
`perspective of the data strobe buffer does not alter the invalidity analysis.”
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`Id. at 25 (citing Ex. 110789-92).
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`Patent Ownerasserts the challenged claims would not have been
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`obvious over Seo and Kongbecauseneither reference discloses a data strobe
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`buffer for use in a memory controller. Prelim. Resp. 15—16. In particular,
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`Patent Ownerasserts that both Seo and Kongare directed to data strobe
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`buffers for use in a memory device, which would not output a data strobe.
`signal during a “write” operation or receive a data strobe signal during a
`“read” operation,as recited in claim 1 of the ’734 patent. Jd. at 16-17.
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`According to Patent Owner,the difference in placement betweenthe data
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`strobe buffer of Seo and Kongandthe data strobe buffer of the ’734 patentis
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`“fundamental,” because placementofthe data strobe buffer in the memory
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`controller enables the memory controller to operate in conjunction with
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`varying types of memory devices.
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`/d. at 16.
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`Patent Owner’s argumentis persuasive. As discussed above,
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`Petitioner concedesthat neither Seo nor Kongdiscloses a data strobe buffer
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`that outputs a data strobe signal during a “write operation”orthat receives a
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`data strobe signal during a “read operation.” Pet. 35 (“Kong discloses a
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`‘read’ operation in which the data strobe is output... .”); see also Ex. 1107
`
`{ 90 (Dr. Jacob testifying that, “[w]hen Seo or Kongtalk about outputting a
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`data strobe signal, they are talking about a read operation, because a DRAM
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`outputs the data and data strobe signals during a read operation”). Thus, we
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`IPR2015-01135
`Patent 7,804,734 B2
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`are not persuaded that Seo and Kongexplicitly disclose or suggest a “first
`driver configured to outputa first data strobe signal to the first input/output
`
`node during a write operation”or a receiver “coupled to receive a second
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`data strobe signal from the first input/output node and output a third data
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`strobe signal during a read operation,” as recited in claim 1 of the ’734
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`patent. Ex. 1101, 8:29-34.
`Petitioner’s argumentthat the function of the two data strobe buffers
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`is equivalent, i.e., “regardless of where the data strobe buffer is located (in
`the memory controller or memory device)it is used for both write and read
`operations,” is not persuasive, because this argument doesnot address the
`claims as written. Pet. 24. Moreover, as noted by Patent Owner, Petitioner
`
`dues not persuasively argue that it would have been obviousto place the data
`strobe buffer of Seo and Kong in a memory controller, as opposed to a
`
`memory device, such that the data strobe buffer would output a data strobe
`signal “during a write operation” and receive a data strobe signal “during a
`read operation.” Prelim Resp. 17 (“Petitioner does not—and cannot—allege
`
`that it would have been obviousto place the combined system of Seo and
`
`Kong in a memory controller.”). Thus, we are not persuaded that the
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`combination of Seo and Kong, as formulated by Petitioner, discloses or
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`suggests every limitation of independent claims 1 and 17 of the °734 patent.
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`4. Conclusion
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`Based on the foregoing, and on the arguments presented in the
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`Petition, Petitioner has not demonstrated a reasonable likelihood that
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`independentclaims 1 and 17 would have been obvious over Seo and Kong.
`As dependent claims 7-9, 12, 13, and 19 each depend from claim 1 or claim
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`IPR2015-01135
`Patent 7,804,734 B2
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`17, we are likewise not persuaded that these claims would have been
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`obvious over Seo and Kong.
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`lI. ORDER
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`In consideration of the foregoing,it is hereby:
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`ORDEREDthat pursuant to 35 U.S.C. § 314(a), an inter partes
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`review is not instituted.
`
`10
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`IPR2015-01135
`Patent 7,804,734 B2
`
`PETITIONER:
`
`Bob Steinberg
`Julie Holloway
`Latham & Watkins LLP
`bob.steinberg@Iw.com
`Julie.Holloway@lw.com
`
`PATENT OWNER:
`
`Robert Appleby
`Gregory Arovas
`Kirkland & Ellis LLP
`robert.appleby@kirkland.com
`greg.arovas@kirkland.com
`
`