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`Case 6:23-cv-00158-ADA Document 71-1 Filed 04/19/24 Page 1 of 45
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`EXHIBIT J
`EXHIBITJ
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`Contact
`
`www.linkedin.com/in/ramesh-
`chandrasekhar-28b2484 (LinkedIn)
`
`Ramesh Chandrasekhar
`
`VP and Head of Engineering, Snapdragon Spaces XR
`Encinitas, California, United States
`
`Top Skills
`Embedded Systems
`Embedded Software
`Debugging
`
`Patents
`System for Dynamic Registration of
`Privileged Mode Hooks in a Device
`Fast remote procedure call
`System for selectively enabling
`operating modes of a device
`System for Providing Transitions
`Between Operating Modes of A
`Device
`Methods, systems, and apparatus for
`object invocation across protection
`domain boundaries
`
`Summary
`Building the AR/VR Engineering team at Qualcomm since 2014,
`and currently leading a global team of engineers working on next
`generation AR/VR solutions including Snapdragon Spaces.
`
`Experience
`
`Qualcomm
`25 years 6 months
`Vice President of Engineering
`November 2022 - Present (1 year 6 months)
`Greater San Diego Area
`
`Vice President of Engineering
`November 2022 - Present (1 year 6 months)
`San Diego Metropolitan Area
`
`Senior Director of Technology
`November 1998 - November 2022 (24 years 1 month)
`Greater San Diego Area
`Currently leading engineering for:
`- eXtended Reality (AR, VR) and Computer Vision SW On Snapdragon
`
`Previous:
`- Sensors Platform SW on Snapdragon
`- Hexagon SDK and DSP Services
`- Snapdragon SenseID
`- Windows Phone Multimedia
`- Brew Multimedia
`- Brew OS
`- Image Encoders, Decoders, and Animation formats
`- Brew Module Loading
`- Globalstar gateway software
`
`CDAC
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`Member, Technical Staff
`1994 - 1996 (2 years)
`
`Education
`Indian Institute of Technology, Kharagpur
` · (1987 - 1992)
`
`Indian Institute of Technology, Kharagpur
` · (1987 - 1992)
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`Contact
`
`www.linkedin.com/in/dave-
`durnil-07752a (LinkedIn)
`gaming.qualcomm.com (Company)
`
`Dave Durnil
`
`Global Head of Gaming & Snapdragon Studios at Qualcomm
`San Diego, California, United States
`
`Top Skills
`Mobile Devices
`3D graphics
`Game Development
`
`Summary
`Technology Product and Engineering leader with broad technical
`expertise of 25 years who has strong product management,
`business, and marketing acumen. Focused on driving new gaming
`innovations on multiple platforms and building new technology
`teams.
`
`Fostering an open and collaborative environment. Currently driving
`large-scale, cross-functional gaming software and hardware
`initiatives worldwide supporting Snapdragon platforms with over a 3
`Billion install base.
`
`Experience
`
`Qualcomm
`25 years 3 months
`Global Head & GM of Gaming and Snapdragon Studios
`July 2018 - Present (5 years 10 months)
`San Diego, CA
`Leading Qualcomm's global gaming ecosystem & advanced technologies for
`across all business units including all platforms for Mobile, Compute, XR, PC,
`Handheld and Auto. Driving Snapdragon Elite Gaming software products,
`generative AI targeted at next generation gaming experiences across our
`entire chipset product portfolio worldwide. (Install base is over 3 Billion and
`growing).
`
`Studio Head and GM of Snapdragon Studios, leading all product
`management, business and engineering teams. Responsible for cross-
`platform game development including co-development with strategic game
`studios and partners, advanced game engines, next-gen gaming IP across
`Snapdragon's hardware blocks, new product development, business
`development, global publisher partnerships and ecosystem enablement,
`games marketing, studio creative services.
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`Official Public spokesperson for Qualcomm on all things Gaming across all
`business units.
`
`Head of Snapdragon Gaming & Studios (Sr. Director of Product Mgmt &
`Engineering)
`October 2012 - July 2018 (5 years 10 months)
`Greater San Diego Area
`Responsible for leading all gaming product development, consumer products,
`and engineering worldwide targeted for our Snapdragon processors (over
`3 Billion install base) across all our core IPs (CPU, GPU, DPU, DSP, NSP),
`including growing our Global Snapdragon Gaming Ecosystem.
`
`Managed large-scale, cross-functional engineering teams developing new
`gaming technologies for multiple market segments (Mobile, VR, AR, PC).
`Established Qualcomm Game Studios for regional game co-development with
`strategic partners, publishing, marketing, and investment initiatives. Managed
`multiple game studio support teams worldwide.
`
`Lead VR content development and worked with Oculus in the early days.
`
`Mobile Gaming (Director of Product Mgmt & Engineering)
`March 2006 - October 2012 (6 years 8 months)
`Head of Mobile Gaming in Qualcomm's chipset division. Drove new chipset
`software and hardware requirements for mobile gaming. Played a key role
`in enabling the game industry's first-generation Mobile Gaming Developer
`ecosystem.
`
`Founded and developed several new engineering teams at Qualcomm
`including the first Brew Gaming Team, Android Gaming Team, Advanced
`Content Group, Game Engine Development Team and R&D team, Graphics
`Middleware Team, and the Snapdragon Developer Tools Team.
`
`Create some of the first major AR showcase demos and experiences in the
`market.
`
`Qualcomm invented the world's first global app store on mobile phones before
`Android and IOS.
`Lead the Brew & Android mobile game developer engineering programs
`including Qualcomm's global gaming ecosystem.
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`Lead Product Management for multiple Gaming Products with top OEMs over
`the years worldwide.
`
`3D Graphics & Gaming Technologies (Principal Engineer/Manager)
`February 1999 - March 2006 (7 years 2 months)
`Pioneer in Mobile Gaming. Founded the first 3D graphics & game
`technologies teams at Qualcomm which lead to one of the world's first Mobile
`GPUs. Today we have shipped over 2.5 Billion Mobile GPUs. Lead Gaming
`Engineering efforts in creating many of the world's first mobile technologies
`that played a pivotal role in the graphics industry to bring advanced 3D
`Graphics and Gaming to mobile phones worldwide.
`
`Lockheed Martin Space Systems
`Lead Engineer, NASA Mars space program
`March 1995 - February 1999 (4 years)
`Lead engineer and software manager for developing real-time in-flight, entry,
`descent and landing software and simulations for the Mars Orbiter and Mars
`Lander including the Stardust spacecraft. Development efforts also included
`mission software and real-time 3D graphical simulations for JPL/NASA.
`
`The Astronautics division designs and manufactures space launch vehicles
`including interplanetary spacecrafts for NASA.
`
`Education
`Colorado State University
`B.S., Engineering Science, (Computer Graphics & Engineering)
`
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`Contact
`
`www.linkedin.com/in/
`sreelakshmigownipalli (LinkedIn)
`
`Top Skills
`Universal Asynchronous Receiver/
`Transmitter (UART)
`Serial peripheral interface
`I2C
`
`Certifications
`Big Data and Hadoop Essentials
`Hadoop Starter Kit
`
`Sreelakshmi Gownipalli
`
`Senior Staff Engineer @ Qualcomm | Linux Diagnostics Lead
`San Diego, California, United States
`
`Summary
`As a Linux Diagnostics Lead and Senior Staff Engineer at
`Qualcomm, I have over 10 years of experience in software design,
`development, and performance optimization for wireless chipsets
`and connectivity devices. I lead a team of 5+ engineers across
`various geographic locations, delivering commercial grade software
`that ships in billion+ smartphones.
`
`My core competencies include Linux kernel BSP and diagnostic
`driver development, board bring up and pre-silicon emulation,
`and collaboration with OEMs and product management. I have
`significant knowledge of porting drivers for various platforms
`and Linux kernel workflow, as well as exposure to user space
`C++ libraries and Android applications. I am passionate about
`learning and contributing to embedded, connected devices
`and open source communities. My code samples can be found
`at https://source.codeaurora.org/quic/la/kernel/msm-4.4/log/?
`h=msm-4.4&qt=author&q=sgownipa and https://github.com/
`gownipal. My mission is to drive innovative and high-quality solutions
`for Qualcomm SOCs and Snapdragon processors.
`
`Experience
`
`Qualcomm Innovation Center Inc
`12 years 1 month
`Senior Staff Engineer
`October 2022 - Present (1 year 7 months)
`Greater San Diego Area
`▪ Linux Diagnostics lead, driving the deliverables for all diagnostics drivers into
`BSP that is delivered across all family of Snapdragon processors.
`▪ Collaborated with system architects, product management to define and
`drive Linux Diagnostics team road map for Qualcomm SOCs
`▪ Designed and implemented Linux kernel drivers for diagnostics services on
`Snapdragon processors.
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`▪ Performed board bring up and pre-silicon emulation development of drivers
`for ARM based Qualcomm SOCs that resulted in early code delivery.
`▪ Significant knowledge of porting drivers for various platforms and Linux
`kernel workflow.
`▪ Exposed user space C++ libraries to Android applications Via JNI (Java
`Native Interface), Java wrapper libraries to reduce code redundancy in multiple
`applications.
`▪ Created Android applications to demonstrate apis usage and test diagnostic
`services
`▪ Developed interfaces for inter-core diagnostics communication via RPMsg.
`▪ Researched code and provided several optimal solutions resulted in 35-40%
`throughput enhancement and memory foot print reduction.
`▪ Actively involved in analyzing the needs for adaptation of diagnostics
`solution to the future android releases
`▪ Effectively worked with Google, OEMs, ODMs during product development
`and release
`▪ Derived security mechanisms for Android Diagnostics for filtering android
`applications causing security vulnerability
`▪ Keen focus on delivering quality code with extensive code reviews and
`attention to power and
`performance optimization of diagnostic drivers.
`
`Staff Engineer
`May 2016 - October 2022 (6 years 6 months)
`
`Senior Engineer
`April 2012 - April 2016 (4 years 1 month)
`
`Qualcomm
`Engineer
`August 2009 - May 2012 (2 years 10 months)
`▪ Led Diagnostic development for all Audio DSP processors on Qualcomm
`SOCs.
`▪ Developed power saving, central routing, data flow control protocol features
`besides providing exceptional customer support for diagnostics issues.
`▪ Developed diagnostics drivers on windows mobile 7/8, QNX in C/C++
`▪ Designed user space applications on Windows Phone 8 that helps in testing
`diagnostics services.
`▪ Enhanced diagnostics code to improve performance and reduce memory
`footprint.
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`▪ Designed flow control mechanism for Diagnostics services to help data flow
`from peripheral processor to apps based on the buffer availability.
`▪ Delivered OS abstraction layer, resulted in code portability across several
`operating systems.
`▪ Created automation test framework using Perl to help test teams.
`▪ Mentored new employees, interns on diagnostics services and performed
`peer design and code reviews
`
`Qualcomm
`Interim Engineering Intern - LTE (L2/L3)
`January 2009 - May 2009 (5 months)
`▪ Performed off target integration of LTE protocol stack that resulted in
`reducing LTE protocol bring up
`time on Qualcomm SOCs. Integrated L2/L3 with Layer1 manager of the
`protocol stack
`▪ Delivered POSIX test threads for protocol stack
`▪ Designed and developed code for Integration test cases of L2/L3 layers
`using C++
`
`Qualcomm
`Interim Engineering Intern - Multimedia Apps
`May 2008 - August 2008 (4 months)
`▪ Debugged and resolved critical product launch gating multimedia display/
`graphics driver issues from customers on Win Mob 6.1 & 7
`▪ Developed Perl scripts to parse automation logs that helped in reducing
`several man-hours and
`improved accuracy.
`▪ Test and profile graphics using 2d and 3d benchmark utilities that helped
`optimize Qualcomm solution on its chips.
`
`HCL Technologies
`Member Technical Staff
`June 2006 - August 2007 (1 year 3 months)
`▪ Extensively involved in the development of Embedded software for wire
`bonder machines in C, C++ using VxWorks.
`▪ Designed and developed new Features to control Wire bonder from remote
`host. Fixed high priority defects of wire bonder software.
`▪ Developed algorithms for Pattern Recognition System to detect the presence
`of die, recognize errors of die placement
`▪ Developed perl scripts for initializing the machine.
`
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`Education
`University of Southern California
`MS, Computer Science · (2007 - 2009)
`
`UCSD
`Finance Planning, Financial Markets and Investment Strategies,International
`Finance and Capital Markets · (2013)
`
`Sri Venkateswara University
`BTech, Computer Science · (2002 - 2006)
`
`Nalanda Mahila Kalasala
`
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`Contact
`
`www.linkedin.com/in/alexyjoseph
`(LinkedIn)
`
`Top Skills
`Software Development
`Android Development
`C (Programming Language)
`
`Languages
`English (Full Professional)
`Malayalam (Native or Bilingual)
`
`Patents
`Efficient load sharing and
`accelerating of audio post-
`processing
`Power efficient metadata transport
`signaling mechanism for codec
`control and configuration
`Power optimized link quality
`detection and feedback
`
`Alexy Joseph
`
`Embedded multimedia software engineer with a zeal for high
`performance systems
`San Diego, California, United States
`
`Summary
`Passionate problem-solver: 20+ years experience architecting
`embedded multimedia software, currently driving next-gen
`automotive audio at Qualcomm. Proven track record in optimizing
`memory, latency, performance, and power for diverse applications.
`
`Technical maestro: Skilled in cutting-edge technologies like
`Bluetooth audio and post-processing algorithms. Multiple patents
`awarded, reflecting innovative spirit.
`
`Leadership champion: Adept at guiding diverse global teams,
`fostering cross-continental collaboration, and spearheading
`successful projects.
`
`Impactful solutions: Dedicated to creating in-vehicle and Embedded
`multimedia systems that elevate safety, quality, performance and
`user experience.
`
`Connect with me to discuss opportunities where I can contribute my
`expertise and passion!
`
`Keywords: Embedded multimedia software, automotive audio,
`memory optimization, latency reduction, performance enhancement,
`power efficiency, Bluetooth audio, audio post-processing, leadership,
`team management, international collaboration, innovation, patents,
`problem-solving
`
`Experience
`
`Qualcomm Innovation Center Inc
`11 years 7 months
`Senior Staff Engineer
`November 2016 - Present (7 years 6 months)
`Greater San Diego Area
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`Current project:
`* Automotive audio software architect working on developing breakthrough
`solutions for in-vehicle audio safety through advanced bootloader integration.
`
`Previous work:
`* Spearheaded a multi-site team to re-architect, commercialize, and optimize
`Qualcomm's automotive audio solution, boosting reliability and performance.
`
`* Led the engineering of a next-generation audio solution, optimizing memory,
`latency, performance, and power to enable expansive applications.
`
`* Pioneered advanced Bluetooth audio features in next-gen Qualcomm
`chips, boosting audio latency and connection reliability significantly. (some
`information given in the links below)
`
`* Delivering predictable, ultra-low latency audio by eradicating system
`performance roadblocks.
`
`* Qualcomm's Snapdragon Virtual reality audio solution
`
`Staff Engineer
`February 2016 - November 2016 (10 months)
`San Diego, California, United States
`* Led cross-continental team to fast-track Android upgrades & commercialize
`audio solutions on Qualcomm chipsets.
`
`Staff Engineer/Manager
`June 2014 - February 2016 (1 year 9 months)
`Greater San Diego Area
`* Developed a framework for seamless integration of audio post-processing
`algorithms, cutting integration time by 90% and reducing support effort by 90%
`
`* Deeply involved in the Android Audio Framework support for Android
`upgrades across all Qualcomm chipsets. Specialize in high-performance, low-
`latency audio and power optimization for diverse use cases.
`
`* Additional responsibilities as a People manager in addition to a tech manager
`
`Staff engineer
`October 2012 - June 2014 (1 year 9 months)
`Greater San Diego Area
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`Spearheaded commercialization of Android audio across global teams:
`
`* Led cross-functional teams across India, Shanghai, Korea, and Taiwan to
`rapidly resolve audio issues for Tier 1 OEMs, ensuring swift product launches.
`* With my expertise in Stagefright and audio HAL i enabled low-latency, low-
`power audio playback, and tailored power management for diverse audio use
`cases.
`
`PathPartner Technology
`6 years 1 month
`Architect
`July 2011 - August 2012 (1 year 2 months)
`Bengaluru Area, India
`* Architected and implemented high-performance multimedia solutions for Tier
`1 clients, leveraging Texas Instruments processors like OMAP4 and DM365.
`* Led a team of 15 engineers, ensuring project delivery, code reviews, and
`fostering individual growth through mentorship.
`* Bridged the gap between business and engineering, translating customer
`requirements into tailored solutions and securing partnerships.
`* Spearheaded process improvements, defining recruitment strategies, training
`frameworks, and performance evaluation systems.
`* Continuously seek opportunities to innovate, drive growth, and tackle
`challenging technical problems.
`* Proven leadership skills in managing and motivating diverse teams.
`
`Senior Technical Leader
`January 2010 - July 2011 (1 year 7 months)
`Bengaluru Area, India
`Enabling hardware accelerated skype video calling on TI processors.
`http://www.engadget.com/2011/02/15/pathpartner-demos-720p-hd-skype-
`videocalling-using-android-and-o/
`
`* Spearheaded scaling efforts for my engineering team, building recruitment
`processes, training frameworks, and software quality practices.
`* Empowered new recruits through tailored training, fostering technical
`expertise and team growth.
`* Showcased cutting-edge solutions to customers, leveraging a highly skilled
`and efficient engineering team.
`
`Technical Leader
`January 2008 - January 2010 (2 years 1 month)
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`Bengaluru Area, India
`* Led cross-functional teams across continents (Taiwan, South Korea, India) to
`successfully bring up and debug a Broadcom SOC BCM 2153-based Windows
`Mobile platform for Samsung.
`* Collaborated closely with hardware and software engineers from Broadcom
`and Samsung to integrate GPS, Wi-Fi/Bluetooth/FM, camera, audio, and
`display subsystems.
`
`Senior software Engineer
`August 2006 - January 2008 (1 year 6 months)
`Bengaluru Area, India
`Pioneered multimedia innovation at Pathpartner - From ground-up to growth:
`
`* Joined as the second employee, embracing the entrepreneurial spirit to build
`Pathpartner's foundation.
`* Led the development of a proprietary multimedia framework and application
`stack, venturing into uncharted territory for the company.
`* Proactively collaborated with management to recruit new talent, shaping the
`technical team for future success.
`
`Emuzed India Pvt Ltd
`Software Engineer - Systems
`2003 - 2006 (3 years)
`* Designed and implemented high-performance DMA drivers for Analog
`Device's Blackfin processors, optimizing data transfer for various applications.
`* Integrated and tuned multiple video and audio codecs on Blackfin
`platforms, achieving performance benchmarks to meet demanding customer
`requirements.
`
`Education
`National Institute of Technology Calicut
`Bachelor of Technology (B.Tech.), Computer Science and
`Engineering · (1999 - 2003)
`
`Sarvodaya Vidyalaya
`ISC  · (1997 - 1999)
`
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`Contact
`
`www.linkedin.com/in/tauseef-
`kazi-406b7930 (LinkedIn)
`
`Top Skills
`Product Development
`Hardware Development
`Executive Team
`
`Patents
`Dynamic voltage scaling system
`
`Tauseef Kazi
`
`Senior Director @ Qualcomm | Electronic Systems Architect
`San Diego, California, United States
`
`Summary
`As a Senior Director of Engineering at Qualcomm, I have over
`26 years of experience in the field of embedded systems, system
`architecture, and low power optimization. I hold a master's degree in
`both computer science and electrical engineering from the University
`of Southern California, and multiple patents in design for lower power
`and multimedia systems.
`
`My mission is to lead the platform architecture for application
`processor and multimedia technology, spanning across camera
`ISP, video, computer vision, SoC/ASIC design, and thermal
`management for various devices and markets, such as mobile,
`VR/AR, automotive, and IoT. I manage a team of engineers,
`collaborating with cross-functional teams and partners to deliver
`cutting-edge performance, efficiency, and functionality for the
`next-generation Snapdragon processors. I am passionate about
`innovation and solving complex problems that enable new and
`exciting experiences for users and customers.
`
`Experience
`
`Qualcomm
`28 years 8 months
`Senior Director Of Engineering
`May 2017 - Present (7 years)
`San Diego, California
`Platform architecture lead. AP & multimedia technology (camera ISP, video,
`and computer vision) for mobile, VR/AR, automotive and IOT. System-level
`performance/power/thermal architect.
`
`Director, Engineering
`May 2013 - April 2017 (4 years)
`Greater San Diego Area
`SoC/ASIC HW Architecture, Camera and Video Power
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`Principal Engr. - Snapdragon chipset power architecture
`January 2009 - April 2013 (4 years 4 months)
`Snapdragon chipset power and performance platform architect.
`
`Sr. Staff Engr. - SOC platform and modeling
`January 2005 - December 2008 (4 years)
`Power/performance modeling
`Virtual SW development platforms
`
`Sr. Staff Engr. - VLSI/Digital HW design
`June 2002 - December 2004 (2 years 7 months)
`Digital SoC design lead, DDR controller design, CPU DVS architecture, DSP
`architecture.
`
`Staff Engr. - VLSI Design Automation and Std cell library team lead
`September 1995 - June 2002 (6 years 10 months)
`ASIC chip lead, designed/lead std cell lib team, std cell circuit design, layout,
`timing/power characterization, and CAD tools development in C/C++.
`
`Education
`University of Southern California
`MS, Computer Science
`
`NED University of Engineering and Technology
`BE, Electronics
`
`University of Southern California
`MS, Electrical Engineering
`
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`Contact
`
`www.linkedin.com/in/
`divyakesharwani (LinkedIn)
`
`Top Skills
`Product Development
`Verilog
`Verilog-AMS
`
`Certifications
`R Programming A-Z™: R For Data
`Science With Real Exercises
`Financial Modeling: Constructing and
`Utilizing a Financial Model
`
`Divya Kesharwani
`
`Semiconductor
`Santa Clara, California, United States
`
`Summary
`Self-motivated and proactive professional with a technical
`and business background. Over 13 years of experience in the
`semiconductor industry in design, engineering management, and
`product management/marketing with a record of taking products from
`concept to design wins and mass production. Solid understanding
`of Snapdragon SOC architecture for audio, multimedia, and AI
`pipeline with experience in HW/SW design, Analog and RF, Interface
`I/O, AI and ML flow, and chip manufacturing process. Strong
`business fundamentals with experience in pricing and contract
`negotiation, technical marketing, and product strategy. Quick learner
`with demonstrated aptitude to learn new areas/ skills for career
`advancement.
`
`Tools and Platforms: Tableau, Salesforce, Cadence, Matlab,
`VerilogAMS, Verilog, Excel, and PowerPoint, Jira, Confluence, Git
`Application Development: Python, Ruby-on-Rails, HTML, CSS
`Language: English and Hindi (written and oral)
`Technical: Multimedia pipeline, Connectivity and Compute, Camera
`ISP, AI and ML flow, On-device inference, ANC, ECNS, Spatial
`audio, Signal processing, MEMS and sensors, chip design and
`manufacturing, Analog and RF
`Business: Product strategy, Customer engagement, Technical
`marketing, Business development, Pricing and Contract Negotiation,
`Cross-Functional leadership, Budgeting and forecasting, Business
`case preparation, Problem solving, Stakeholder management, GTM
`strategy, Team development
`
`Experience
`
`Qualcomm
`Sr. Manager, Product Marketing /Management
`January 2023 - Present (1 year 4 months)
`Santa Clara, California, United States
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`Managing personal audio product line (Snapdragon Sound platform) for key
`strategic accounts in the North America region totaling $xxM+ in annual
`revenue.
`
`Responsible for revenue and market share targets by driving product
`adoption and business growth across a variety of customers (OEMs, ODMs,
`Distributors) and markets (Enterprise, Gaming, Consumer, Prosumer,
`Audiophiles). Leading regular customer reviews with sales, support, and
`operations to ensure activities and strategies support BU aspirations.
`
`Building and nurturing relationships with customers, industry drivers, 3rd party
`orgs, and voice assistant ecosystem providers to gain a high level of customer
`and market insight. With that, defining, alongside internal teams, a compelling
`portfolio of SoC and SW solutions to build a differentiated and completive
`offering that matches customer needs and technology trends.
`
`Leveraging strong technical and business knowledge and communication
`skillsets to convey complex information to multiple audiences with differing
`knowledge levels.
`
`Knowles Corporation
`Manager - Analog and Mixed signal ASIC, Microphone Development
`July 2020 - December 2022 (2 years 6 months)
`Itasca, Illinois, United States
`Engineering manager for the development of microphone for Knowles
`MedTech and Specialty Audio (MSA) Business Unit with revenue impact of
`$xxM+.
`Managed a cross functional engineering team of ASIC, Layout, PCBA,
`Acoustics, and Verification engineers across US and India to develop new
`technologies and products (NTI/NPI).
`Provide regular guidance to the quality and reliability team and the factory
`engineering team in Malaysia on smooth mass production ramp-up and on any
`pre/post-launch issues.
`Worked in close collaboration with marketing and sales on all GTM activities
`Built a robust product strategy with ASIC and Microphone roadmap for Med
`Tech and the Hearing health segment across all hearing aid form factors –
`BTE, ITE, and RIC.
`Close technical engagement with top OEMs such as Sonova, Demant, and
`WSA among others.
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`MediaTek
`Staff (Sr.) Analog Design Engineer
`March 2014 - July 2020 (6 years 5 months)
`Market Research Initiative (Corporate Sales Team)
`
`Conducted market research for ‘Truly Wireless Stereo’ (TWS) chipset product
`family. Analyzed customer segments and features trends from analysts’
`reports, chipset datasheets, and OEM product claims. Using gap analysis,
`identified KPIs and features for MediaTek’s TWS chipset leading to design win
`in tier 1 brand headsets
`
`Staff (Sr.) IC Design Engineer - Design and Development of ASICs
`Led the design and development of several novel analog and mixed signal
`circuits such as ADC, DAC, Filters, Calibration Algo, OpAmps, and LDOs for
`wireless and wireline application. Circuit implementation employing solid digital
`signal processing fundamentals and accounting for PPA tradeoff and process
`variation to ensure high yield. Collaborate with system and sub-system teams
`to guarantee interface compatibility. Publish innovation in conference and
`journals.
`
`Analog Devices
`Analog IC design engineer
`December 2011 - March 2014 (2 years 4 months)
`Senior Engineer – Design and Development of ASICs
`Design and development of analog and mixed-signal circuits for wireless
`applications optimized for power, performance, and area tradeoffs. Work with a
`cross-functional team to solidify the specification and architecture of key IPs for
`the industry’s first integrated base-station transceiver
`• Designed and developed four-stage PGA using feed-forward compensation
`technique resulting in 10dB improved high-frequency gain and linearity with
`same power consumption as the existing design
`• Worked with marketing and product teams to analyze advantages and
`performance metrics of a customer-requested feature creep on an existing
`product line.
`
`ST-Ericsson
`Analog HW Design engineer
`November 2010 - December 2011 (1 year 2 months)
`- Worked on modeling and design of 5th order, single bit, continuous time, ΔΣ
`ADC for measurement receiver chain (MRx) employed in wireless transceiver
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`for WCDMA and GSM application. A feed-forward architecture using a direct
`feed-in coefficient and a switched capacitor feed-back DAC was used
`- Various analysis and decision starting from architectural choice, coefficient
`and full scale determination, specification for thermal noise, sampling clock
`jitter, power supply rejection, dynamic range, RC calibration, anti-aliasing and
`effect of direct feed-in coefficient were determined
`- Currently working on transistor level design & modification of LDO, RC-
`integrators, Sw-cap DAC, non-overlapping clock generator and Quantizer
`
`Cirrus Logic
`Analog design engineer
`April 2010 - September 2010 (6 months)
`- Worked on modeling and design of a bi-directional line driver with data rate
`of 16MHz, for transporting audio and audio related metadata from a host to a
`device over a 2m long cable.
`- A voltage based driver with the challenge to obtain programmable data swing
`and programmable data transition time.
`- Driving a high capacitive load of head phone amplifier while still meeting a
`reasonable cable impedance match with reasonable power consumption was
`accomplished.
`
`Oregon State University
`Research Assistant in Analog, RF and Mixed Signal Circuit Design
`September 2008 - April 2010 (1 year 8 months)
`During my stay at Oregon State, I worked on several projects both as a part
`of my research and for course work. These projects included analysis, design,
`simulation and layout of various blocks.
`I worked on design of track and hold employing sinusoid as sampling clock,
`to minimize the effect of jitter on high speed ADC as a part of my masters
`research work.
`I have also worked on Op-Amp design, DS-ADC, Switch Cap filters and PLLs
`and have good understanding of the blocks.
`
`Indian Institute of Technology, Madras
`Student
`June 2004 - May 2008 (4 years)
`I did my under graduation from IIT Madras in the year 2008. During my stay at
`IIT, I did various courses in analog design.
`As a part of my final yr. project, I worked on the characterization of Frequency
`Synthesizer build for ZigBee transceiver. I used various AMS equipments like
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`Oscilloscope, Signal generators, Spectrum analyzer , Probe Station to name a
`few.
`
`Cosmic Circuits
`Mixed Signal design Intern
`May 2006 - July 2006 (3 months)
`Analysis of mismatch in current sources transistors in current steering DACs.
`The effect of segmentation in DAC DNL and INL performance and DNL
`Yield was studied. Using the Monte carol simulation, I derived a simple
`Binomial Expectation formula for predicting the DAC DNL yield of fully unary
`implemented DAC architecture was derived.
`
`Education
`The University of Chicago Booth School of Business
`Master of Business Administration - MBA, Marketing, Finance,
`Entrepreneurship · (2018 - 2020)
`
`Oregon State University
`MS, Analog , Mixed signal and RF circuits · (2008 - 2010)
`
`Indian Institute of Technology, Madras
`B.Tech, Electrical Engineering · (2004 - 2008)
`
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`Contact
`
`www.linkedin.com/in/prajakt-
`kulkarni-6924b64 (LinkedIn)
`
`Top S