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`Case 6:23-cv-00158-ADA Document 65-9 Filed 04/05/24 Page 1 of 26
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`EXHIBIT Y
`EXHIBIT Y
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`EXHIBIT Y
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`Sub-Exhibit Description
`1
`Adrian Alonso LinkedIn Profile
`2
`Aneeket Patkar LinkedIn Profile
`3
`Eric Ocasio LinkedIn Profile
`4
`Haku Sato LinkedIn Profile
`5
`Jonathan Phillippe LinkedIn Profile
`6
`Karthik Ramanan LinkedIn Profile
`7
`Vikas Sheth LinkedIn Profile
`
`Page
`1
`4
`10
`14
`16
`19
`21
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`Contact
`
`www.linkedin.com/in/adrian-
`alonso-8a285115 (LinkedIn)
`www.aalonso.wordpress.com
`(Blog)
`
`Top Skills
`Embedded Linux
`Device Drivers
`Embedded Systems
`
`Languages
`English (Native or Bilingual)
`Spanish (Native or Bilingual)
`Korean (Elementary)
`
`Adrian Alonso
`
`Software Engineer at NXP Semiconductors
`Austin, Texas, United States
`
`Summary
`Embedded Linux systems
`Build frameworks: Openembedded, Yoctoproject
`C/C++, Bash, Python
`Linux kernel drivers audio
`
`Specialties: Embedded Linux systems.
`
`Experience
`
`NXP Semiconductors
`Software Engineer
`December 2015 - Present (8 years 5 months)
`Austin, Texas Area
`Project lead, software release management, project management.
`Embedded Linux device drivers; Clock and pin control subsystems (CCM,
`MMDC, IOMUXC)
`LittleKernel audio drivers.
`Domain/Tools: Software development; C/C++; Git; Linux kernel; LittleKernel.
`Target platform: NXP iMX6/iMX7/iMX8 SoC
`
`Freescale Semiconductor
`Software Engineer
`July 2011 - December 2015 (4 years 6 months)
`Embedded Linux device drivers; Audio subsystem
`Enhace/Develop Linux device drivers for iMX53/iMX6 audio IP modules:
`ESAI, SSI, ASRC, CCM.
`
`Yoctoproject BSP layer maintainer meta-fsl-arm
`https://github.com/Freescale/meta-fsl-arm
`
`Secret Lab Technologies
`Software Engineer
`May 2010 - July 2011 (1 year 3 months)
`Remote work from my living room.
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`Embedded Linux software engineering services
`
`Linux BSP for Xilinx FPGA development platforms.
`
`Yocto/Openembedded framework support for building embedded Linux
`distributions for Xilinx target platforms Powerpc 405, 440 and Microblaze
`architectures.
`* Initial project as Google summer of code 2010
`* Yoctoproject contributions:
`http://git.yoctoproject.org/cgit/cgit.cgi/meta-xilinx/
`Domain/Tools: Software development; C/Bash/Python; Git; Openembedded;
`Target platform: Xilinx Virtex FPGA, Powerpc 405, 440, Microblaze.
`
`Google Summer of Code
`Software Engineer
`May 2010 - August 2010 (4 months)
`Mexico City Area, Mexico
`GSoC project with Linux Foundation to support add support of embedded
`Linux distributions to Xilinx PowerPC 440 FPGA; Part of Master degree
`project.
`https://aalonso.files.wordpress.com/2011/11/alligator-os_17012011.pdf
`Upstream YoctoProject meta-xilinx which now is meta-xilinx-community.
`
`Domain/Tools: Software development; C/C++; Git; Linux kernel.
`Target platform: Xilinx PowerPC 440 FPGA.
`
`Dextra Technologies
`Software engineer
`July 2009 - September 2009 (3 months)
`Guro-gu, Seoul, Korea
`Gstreamer custom plug-ins for audio codec plugins; Development environment
`based on Scratchbox2 for Linux embedded applications.
`* Summer job @ LG Korea
`Domain/Tools: Software development; C/C++; Git; Linux Limo; Gstreamer;
`Target platform: OMAP processors.
`
`Dextra Technologies
`Software engineer
`April 2006 - January 2008 (1 year 10 months)
`Monterrey Area, Mexico
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`Develop and maintain audio/speech codec's interface to multimedia engine.
`The Multimedia engine improves data exchange between GPP and DSP
`where algorithm codec's are executed.
`
`Domain/Tools: Software development; C/C++; Code composer; Jtag debugger;
`ClearQuest; ClaerCase;
`Target platform: OMAP processors.
`
`Education
`Instituto Politécnico Nacional
`Master, Computer engineering · (2008 - 2010)
`
`Universidad Autónoma Metropolitana
`Balchelor, Electronic Engineering · (2000 - 2005)
`
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`Contact
`
`www.linkedin.com/in/aneeketpatkar
`(LinkedIn)
`
`Aneeket Patkar
`
`Senior Staff Engineer at Renesas
`Austin, Texas, United States
`
`Top Skills
`Communication
`WiFi
`Programming
`
`Languages
`English (Full Professional)
`Marathi (Native or Bilingual)
`Hindi (Native or Bilingual)
`
`Summary
`Experienced Embedded C software designer and developer with
`experience in WiFi, ZigBee, Bluetooth , NFC and DSP audio
`processing.
`Over 14 years experience in Embedded Software Development
`for 8 shipping products in Government and Public Safety market,
`Industrial Lighting, Industrial Safety, 4 with Bluetooth, BLE and BLE
`Mesh.
`Responsible for initial product software prototyping with evaluation
`boards from various vendors, product prototype board bring up
`by debugging and resolving issues using tools such as JTAG
`debuggers, Oscilloscope. protocol analyzers.
`Familiar with Pre-Silicon and Post-Silicon firmware Validation with
`tools such as Waveform Capture, kernel message logging, register
`dump, Logic Analyzer.
`Familiar with debugging Wi-Fi PHY issues, PHY calibration,
`Beamforming, Throughput issues
`Led Design and development of firmware for LuminaRF family
`of Switches, Dimmers, Load Controllers, Sensors from board
`bring-up to productization with modular code design and re-use.
`Responsibilities included system integration, component design,
`implementation and verification.
`Developed and designed OPENRTOS based product's software
`implementation - messages, queues, ISRs, I2C, SPI, USB driver
`integration and application code development - for 32-bit micro-
`controllers as well ARM Cortex M4 architecture. Involved in code
`library and platform development which has been re-used in multiple
`products.
`Experience in collaborative software development with multi-site
`teams located across different US states as well as other countries
`Dedicated, goal oriented, smart working team player.
`
`Programming:
`C, Embedded C, Assembly programming, Linux, Python, Bash
`Script.
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`Standards/Protocols:
`Wi-Fi ac , ax, Bluetooth Classic and BLE , NFC, UART, I2C, USB,
`SPI, DMA, PWM, ADC, I2S, , Ethernet, TCP/IP, RS485, ZigBee.
`
`Software/OS:
`GreenHills Multi IDE, ST-Micro XCube, IAR Workbench, AVR Studio,
`CSR BlueSuite/ADK, TI Code Composer Studio, Visio, Rational
`Clearcase, Labview, JIRA, Confluence, GIT, Jenkins, Matlab .
`FreeRTOS/OpenRTOS, Linux/Unix, Micrium uC-OS-II,
`
`Tools:
`Wireshark, ZigBee sniffer, Logic Analyzer, LitePoint, Frontline BT/
`HCI Sniffer, Ellysis BT Analyzer, LeCroy USB Analyzer, Beagle USB/
`SPI/I2C Analyzer, PTS Bluetooth Tester.
`
`JTAG Emulators:
`Marvell XDB, Atmel-ICE, JTAGICE mkII, XDS560, Multi.
`
`Controllers/Architectures:
`Atmel SAM4, AT32UC3B, CSR BC5MM-BC7MM, CSR 8811,
`ARM Cortex M4, T.I. DSP TMS320c54x, c55x, c64x, c67.
`PIC18F452/18C252, 8051/89C51. x86 Architecture.
`
`Experience
`
`Renesas Electronics
`Senior Staff
`July 2023 - Present (10 months)
`Austin, Texas Metropolitan Area
`
`NXP Semiconductors
`Principal Software Engineer
`May 2022 - May 2023 (1 year 1 month)
`San Jose, California, United States
`• Wi-Fi firmware development, 802.11 ac, ax,
`• Integrated and tested WiFi features such as Beamforming, Dynamic Radio
`Channel Switch
`• Debug PHY, data throughput and EVM issues using register dumps from
`MAC, Baseband registers and LitePoint to check the transmit power.
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`• Pre-Silicon validation of different feature-pack based functionality using
`Palladium, as well as post-silicon verification, with Linux kernel using dmesg
`logging through firmware and Linux driver interaction. Waveform capture for
`analysis through Verdi tool for the pre-Silicon validation to debug issues.
`• Supporting WiFi firmware development across Linux, Android and RTOS host
`iMX8 platform.
`• Assist hardware teams with firmware support for debugging issues and WiFi
`PHY calibration methodologies for RC, I/Q calculations.
`• Interaction with MAC, Baseband, Hardware IP teams for debugging issues
`using Logic Analyzers to access different test bus signals.
`• Usage of software management tools such as Git, Bitbucket, Jenkins, JIRA,
`Confluence, etc.
`
`Omron Robotics and Safety Technologies
`Embedded System Developer
`September 2020 - April 2022 (1 year 8 months)
`United States
`• Firmware development of Safety Laser scanner used in Industrial Automation
`and with Robots for Object detection.
`• Assist with the Design and Documentation of the Statement of Design
`Document to meet the Safety system design requirement of ISO-13849-1.
`• Authored the Document for Procedure of Manufacturing and Calibration with
`inputs from system architect team, used for the component calibration during
`Manufacturing and Assembly.
`• Lead the development of Manufacturing firmware which is used to calibrate
`different aspects of the Safety Laser functionality during Manufacturing and
`Assembly.
`• Worked with Design and Architecture team to implement algorithm for
`calibration of Laser Power Monitoring.
`
`Leviton
`Embedded Software Engineer II
`April 2016 - August 2020 (4 years 5 months)
`Tualatin, Oregon
`• Strategized firmware development roadmap for the LuminaRF and Intellect.
`• Architected, designed, and developed software platform architecture for
`Zigbee Router-role based Smart Switches, Dimmers and Load with support for
`BLE Over-The-Air Update.
`
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`• Responsible for the designed and development of firmware for PIR
`Occupancy Sensor as well as OEM Photosensor for meeting new Industrial
`lighting Title 24 requirements
`• Designed and developed firmware for BLE and Zigbee based LuminaRF
`Coordinator Room Controller product, a Zigbee Coordinator device with
`support for Groups, Scenes, Occupancy, Photosensors, etc.
`• App based OTA of Zigbee and BLE ICs, from Silicon Labs, on multiple
`products.
`• Board bring-up and verification of multiple products, hardware verification of
`I2C devices, SPI flash interface.
`• Developed proof of concept prototype for productization using Evaluation
`boards for internal demonstration.
`• Debug network traffic issues using Zigbee and BLE sniffer.
`
`Motorola Solutions
`5 years 4 months
`Senior Software Engineer II
`February 2012 - April 2016 (4 years 3 months)
`Schaumburg, IL
`Currently working on Atmel ARM Cortex M4 and TI C6748 architecture. Initial
`code prototyping on evaluation boards from Atmel ( SAM4S Explained ) and TI
`( C6748 LCDK)
`Integrate Atmel Software Framework and OPENRTOS into the development
`software.
`Implemented ISR based I2C driver and SPI driver and interfaced multiple I2C
`and SPI devices
`Integrate TI NFC 7970 NFC IC as well as implement application code for
`interfacing ISO 15693 and ISO14443 protocol
`Lead engineer on the AIC3204 codec configuration which will be handling
`TDM audio between digital and analog mic as well as Bluetooth audio
`
`Lead Engineer for Dual Mic noise cancelling Remote Speaker Microphone.
`TI DSP C5535 DSP/BIOS code development ,power savings implementation,
`DSP ISR and assembly language implementation
`TI AIC 3204 audio codec sleep mode configuration updates
`Design and implement state machine based Atmel AVR 32-bit -DSP C5535
`communication interface over SPI protocol.
`
`Lead Engineer for new release of the Bluetooth headset to support a Two-way
`radio platform.
`
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`Senior Software Engineer
`January 2011 - January 2012 (1 year 1 month)
`Schaumburg
`Developed software on Atmel AVR 32-bit micro-controller as well CSR BC05
`Bluetooth IC to help deliver Wireless Bluetooth Accessory. This platform was
`used to spin off a series of Bluetooth 2.1 products.
`The Atmel AVR 32-bit micro-controller and the OPENRTOS based embedded
`software platform was also re-used in other Remote Speaker Microphone
`products such as the GPS Gen2 as well as the XE RSM.
`Inter-processor communication over I2C, ISR implementation, USB based
`Motorola Proprietary communication protocol implementation
`Contributed to development of NFC based Motorola Proprietary
`communication protocol - Motorola Touch Pairing - as well as FastPTT feature
`which reduced the data latency in Bluetooth OTA data processing.
`Designed and developed the MSC for the Bluetooth pair and connection
`procedure for the non-secure Bluetooth headsets.
`Implementation of Bluetooth HSP and SPP profiles as well as ensuring that
`the products meet the Certification. Developed the application software on top
`of the CSR Bluetooth library as per the product requirements and debugged
`connection issues with OTA tools such Frontline dongle and Ellisys Bluetooth
`Explorer tool.
`Developed product software and debugged issues with teams located in Israel,
`Plantation(FL) to get the Bluetooth product integrated into the Two-way radio
`system.
`Developed SCM skills and volunteered as the stop-gap SCM for critical
`software feature releases.
`
`Motorola
`Sr. Software Engineer
`November 2008 - December 2010 (2 years 2 months)
`Schaumburg
`Prototyping product software on Atmel EVK1101 32-bit AVR series evaluation
`board with IAR Workbench IDE.
`Clock configuration, SPI, GPIO configuration, ISR development and porting
`OPENRTOS framework as part of product board bring-up . This architecture
`was the platform for a series of products all of which are shipping.
`Implemented and developed Motorola Proprietary protocol for FastPTT over
`Bluetooth.
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`Implemented a USB device recovery mechanism for USB bus failures
`introduced by ESD on Atmel AT91SAM7S ARN7TDMI based micro-controller.
`Performed Box tests, Software Integration tests, logged issues and faults with
`CQCM tool.
`Attended product Beta as software team representative and documented
`customer feedback
`
`Education
`The University of Texas at Arlington
`Master of Science (M.S.), Electrical Engineering · (2005 - 2007)
`
`Bharati Vidyapeeth
`Bachelor of Engineering (BE), Electronics and
`Telecommunication · (1999 - 2003)
`
`Sister Nivedita
`
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`Contact
`
`www.linkedin.com/in/eric-ocasio
`(LinkedIn)
`
`Eric Ocasio
`
`Customer Software Architect at NXP Semiconductors
`Austin, Texas, United States
`
`Top Skills
`Debugging
`Embedded C
`Embedded Systems
`
`Languages
`Spanish (Limited Working)
`
`Publications
`Design and ARM-based Embedded
`Web Server
`
`Summary
`Over the course of my career, my primary focus has been making
`customers successful with my company's products. I've gained
`a very broad set of skills when it comes to designing, building
`and debugging embedded MCU-based systems. I'm proficient
`in embedded C and have developed a long list of software for
`various customers and internal projects. I also have programming
`experience in Swift, Python and C++.
`
`My current role has me focused on winning strategic opportunities
`by providing development assistance to our customers. This role has
`given me the opportunity to become very experienced with HomeKit
`accessory development using Apple's HomeKit ADK, specifically
`with BLE and Thread transports.
`
`I continue to expand my knowledge in smart home ecosystems. I'm
`now working with Matter and am helping NXP and our customers
`prepare for the upcoming release of the first wave of Matter
`accessories.
`
`Experience
`
`NXP Semiconductors
`8 years
`Senior Principal Engineer / Customer Software Architect
`January 2020 - Present (4 years 4 months)
`• Work closely with business unit managers and sales to secure design wins
`when there are gaps between standard NXP enablement and customer needs.
`Fill the gaps to secure the win. Sometimes the gap is small, others it’s a major
`development effort.
`• Work with Belkin/Wemo to develop HomeKit-based products based on
`the K32W0 platform. Scope of work includes device provisioning tools, test,
`firmware development and firmware update. These products use BLE and
`802.15.4 (Thread) transports.
`
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`• Intimate knowledge of HomeKit application development and the associated
`test and certification process.
`
`Principal Engineer / Solution System Integrator
`May 2016 - January 2020 (3 years 9 months)
`• Software development lead for Point-of-Sale solution (reference design,
`SLN-POS-RDR) based on the Kinetis K81 Secure MCU. Architected modular
`software platform that allowed customers to easily pick and choose which
`pieces from the solution they wanted to use while still allowing them to keep
`pieces from their existing code base. This solution has generated over $20M in
`revenue for NXP.
`• Software development lead for MCU-based local voice solution (SLN-
`LOCAL-IOT). Ported and analyzed various Audio Front End (AFE) solutions
`from partners to allow far-field voice detection. Integrated speech recognition
`(ASR) engine from partner Snips – now Sonos – onto the i.MX RT1060
`platform. Designed modular software platform allowing easy integration of
`voice applications into an existing application.
`
`Freescale Semiconductor
`Business Development Applications Engineer
`April 2014 - May 2016 (2 years 2 months)
`Austin, TX
`• Provide technical guidance in support of strategic customer opportunities for
`the business development team.
`• Member of the team that re-defined the architecture for Freescale base
`enablement for MCUs. The result is the current MCUXpresso SDK.
`• Led effort to completely revamp the out-of-box experience for Freescale MCU
`evaluation/development kits. Mocked up a web page, designed a UI and got
`approval from management to fund the change. This is now the standard flow
`for all NXP MCU products.
`
`Texas Instruments
`Senior Applications Engineer
`May 2009 - April 2014 (5 years)
`Austin, TX
`• Provide remote and on-site support for various critical development and
`hardware issues for BU’s largest customer, one of the world’s largest
`consumer electronics companies (12M+ MCUs annually), as lead factory
`applications engineer.
`• Develop custom applications and/or ports for high visibility and strategic
`customers including industry leaders such as Cisco, Lenovo and Samsung.
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`• Developed proof-of-concept hardware and the majority of the firmware for the
`MCU used as the In-Circuit Debug Interface (ICDI) on all Tiva evaluation and
`development platforms, of which tens of thousands have shipped.
`• Developed SMBus stack that is now part of TivaWare; code deployed in over
`20 million systems worldwide.
`• Experience developing drivers for various sensor devices including
`Invensense MPU-6050/MPU-9150, Kionix KXTI9 series, Asahi Kasei
`AKM8975, Intersil ISL29023 and TI TMP006.
`• Provide on-site customer support to various high-profile customers.
`• Support technical product training and hands-on workshops for the field
`engineers and sales team in support of major product launches.
`
`Luminary Micro
`MTS
`October 2005 - May 2009 (3 years 8 months)
`• Helped develop customer support methodology that would grow to support
`over 4,000 customers.
`• Developed testing methodology and code structure for the manufacture and
`test of all customer-facing hardware platforms.
`• Created a Windows C++ library/DLL to interface to the ARM Cortex-M Debug
`Access Port (DAP). This library is the foundation used to interface all third-
`party tools to Stellaris and Tiva C evaluation and development boards (tens
`of thousands of units) as well as the LM Flash Programmer utility and various
`internal tools. Having this capability built-in to our evaluation boards allowed
`us to sell a low-cost ($49) tool without requiring a third-party debug dongle.
`The industry has followed suit in the years since.
`• Created a Windows-based tool used to program the CPLDs and FPGAs
`of our internal emulation platform. Worked with the board designer to
`implement a custom high-speed protocol using the FTDI FT2232 device that
`programs target devices faster than the tools available from the respective
`manufacturers.
`• Developed an iPod docking solution (hardware and software) for a customer
`design-in opportunity. The board interfaced to the customer’s existing
`application board as a proof of concept and the software allowed intuitive
`browsing of the iPod on the customer’s treadmill display in a way similar to the
`native iPod interface, only using the existing controls.
`• Participated in various trade shows, including Embedded Systems
`Conference, Embedded World and ARM TechCon.
`• Conducted dozens of customer trainings and product seminars in the United
`States and Asia (China, Hong Kong, Japan, Korea and Taiwan).
`
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`Freescale Semiconductor
`3 years 5 months
`Applications Engineer
`May 2003 - October 2005 (2 years 6 months)
`• Provided support for the MAC7100 and MAC7200 ARM7TDMI-based
`automotive MCUs and the lead customer, Daimler-Chrysler; lead factory
`applications engineer.
`• Worked directly with automotive customers and suppliers to both design and
`implement modules based on our MCU as well as debug issues, including
`during “line down” situations.
`
`Engineering Rotation Program
`June 2002 - May 2003 (1 year)
`I did rotations in Applications Engineering (ColdFire), Design (ColdFire),
`Design (Somerset, PowerQUICC III team), and Product Engineering (Power
`PC for Apple).
`
`General Motors
`Intern
`June 2001 - September 2001 (4 months)
`I worked in the quality team at the Cadillac El Dorado factory in East Lansing,
`Michigan. Worked to resolve high occurrence (JD Power) quality issues.
`Primary project was related to sticking "auto-release" fuel door. Achieved
`Shainin Green Belt qualification during my internship.
`
`Education
`Northwestern University
`BS, Electrical Engineering · (1998 - 2002)
`
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`Contact
`
`www.linkedin.com/in/haku-sato-
`a2245115 (LinkedIn)
`
`Haku Sato
`
`Sr. System Architect at NXP Semiconductors
`Austin, Texas, United States
`
`Top Skills
`ARM
`Board Development
`PCB layout design
`
`Languages
`English
`Japanese
`
`Experience
`
`NXP Semiconductors
`8 years 5 months
`Sr. System Architect
`March 2017 - Present (7 years 2 months)
`Austin, Texas Area
`Sr. System Architect for i.MX8M SW and HW platform.
`- Architecture definition for modularized, flexible and customer friendly audio
`platform .
`- Design of the i.MX8M platform based unified audio architecture for
`"immersiv3d", supporting Dolby ATMOS and DTS:X.
`- Autodetection and system level management design for audio platform.
`- heterogenius multi-OS platform supporting Linux and RTOS on Cortex-A
`ARM multi-core IC
`- Integration of Voice applications to the audio framework for the next
`generation home-audio platform
`- Design of the audio board
`
`Check out below for more info
`https://www.linkedin.com/feed/update/urn:li:activity:6488412646726078464
`
`http://media.nxp.com/phoenix.zhtml?c=254228&p=irol-
`newsArticle&ID=2382630
`https://blog.nxp.com/audioradio/nxp-brings-dolby-atmos-and-dtsx-to-living-
`rooms-everywhere-with-immersiv3d-audio-solution
`
`Sr. System Architect
`December 2015 - Present (8 years 5 months)
`System architect for Single Chip Module (SCM).
`Ball map placement, optimization and breakout study.
`Designing of the SCM package layout
`Designing of the validation and customer reference boards for SCM modules
`SCM NPI project management and customer project management
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`Freescale Semiconductor
`4 years 9 months
`Sr. System Architect
`March 2015 - December 2015 (10 months)
`Austin TX
`System architect for Single Chip Module (SCM).
`Designing of the SCM package layout
`Designing of the validation and reference board for SCM modules
`SCM NPI project management and customer project management
`
`HW Apps
`April 2011 - March 2015 (4 years)
`PCB design for i.MX6x (ARM based embedded processr)
`Board project management
`Customer support/product enablement targeted for tablet and e-reader
`applications
`
`Freescale Semiconductor
`Applications Engineer
`2000 - 2009 (9 years)
`Ball map and IO mux definition.
`Package layout review.
`Ball map studies.
`Customer board design review, bring up and support.
`
`Page 2 of 2
`
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`Page 15
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`

`Case 6:23-cv-00158-ADA Document 65-9 Filed 04/05/24 Page 18 of 26
`
`Contact
`
`www.linkedin.com/in/jonathan-
`phillippe (LinkedIn)
`
`Jonathan Phillippe
`
`System Engineer at NXP Semiconductors
`Austin, Texas, United States
`
`Top Skills
`Layout
`IBIS
`I/O
`
`Patents
`LVDS WITH IDLESTATE
`I/O CELL ESD SYSTEM
`ELECTROSTATIC DISCHARGE
`PROTECTION SYSTEM
`
`Summary
`Experience leading teams and projects in circuit design, physical
`design, software integration, hardware systems and prototyping.
`
`Experience with IO library design and layout using Cadence Virtuoso
`(130nm, 90nm, 55nm), IBIS modeling, circuit and board level spice
`simulations.
`
`Experience
`
`NXP Semiconductors
`8 years 5 months
`Partners and Ecosystem Manager, ML, AI and Computer Vision
`January 2023 - Present (1 year 4 months)
`Austin, Texas, United States
`
`System Engineer
`December 2015 - December 2022 (7 years 1 month)
`Austin, Texas, United States
`I'm a systems engineer in the NXP "Edge Processing" Group. Constantly
`trying to wrap my hands and brain around the hardware/software nexus of
`various products, prototypes and customer requests.
`
`Working on ISP calibration software utility and customer process.
`
`Support customers with their HW and SW issues with the MIPI CSI-2, DSI and
`D-PHY interfaces.
`
`Led the development of an ISP calibration software utility.
`
`Led the development of an FCC certified (part 15.212 pre-approved module)
`SiP that contained an i.MX 8M Mini applications processor, Wi-Fi/BT die,
`PMIC, crystal, RF passives and three antenna options in a 14mm x 24mm
`BGA.
`
`Page 1 of 3
`
`Jawbone v. Meta
`Page 16
`
`

`


`

`

`Case 6:23-cv-00158-ADA Document 65-9 Filed 04/05/24 Page 19 of 26
`
`Led the development of an audio focused hardware reference platform that
`supports the direct plug-in of the i.MX 8M Mini/Nano/Plus compute modules.
`Features include 24 channels analog audio-out, 2 channel analog audio
`in, SPDIF/Toslink digital audio I/O, HDMI RX/TX for audio extraction and
`eARC, plus Wi-Fi/Bluetooth. This kit was developed for audio prototyping and
`enablement using the NXP Immersiv3D SDK.
`
`Led a software integration team to port Amazon Alexa Voice Services and
`Multi-Room Music (MRM) services onto an i.MX 8M EVK. NXP was the
`first third party vendor to achieve official MRM certification from Amazon in
`February of 2019.
`
`Led the development of a Wi-Fi PoP MCM with an i.MX 6ULL applications
`processor and a PMIC in the base, and a Murata Wi-Fi module on top – all in
`a 14mm x 14mm BGA package. Prototypes were built and working Wi-Fi was
`demonstrated.
`
`Freescale Semiconductor
`18 years 8 months
`System Architect
`April 2015 - December 2015 (9 months)
`Austin, Texas
`Lead design engineer of a DDR3 PoP MCM with an i.MX 6ULL and a PMIC in
`the base (10mm x 14mm BGA) package and a single DDR3 Dram package on
`top. Built and demonstrated working prototypes.
`
`Designed the SCM-i.MX6SX PoP MCM with an i.MX 6SX, PMIC and passives
`in the base (13mm x 13mm BGA) package and an LPDDR2 on top. This part
`saw production and a few design wins in some industrial applications.
`
`Designed a JEDEC thermal characterization test card for a multi-chip-module
`by reverse biasing the internal NMOS based LDO PDN (no thermal dies used).
`
`Supported various customer designs for high speed interfaces (USB, HDMI,
`LPDDR2), thermal management, power supply distribution and PMIC
`integration. Experience with PCB design, manufacturing, and testing, along
`with FCC non-radiated emissions testing.
`
`Electrical Engineer
`May 1997 - March 2015 (17 years 11 months)
`Austin, Texas
`
`Page 2 of 3
`
`Jawbone v. Meta
`Page 17
`
`

`


`

`

`Case 6:23-cv-00158-ADA Document 65-9 Filed 04/05/24 Page 20 of 26
`
`Led a team of circuit design engineers building new I/O libraries to support a
`family of products in various process nodes from 90nm to 28nm. Translated
`requirements from systems, applications, SOC, ESD, packaging, and test
`teams into actionable tasks for the design team.
`
`Worked with PE/TE teams to devise and implement final test strategies for
`various I/O types.
`
`Coordinated with both internal design groups and external design partners
`(India and Munich design centers) for I/O development and SOC needs.
`
`Led the development of a single I/O library to support both low (150-250) pin
`and high (250-500) pin count parts in the 40nm process node.
`
`Lead architect for two different I/O pad libraries in the 55nm process node
`used on all FSL automotive microcontrollers. Designed CMOS I/O buffers,
`level shifters (1.2V to 5V), ESD structures and other miscellaneous circuits
`required for a full library.
`
`Led a team of engineers to develop an I/O library that worked with both an
`external I/O library from our (at the time) partner ST but could also be used
`standalone. This was in the 55nm node with a mix of 3.3V DGO and 5V HV
`transistors.
`
`Implemented a new multi-drive slew rate controlled I/O pad architecture which
`saved area and reduced the propagation delay over the previous architecture.
`
`Designed a 1.2V to 5V high-speed level shifter which doesn’t require a bias
`voltage, settling or start-up time in the 55nm process node.
`
`Education
`Georgia Institute of Technology
`Master's degree, Computer Science · (August 2022 - December 2025)
`
`The University of Texas at Austin
`BSEE, Electrical Engineering · (1997 - 2002)
`
`Page 3 of 3
`
`Jawbone v. Meta
`Page 18
`
`

`


`

`

`Case 6:23-cv-00158-ADA Document 65-9 Filed 04/05/24 Page 21 of 26
`
`Contact
`
`www.linkedin.com/in/karthik-
`ramanan-3643a16 (LinkedIn)
`
`Top Skills
`Analog Integrated Circuit Design
`Memory Design
`Technical Lead
`
`Certifications
`Product Manager Certificate
`Functional Safety Engineer -
`ISO61508:2010
`Functional Safety Engineer
`ISO26262:2018
`
`Publications
`A low power fast wakeup flash
`memory system for embedded SoCs
`
`Patents
`VARIABLE INPUT VOLTAGE
`CHARGE PUMP
`CHARGE PUMP FOR USE WITH A
`SYNCHRONOUS LOAD
`Ratioless near-threshold level
`translator
`Negative charge pump regulation
`Refresh Operation During Low
`Power Mode Configuration
`
`Karthik Ramanan
`
`Senior Product Manager, Application Processors
`Austin, Texas, United States
`
`Summary
`• Well rounded semiconductor professional with an excellent balance
`of business management and strong technical skills.
`• Prolific inventor with over 20 patents that solves multiple circuit
`level and system level problems pertaining to analog and memory
`design.
`
`Experience
`
`NXP Semiconductors
`12 years 1 month
`Senior Product Manager
`October 2022 - Present (1 year 7 months)
`Austin, Texas Metropolitan Area
`- End to End product manager from conceptualization to product launch for
`i.MX Application Processors
`- Extensive focus on computer vision, robotics, AI and audio applications.
`
`Principal Technical Program Manager
`January 2022 - October 2022 (10 months)
`Austin, Texas Metropolitan Area
`- Managing Safety and Security Requirements across various MCU and MPU
`programs for Edge Processing BU.
`- Facilitate migration of various Edge processing BU projects into a new
`requirements management tool.
`- Drive a common methodology for Market Requirements Document (MRD) for
`all business segments in the Edge Processing BU.
`
`Principal Memory/Analog Design Engineer
`August 2014 - December 2021 (7 years 5 months)
`Austin, Texas, United States
`- Work with memory controller team and product team to define NVM
`requirements.
`- NVM architecture (addressing, row/column drivers, sense amplifiers, write
`drivers)
`
`Page 1 of 2
`
`Jawbone v. Meta
`Page 19
`
`

`


`

`

`Case 6:23-cv-00158-ADA Document 65-9 Filed 04/05/24 Page 22 of 26
`
`- Lead the development of the analog module (Bandgaps, LDOs, oscillators,
`charge pumps)
`- Closely work with test and validations post silicon through qualification.
`

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