throbber
Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 1 of 65
`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 1 of 65
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`EXHIBIT 2
`EXHIBIT 2
`
`

`

`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 2 of 65
`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 2 of 65
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`UNITED STATES PATENT AND TRADEMARKOFFICE
`
`IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`VOLKSWAGEN GROUP OF AMERICA, INC.,
`Petitioner,
`
`V.
`
`ADVANCEDSILICON TECHNOLOGIES LLC
`Patent Owner
`
`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`PATENT OWNER’S PRELIMINARY RESPONSE
`PURSUANTTO 37 C.E.R.§ 42.107(a)
`
`NXP-AST00156668
`
`

`

`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 3 of 65
`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 3 of 65
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`IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`TABLE OF CONTENTS
`
`PAGE
`
`Introduction & Summary of Argument...0.....0000ccccceccccecesceeeeeeeceesseeeesteeeeeaes 1
`
`IL.
`
`The ?945 Patent ........cccccccceccccsecceseceeeseesseeceeeeeeecsseecasecessecesseensseesnseesteeeseeens 2
`
`A.
`
`B.
`
`The 945 Patent Discloses Improved Graphics Pipelines.............0....... 2
`
`The Challenged Claimsof the 7945 Patent ..0...0..ce cece ceeeeeeeeees 7
`
`IE.
`
`The Primary Asserted References .0....0..cccccccccccccscceesneeeceseeeceseeeceensseessteeeenaes 9
`
`A.
`
`Bl
`
`NarayamaSwamh o.oo... ccc ccc cece ee ce ee cece ee ee cene ates ceaceseneececeneseeeennesenteseees 9
`
`GOVG coceecccccccccccecseceesccensecesssecsueeessceessseneseecsuecnssseessecenseeenessensesenseeneats 12
`
`IV.
`
`The Correct Claim Construction of Material Disputed Terms..........0.000000... 15
`
`A.—The Controlling Claim Construction Standard ...0..0.0.0ccceceeeeeeee 15
`
`B.
`
`The Material Claim Construction Issue Facing The Board ................ 17
`
`l.
`
`“memory Controller” o.oo... cece ccceccccseccesssceecsaeeeesseeeeesseesensseeees 17
`
`a.
`
`The Correct Construction Of “memory controller”’.......... 17
`
`b. Volkswagen’s Petition Depends On An Incorrect And
`Unsupported Construction Of “memory controller”......... 18
`
`i.
`
`Volkswagen neither alleges nor provesthat its
`construction is the ordinary meaning of the clatmed
`“memory controller”ooo... cccccccceeeseeeeseeesseeeeeseeees 19
`
`it. Volkswagen neither alleges nor provesthat its
`construction is some purported special definition of
`the claimed “memory controller” ...0.000.0000c ce. 20
`
`2.
`
`“SCAN COTIVETTCD” ooo ccceccccecccssecececesseeecesessuaececssseeeceestsseeeeeenees 22
`
`a.
`
`“scan converter” Should Be Construed To HaveIts
`Ordinary Meaning ......... ccc ccccccccececeeesceceeneeecsteeeeeseeeeees 24
`
`b. Volkswagen Failed To Argue Or Prove Any Clear And
`UnambiguousSpecial Definition Or Disavowal............... 27
`
`C.
`
`The Remaining Clarm Construction Dispute Is Not Material
`And Should Not Be Decided By The Board ...0..00000 lee 29
`
`ii
`
`NXP-AST00156669
`
`

`

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`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 4 of 65
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`IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`V.
`
`Volkswagen’s Petition Fails With Respect To All Challenged Claims........ 30
`
`A.—All Challenged Claims: Gove Cannot Cure Narayanaswami’s
`Admitted Deficiencies Regarding The “Memory Controller”
`And “Same Chip” Limitations .0..000000ccccccecceeccscceesecceeeececsssecesseeeeees 30
`
`l.
`
`2.
`
`Underthe correct construction, Gove indisputably does
`not disclose the missing claimed “memory controller’’............ 31
`
`Volkswagen failed to identify evidence sufficient to meet
`its burden of proving that it would have been obviousto
`combine Gove with Narayanaswamito provide the
`missing “memory controller’ and “same chip”...........0.....05 34
`
`a. Volkswagen identifies no explanation for how a person of
`ordinary skill would have combined Narayanaswami and
`GOVE ooo ccceecccccccccsececccessceceececeuaseceeessseseccessuaseecessesasececeseeeess 37
`
`b. Volkswagen fails to establish a reasonable likelihood of
`proving whya person of ordinary skill would have
`combined Narayanaswami and GoVE...........cccecceeeeeeeee 39
`
`B.—All Challenged Claims: A Pipeline “operative to process data in
`a dedicated tile? oo... cc cccseccseccessseeeeceseecnssecssseecsseeessseseseeeseeesaees 42
`
`Volkswagen’s Petition Also Fails With Respect To Various
`Limitations Specific To Certain Challenged Dependent Claims.................. 48
`
`A.
`
`Dependent Claims 2 And3: “a two dimensional partitioning of
`TIICMOLYoe. cece cc ceececceccecsneseeccesesasececcesssesceecnaeeeceseessteeecesnsaseeessnsseeeeses A8
`
`1.
`
`2.
`
`Narayanaswami teaches away from “two dimensional
`partitioning Of MEMOLY” ooo... ee cece cee ececeececenseeeessaeeensaees 49
`
`Combining “two dimensional partitioning of memory”
`with Narayanaswami would result in an inoperable
`SYSEOM. 0. ccecccccccsccceccsssseeceescssuceccceeseecececssseecesseeseeececstseecesnssseess 51
`
`B.
`
`Dependent Claim 5: “scan converter ... operative to determine
`the portion of the pixel data to be processed by the back end
`CHLCUITTYoo. eee ccce cece cecsseceessseecessaecessseeeesseecessseeccsssececsseeeesssecentseeeesaase 52
`
`VIL.
`
`COnCIUSION oo... cece ccc ccccccecccceececceceseeececusenseeeceauseeccecuaeseececaucaesecusaaeceseseueneensees 55
`
`ill
`
`NXP-AST00156670
`
`

`

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`
`IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`TABLE OF AUTHORITIES
`
`Page(s)
`
`Cases
`
`ACTY, Inc. v. Walt Disney Co.,
`346 F.3d 1082 (Fed. Cir. 2003) oo... ccccccccccceeceescceesceecaceeseseeessenseeesseeseesesens 19
`
`Ariosa Diagnostics v. Verinata Heatth, Inc., et al.,
`IPR2013-00276, Paper 43 (PTAB Oct. 23, 2014)...ec cceceteceereesteeeees 36
`
`Aventis Pharma S.A. v. Hospira, Inc.,
`675 F.3d 1324 (Fed. Cir, 2012) oo... cccssecese sence cesseesseecsteesssecessenses 17, 24
`
`In re Beasley,
`117 Fed. Appx. 739 (Fed. Cir. 2004)... ccc cccccccccccsecesecenseeseceesseeesseeessneessreenes 39
`
`Becton, Dickinson and Co. v. One StockDug Holdings, LLC,
`IPR2013-00235, Paper 30 (PTAB Sept. 25, 2014)... cece cecepassim
`
`Callcopy v. Verint Americas, et al.,
`IPR2013-00486, Paper 11 (PTAB Feb. 5, 2014) oo... eee cccceerteeeetteeee 35
`
`In re Chaganti,
`554 Fed. Appx. 917 (Fed. Cir. 2014) ooo ccc ccceecnsnecesseccnseeesseeenseesneeeeaees 36
`
`Ericcson, Inc. v. Intellectual Ventures I LLC,
`IPR2014-00921, Paper 8 (PTAB Dec. 16, 2014) ooo. eee ce ceeetteees 16, 24
`
`Galderma Labs., L.P. v. Tolmar, Inc.,
`737 F.3d 731 (Ped. Cir. 2013) ...ccccccccccccccccssecensccesseseneeeeseesesesecsseensesensseessseeess AO
`
`In re Gordon,
`733 F.2d 900 (Fed. Cir. 1984) ooo. ccc cccccccecccececssseeeseeeeseeesseeesseeesseeesseees 51,52
`
`In re Gurley,
`27 F.3d 551 (Fed. Cir, 1994) ooo ccccceccccececseceseecnsceeesceecessecaseeensesetsesesseees 51,52
`
`Hill-Rom Services, Inc. v. Stryker Corporation,
`755 F.3d 1367 (Fed. Cir, 2014) ooo ececeeesecesseeessseenseeeneneesereens 16, 17, 24
`
`1V
`
`NXP-AST00156671
`
`

`

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`IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`Hockerson-Halberstadt, Inc. v. Converse Inc.,
`183 F.3d 1369 (Fed. Cir. 1999) ooo ccc cece ceeeceesesseseseeseeeeeceseesteseseenseeseees 19
`
`Intellectual Ventures Memt, LLC, v. Xilinx, Inc.,
`IPR2012-00019, Paper 33 (PTAB February 10, 2014) occ eeeeteeeee 16
`
`In re Karn,
`AA] F.3d 997 (Fed. Cir. 2006) o....cccccccccceccecssecesececsseeesseecssessseesesseeesesecsseeseeeenss 36
`
`KSR Int’l Co. v. Teleflex Inc.,
`550 U.S. 398 (2007) ooo. ce cece ce eceeceeee cess sesereceaeeceasecsisecsisestisesersesens 35, 36
`
`McGinley v. Franklin Sports Inc.,
`262 F.3d 1339 (Fed. Cir. 2001) ooo cccccccecececcesseeesseeenseecseeessseesseeesseeees 51, 52
`
`Phillips v. AWH Corp.,
`AIS F.3d 1303 (Fed. Cir. 2005) (en banc) ooo... cece cccccceceeceseeeteeteeeeeeseees 16
`
`tn re Ratti,
`270 F.2d 810 (CCPA 1959) ooo cccccceccessecesseeesseceeeessaeceseeensteenereeenseeeas 51, 52
`
`Symantec Corp. v. RPost CommunicationsLtd.,
`IPR2014-00355, Paper 12 (PTAB Jul. 15, 2014) ooo cece ecsteeeeeeees 35
`
`Thorner v. Sony Computer Entm’t Am. LLC,
`669 F.3d 1362 (Fed. Cir. 2012) o.ooc cece cece cesses eeseteeeseeseeenetnees 28
`
`Universal Remote Control, Inc. v. Universal Electronics, Inc.,
`IPR2013-00127, Paper 32 (PTAB June 30, 2014) ooo eccceesteeeteeeee 16
`
`Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc.,
`200 F.3d 795 (Fed. Cir, 1999) ooo cece cece cenecnneceseceeseeeseessseeeseseestesenseenseseeees 17
`
`Wellman, Inc. v. Kastman Chem. Co.,
`642 F.3d 1355 (Fed. Cir, 2011) occ ccccseessccescecesseeesseccseeesseeesssesseeeeaees 17
`
`Wowza Media Sys., LLC v. Adobe Systems Inc.,
`IPR2013-00054, No. 12 (PTAB Apr. 8, 2013)... cccceccceeseeeteeesseeeseseees 16
`
`Other Authorities
`
`37 CLPLR. § A217 occ ccc cece cceccesnecceseecssseeeseeeeseeseesesseeeeeesesseseeseeesseecseessseeeneeecaes I
`
`Vv
`
`NXP-AST00156672
`
`

`

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`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 7 of 65
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`IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`77 Fed. Reg. 48,756, 48,766 (Aug. 14, 2012) ..cccccccccscsssssssvesscssssseseessesesssessesseeenstee 16
`
`vi
`
`NXP-AST00156673
`
`

`

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`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 8 of 65
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`IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`TABLE OF EXHIBITS
`
`
`
`Declaration of John C. Hart, Ph.D. In Support Of Patent Owner
`Advanced Silicon Technologies LLC’s Preliminary Response
`
`
`
`
`2001
`
`vil
`
`NXP-AST00156674
`
`

`

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`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`1,
`
`Introduction & Summaryof Arguments
`
`Patent Owner Advanced Silicon Technologies LLC (“AST”) submits this
`
`response under 37 C.F.R. § 42.107 to the Petition filed by Volkswagen Group Of
`
`America, Inc. (“Volkswagen”or “Petitioner’’). For at least the following reasons,
`
`Volkswagen’s Petition fails to establish the required likelihood that it will prove
`
`that the challenged claims of AST’s U.S. Patent No. 8,933,945 (the “’945 Patent’)
`
`are unpatentable.
`
`All Challenged Claims:
`
`Under the correct claim constructions identified by AST, Volkswagen’s
`
`Petition fails to establish the required likelihood of success with respect to each of
`
`the following limitations:
`
`e
`
`“memory controller’;
`
`e “onasame chip”; and
`
`e
`
`“one of the at least two graphics pipelines operative to process data in a
`
`dedicatedtile.”
`
`Becauseeach ofthese limitations is found in each of the challenged claims,
`
`each of Volkswagen’s failures with respect to these limitations provides a separate
`
`and independent reason for denying the Petition in its entirety.
`
`NXP-AST00156675
`
`

`

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`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`Dependent Claims:
`
`Underthe proper claim construction, Volkswagen’s Petition also fails with
`
`respect to numerouslimitations that are specific to certain challenged claims,
`
`including the following:
`
`e “atwo dimensional partitioning of memory”(dependent claims 2 and 3);
`
`and
`
`e
`
`“scan converter ... operative to determine the portion of the pixel data to
`
`be processed by the back end circuitry” (dependent claim 5).
`
`Each of these missing limitations provides an additional independent reason
`
`for denying the Petition with respect to the corresponding dependent claims.
`
`Il.
`
`The ’945 Patent
`
`A.
`
`The ’945 Patent Discloses Improved Graphics Pipelines
`
`The ‘945 Patentis entitled “Dividing Work Among Multiple Graphics
`
`Pipelines Using a Super-Tiling Technique”and describes a “graphics processing
`
`circuit” consisting of multiple graphics pipelines on the same chip.
`
`When multiple graphics pipelines operate in parallel, an important goal for
`
`efficient graphics processing is “load balancing,” which meansall of the graphics
`
`NXP-AST00156676
`
`

`

`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 11 of 65
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`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
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`pipelines remain busy and nonelay idle, such that the graphics processing unit can
`
`produce an image as quickly as possible. (See Hart Decl.' at § 16.)
`
`The ‘945 Patentillustrates such parallel graphics pipelines in Figure 2,
`
`which has been reproduced below, and annotated using a red rectangle to identify
`
`one of the plurality graphics pipelines:
`
`“A
`
`8
`Scan
`|
`~ CONVERTER |
`
`HH
`P|
`
`SCAN
`|
`CONVERTER|
`
`' ASTis providing the Declaration of John C. Hart, Ph.D. In Support OfPatent
`
`Owner Advanced Silicon Technologies LLC’s Preliminary Response as Exhibit
`
`2001.
`
`NXP-AST00156677
`
`

`

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`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
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`As depicted above, a graphics pipeline may contain front-end circuitry. Such
`
`front-end circuitry “generates the pixel data 36 by performing, for example,
`
`clipping, lighting, spatial transformations, matrix operations and rasterizing
`
`operations on the primitive data.” (945 Patent’ at 4:39-42.) For example, the
`
`front end circuitry would convert the vertices of a triangle from their 3-D XYZ
`
`positions on the sphere to their corresponding 2-D XY positions on the display
`
`screen, as shown below. The “rasterizing operations” include computing vertex
`
`values useful for the next scan converter stage. (See Hart Decl. at { 18.)
`
`
`
`The graphics pipeline may also include a scan converter. “The scan
`
`converter 37 of the first graphics pipeline 101 receives the pixel data 36 and
`
`sequentially provides the position (e.g. x, y) coordinates 60 in screen space of the
`
`pixels to be processed by the back end circuitry 39[.]” (945 Patent at 4:45-48.)
`
`For example, as shownbelow,a scan converter accepts a triangle described by
`
`
`* Volkswagen previously provided the 945 Patent as Exhibit 1001.
`
`NXP-AST00156678
`
`

`

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`Case IPR2016-00894
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`three vertices and produces a collection of pixels designed to fill the triangle. (See
`
`Hart Decl. at 4 19.)
`
`The graphics pipeline may also include back-end circuitry. “Back end
`
`circuitry 39 may include, for example, pixel shaders, blending circuits, z-buffers or
`
`any other circuitry for performing pixel appearance attribute operations (e.g. color,
`
`texture blending, z-buffering) on those pixels located, for example, intiles...”
`
`(C945 Patent at 4:66-5:3.) As illustrated below, the back end circuitry determines
`
`(See Hart Decl. at J 20.)
`
`the colors of the pixels produced by the scan converter.
`
`
`
`In order to provide better load balancing of the available graphics pipelines,
`
`NXP-AST00156679
`
`

`

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`Case IPR2016-00894
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`the ‘945 Patent divides the screen up into tiles (below left), such that each tile can
`
`be assigned to one graphics pipeline for graphics processing. For example, as
`
`illustrated in below right, tiles shaded in red are assigned to one graphics pipeline
`
`while tiles shaded in blue are assigned to the other. (See Hart Decl. at ¥ 21.)
`
`
`
`Asillustrated below, the graphics pipelines are in communication with a
`
`memory controller, which is operative to transfer pixel data between each ofthe
`
`pipelines and a shared memory. For example, as depicted below, memory
`
`controller 46 accepts pixels 43 and 44 generated by back end circuitry A 39 and B
`
`42 and writes pixels from both sources into the same graphics memory. This
`
`memory controller 46 may also managethe transfer of pixel data 49 and 50 from
`
`the shared graphics memory to the display 51 and back to the pipelines. (Hart
`
`Decl. at 4 23.)
`
`NXP-AST00156680
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`

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`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
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`GRAPHICS
`PROCESSING ET
`CHRCUWT
`i
`
`REa
`
`BACK ENE
`CIRCUITRY A
`
` CARCUSTRY
`
`
` FRONT END
`
`Rennmnnannnnnnegennnannned
` lesseesesenesesenssesrsseseseresesenserssenesssssesessesecseseathesesessesseesesessseseesaseesmmanannnaneundpammnaaanannaeae
`
`DISPLAY 54
`
`To—4
`
`GRAPHICS
`MEMORY
`
`
`ven
`
`ae
`
`FIG. 2
`
`B.
`
`The Challenged Claimsof the ’945 Patent
`
`Volkswagen challenges independent claim 1, its dependent claims 2-11, and
`
`independent claim 21. As illustrated by exemplary claim | reproducedin full
`
`below, each challenged claim describes a graphics processing circuit having at
`
`least two graphics pipelines, at least one of which can “process data in a dedicated
`
`tile.” The claims additionally require a “memory controller” that is operative “to
`
`transfer pixel data between”the first pipeline, the second pipeline, and a memory
`
`shared by the two. The claims further require that the pipelines and the memory
`
`controller be on the “same chip.”
`
`1.
`
`A graphics processing circuit, comprising:
`
`NXP-AST00156681
`
`

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`Case IPR2016-00894
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`at
`
`least
`
`two graphics pipelines on the same chip
`
`operative to process data in a corresponding set of tiles of a
`
`repeating tile pattern corresponding to screen locations, a
`
`respective one of
`
`the at
`
`least
`
`two graphics pipelines
`
`operative to process data in a dedicated tile; and
`
`a memory controller _on the chip in communication
`
`with the at least two graphics pipelines, operative to transfer
`
`pixel data between each of a first pipeline and a second
`
`pipeline and a memory shared amongthe at least two graphics
`
`pipelines;
`
`wherein the repeating tile pattern includes a horizontally
`
`and vertically repeating pattern of square regions.
`
`(945 Patent at claim | (emphasis added); see also claims 2-1, 21.)
`
`Also relevant to this Preliminary Response are the additional limitations of
`
`dependent claims 2 and 5. Challenged claim 2 depends from claim | and adds the
`
`requirement of a partitioning of memory:
`
`2.
`
`The graphics processing circuit of claim 1, wherein
`
`the square regions comprise a two dimensionalpartitioning of
`
`memory.
`
`(945 Patent at claim 2.)
`
`Claim 5 depends from claim 4 (which depends from claim 1) and addsthe
`
`requirement of each pipeline including a “scan converter” that can determine
`
`which portion of pixel data will be processed by a pipeline’s back end circuitry:
`
`NXP-AST00156682
`
`

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`Case IPR2016-00894
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`5.
`
`The graphics pipeline processing circuit of claim 4,
`
`wherein each of the at
`
`least two graphics pipelines further
`
`includes a scan converter, coupled to the back end circuitry,
`
`operative to determine the portion of the pixel data to be
`
`processed by the back end circuitry.
`
`C945 Patent at claim 5; see also claim 4.)
`
`Ill. The Primary Asserted References
`
`Volkswagen’s Petition asserts the following Grounds:
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`1,9, 10, and 21
`§ 103(a)
`Narayanaswami and Gove
`
`Narayanaswami, Gove, and|§ 103(a)|2-4 and 6-7
`Foley
`5, 8, and 11
`§ 103(a)
`Narayanaswami, Gove,
`Ii
`Foley, and Kelleher
`
`
` I
`
`Each of these Grounds relies on the combination of two primary references:
`
`Narayanaswami and Gove.
`
`A.
`
` Narayanaswami
`
`Narayanaswami’is directed to a graphics processing circuit and in
`
`particular, a method and apparatus for managing a graphical workload across
`
`multiple processors. Narayanaswamiis designed to provide a “computer graphics
`
`systems” capable of rendering multiple objects into a frame buffer with the
`
`* Volkswagen previously provided the Narayanaswamireference as Exhibit 1008.
`
`NXP-AST00156683
`
`

`

`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 18 of 65
`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 18 of 65
`
`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`purposeof displaying those objects as quickly as possible. (Narayanaswamiat
`
`1:15-17.) Narayanaswami was purportedly designed to respond to a rendering
`
`process that had become “more complex and computationally intensive as users
`
`demand more detailed results using more objects rendered more quickly, including
`
`providing realtime motion, while using more computationally intensive processing
`
`techniquessuch ascolor, texture, lighting, transparency and other rendering
`
`techniques.” (/d. at 1:17-24.)
`
`Narayanaswamidescribes graphics adapter processors 220, depicted in Fig.
`
`1 below. Volkswagen asserts that each of these processors is one of the claimed
`
`“graphics pipelines.” (Pet. at 33.)
`
`
`
`
`eT
`
`
`| GRAPHICS
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`SEWCES)
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`apaprer [| &
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`AOAPIER cp
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`NXP-AST00156684
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`

`

`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 19 of 65
`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 19 of 65
`
`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`Narayanaswami describes (and illustrates in Fig. 6 below) the preferred
`
`method steps to be performed by each processor: “FIG.6 is a flowchart illustrating
`
`a preferred method for each processor to handle the graphics workload while
`
`determining ownership of pixels or regions. This process may be executed
`
`concurrently and in parallel by all processors.” (Narayanaswamiat 6:66 — 7:3.)
`
`|
`
`
`
`SHADING, TESTING,
`RAGHTEG, ETC. POR
`SURORECT
`
`
`
`SCAN CONVERT
`SUBOBIECT STD
`PRELS
`
`
`
`RETREVE ORES “CALCULATE VARIABLES FOR
`
`
`
`
`AST
`SUBORIECT
`?
`
`
`
`il
`
`NXP-AST00156685
`
`

`

`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 20 of 65
`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 20 of 65
`
`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`As depicted in Figure 6 and the accompanying description, each
`
`Narayanaswamiprocessorprocessesall pixels, whether they are in a particular
`
`region or not. (Narayanaswamiat 7:21-28.) To illustrate, step 610 requires each
`
`processor to scan convert the subobject. Narayanaswamidescribes the processor
`
`
`as completing this step before determining which pixels are “owned by the
`
`processor,” resulting in the processor scan converting and processing all of the
`
`pixels, not just those in a particular region:
`
`In step 615, the subobject is then scan converted into
`
`pixels, In step 620, each pixel is checkedto seeif it is owned by
`
`the processor by comparing the identifier of the processor with
`
`the identifier stored in the pixel ownership buffer or the region
`
`ownership list for that pixel.
`
`If yes in step 620, indicating that the processor owns the
`
`pixel, then the processer processesthe pixel.
`
`(id. at 7:21-28.)
`
`B.
`
`Gove
`
`Gove’ teaches a system to handlethe processing of images and graphics.
`
`Gove’s focus is on improved imaging systems. (See e.g. Gove, col. 26:19-25
`
`(“One of the reasons why so much imaging capability is available under the system
`
`shownis that the single chip contains several processors working in parallel
`
`* Volkswagen previously provided the Gove reference as Exhibit 1009.
`
`12
`
`NXP-AST00156686
`
`

`

`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 21 of 65
`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 21 of 65
`
`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`together with several memories, all accessible under a crossbar switch which
`
`allows for substantially instantaneous rearrangement of the system. This gives a
`
`degree of powerandflexibility not heretofore known.”).) At their core, imaging
`
`systems “obtain visual images” and process them. Govediscloses that the image
`
`inputs“[c]an be, for example, a video camera...” (d., col. 5:22-23.)
`
`Gove’s patent embodiments would have been used in applications such as
`
`medical image processing. Gove describes operationsin its “Image Processing”
`
`section such as the “removal of extraneous specks from an image”or “recognizing
`
`...acircle” and that the circle in combination with “other shapes form a human
`
`image.” (Gove, col. 7:50-64.) Those types of functions are meant to enhance the
`
`quality of the images, which decreases image turnover time. Gove Figure I1 lists
`
`the various operations or algorithms which would betypical for its imaging
`
`processing system. (/d. at col. 12:17-19; see also Fig. 11, Hart Decl. at § 28.)
`
`Goveteaches that “[a] typical type of operation would be optical character
`
`recognition, target recognition or movement recognition. In each of these
`
`situations, the associated image processing would be controlled by the kind of
`
`operations to be performed.” (Gove at 12:19-24.) Gove also describes how the
`
`invention can be used for various methods of image enhancement. (See generally,
`
`id. at col. 12:33-59.) These types of operations place a premium on image quality
`
`13
`
`NXP-AST00156687
`
`

`

`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 22 of 65
`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 22 of 65
`
`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`which would be contrary to maximizing graphics turnover and display rates. (Hart
`
`Decl. at 7 29.)
`
`Volkswagen relies heavily on Gove’s disclosure of a “transfer processor 11,”
`
`depicted in Gove’s Figure 1 reproduced below.
`
`
`
`7 EEE
`
`
`
`|
`INTERRUPT-OR-POLL
`Ls
`MIMD COMMMUNICATION/SYNCHRONIZATION NETWORK
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`/ o£|P=)PRs So — NODE
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`|_
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`CYCLE~-RATE LOCAL CONNECTION NETWORK (cRossBARS)
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`r
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`(TRANSFER
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`spanes)
`TP= processor)
`| PM=
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`LOCAL, SHARED
`SHARED OR DISTRIBUTED
`|
`COMMUNICATION
`INSTRUCTION OR
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`MEMORY
`DATA SPACES
`Le ee swe me we wt wt tt te tt tn tt tt tet nt
`FIG.
`7
`
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`|
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`pel
`
`}
`
`28
`
`|
`
`NODES
`
`4
`
`Govedescribes the “transfer processor 11” as responsible for moving data
`
`back and forth between an internal memory and an external memory:
`
`Transfer processer 11 is the interface between system
`
`memory 10 and the external world.
`
`In particular,
`
`it
`
`is
`
`responsible for all accesses to external memory 15.
`
`14
`
`NXP-AST00156688
`
`

`

`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 23 of 65
`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 23 of 65
`
`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`Transfer processer 11, shown in in detail m FIG. 57,
`
`mainly performs block transfers between one area of memory
`
`and another. The “source” and “destination” memory may be on
`
`or off-chip and data transfer is via bus 5700 and FIFO buffer
`
`memory 5701.
`
`(Goveat 54:64 — 55:5.)
`
`Govefurther describes that these data transfers between internal and external
`
`memory can occurat the instruction of various processors:
`
`Transfer processor 11 shown in FIGS.
`
`1 and 2 and FIG 57
`
`transfers data between external memory and the various internal
`
`memory elements. Transfer processor 11 is designed to operate
`
`from packet requests such that any of the parallel processors or
`
`the master processor can ask transfer processor 11 to provide
`
`data for any particular pixel or a group of pixels or data, and the
`
`transfer processor will transfer the necessary data to or from
`
`external
`
`and internal memory without
`
`further processor
`
`intervention instructions. This then allows transfer processor 11
`
`to work autonomously and to process data in and out of the
`
`system without monitoring by any of the processors.
`
`(Gove at 11:36-45.)
`
`IV.
`
`The Correct Claim Construction of Material Disputed Terms
`
`A.
`
`The Controlling Claim Construction Standard
`
`The broadest reasonable interpretation standard applies in an infer partes
`
`review of a patent that, like the 945 patent, will not expire prior to the Final
`
`15
`
`NXP-AST00156689
`
`

`

`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 24 of 65
`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 24 of 65
`
`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`Written Decision. 37 C.F.R. §100(b); Office Patent Trial Practice Guide, 77 Fed.
`
`Reg. 48,756, 48,766 (Aug. 14, 2012). Applying the broadest reasonable
`
`interpretation, claim termsare given their ordinary and customary meaning, as
`
`would be understood by a person of ordinary skill in the art at the time of the
`
`invention, in light of the language of the claims, the specification, and the
`
`prosecution history of the record. #.g., Wowza Media Sys., LLC v. Adobe Systems
`
`Inc., IPR2013-00054, No. 12 at 5 (PTAB Apr. 8, 2013); Intellectual Ventures
`
`Memt, LLC, v. Xilinx, Inc., 1PR2012-00019, Paper 33 at 9 (PTAB February 10,
`
`2014); see also Phillips v. AWH Corp., 415 F.3d 1303, 1313-1317 (Fed. Cir. 2005)
`
`(en banc); Hill-Rom Services, Inc. v. Stryker Corporation, 755 F.3d 1367, 1371
`
`(Fed. Cir. 2014).
`
`Underthis test, “[t]here is a “heavy presumption’ that a claim term carriesits
`
`ordinary and customary meaning.” See Intellectual Ventures, IPR2012-00019,
`
`Paper 33 at 9; Wowza, IPR2013-00054, No. 12 at 6; Universal Remote Control,
`
`Inc. v. Universal Electronics, Inc., 1PR2013-00127, Paper 32 at 6 (PTAB June 30,
`
`2014). This heavy presumption is overcome in specific and limited circumstances:
`
`a claim term may be construed contrary to its ordinary meaning only wherethereis
`
`clear and unambiguous evidencethat the patentee, as lexicographer, provided a
`
`special definition for the claim term, or the patentee otherwise disavowedthefull
`
`scope of the claim termeither in the specification or during prosecution. Ericcson,
`
`16
`
`NXP-AST00156690
`
`

`

`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 25 of 65
`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 25 of 65
`
`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`Inc. v. Intellectual Ventures I LLC, 1PR2014-00921, Paper 8, at 8 (PTAB Dec.16,
`
`2014); Becton, Dickinson and Co. v. One StockDug Holdings, LLC, 1PR2013-
`
`00235, Paper 30 at 6 (PTAB Sept. 25, 2014); see also Aventis Pharma S.A.v.
`
`Hospira, Inc., 675 F.3d 1324, 1330 (Fed. Cir. 2012); Hill-Rom, 755 F.3d at 1371.
`
`B.
`
`The Material Claim Construction Issue Facing The Board
`
`The Board should only construe terms to the extent such construction is
`
`necessary to resolve a controversy material to the Petition. See, e.g., Wellman, Inc.
`
`v. Eastman Chem. Co., 642 F.3d 1355, 1361 (Fed. Cir. 2011); Vivid Techs., Inc. v.
`
`Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999). Based on the Petition
`
`and this Response, the only material claim construction issues currently facing the
`
`Board concerns the terms “memory controller” and “scan converter.”
`
`1.
`
`“memory controller”
`
`a.
`
`The Correct Construction Of “memory controller”
`
`The claimed “memory controller” is a limitation of every challenged claim.
`
`For example, each challenged claim requires:
`
`a memory controller ... operative to transfer pixel data between each
`
`of a first pipeline and a second pipeline and a memory shared among
`
`the at least two graphics pipelines.
`
`(945 Patent at independent claim 1, dependent claims 2-11, and independent claim
`
`21.)
`
`17
`
`NXP-AST00156691
`
`

`

`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 26 of 65
`Case 6:22-cv-00466-ADA-DTG Document 49-2 Filed 11/28/22 Page 26 of 65
`
`Case IPR2016-00894
`U.S. Patent No. 8,933,945 B2
`
`Consistent with the plain and ordinary meaning of the foregoing explicit
`
`claim language, the claimed “memory controller” should be construed to mean a
`
`“logic circuit operative to transmit and receive processed pixel data to and from the
`
`first pipeline, the second pipeline, and the first and second pipelines’ shared
`
`memory.”
`
`b.
`
`Volkswagen’s Petition Depends On An Incorrect And
`Unsupported Construction Of “memory controller”
`
`Petitioner incorrectly contends that “memory controller” should be
`
`construed to mean merely “logic that transmits data to and from a memory.” (Pet.
`
`at 15). This incorrect construction—on whichPetitioner’s entire Petition
`
`depends—improperly confines the required functionality o

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